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Texas Instruments DEM-DAI1789 EVM User guides
DEM-DAI1789 EVM
PCM1789 Evaluation Module
User's Guide
Literature Number: SBAU154
April 2009
2
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Contents
Preface ............................................................................................................................... 7
1
1.1
1.2
1.3
........................................................................................... 9
Block Diagram .............................................................................................................. 10
1.1.1 Electrostatic Discharge Warning ................................................................................ 10
Basic Connections and Operation ....................................................................................... 11
EVM Configuration Controls .............................................................................................. 11
1.3.1 HDR001 ............................................................................................................ 11
1.3.2 HDR101 ............................................................................................................ 11
1.3.3 JP101 ............................................................................................................... 11
1.3.4 JP102 ............................................................................................................... 11
1.3.5 CN102 .............................................................................................................. 12
1.3.6 SW101 .............................................................................................................. 12
1.3.7 SW102 .............................................................................................................. 12
1.3.8 HDR202 (with HDR203, CN204 and CN205) ................................................................. 12
1.3.9 SW201 .............................................................................................................. 12
1.3.10 SW202 ............................................................................................................. 13
1.3.11 SW203 ............................................................................................................. 13
1.3.12 SW204 ............................................................................................................. 13
1.3.13 HDR301 ........................................................................................................... 13
1.3.14 HDR302 ........................................................................................................... 13
1.3.15 SW301 ............................................................................................................. 13
1.3.16 SW302 ............................................................................................................. 13
1.3.17 JP401/405 (6–4) .................................................................................................. 13
1.3.18 JP402/406 (1–2, 3–4) ............................................................................................ 14
1.3.19 JP403/404/407/408 .............................................................................................. 14
Description and Hardware
................................................................................................. 15
2
Application Software
2.1
Description and Installation ............................................................................................... 16
2.2
Software Start-up Procedure
2.3
Using the Application Software ........................................................................................... 17
3.1
16
2.3.1
Audio Interface and Sampling Mode Control (SPI Mode) .................................................... 18
2.3.2
Audio Interface and Sampling Mode Control (I2C Mode) .................................................... 19
2.3.3
USB Connection and EVM Not Recognized ................................................................... 20
2.3.4
Operation Mode Control .......................................................................................... 21
2.3.5
Digital Attenuation and Soft Mute Control ...................................................................... 22
2.3.6
Zero Flag Control and Monitor................................................................................... 23
2.3.7
Analog Mute Function Control ................................................................................... 24
2.3.8
Register Setting History, Register Direct Access
2.3.9
3
.............................................................................................
.............................................................
Register Contents View ..........................................................................................
25
26
...................................................................... 27
Typical Performance Data ................................................................................................ 28
Typical Performance and Example Data
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3.1.1
3.2
Typical Performance vs Sampling Rate and System Clock ................................................. 28
.............................................................................................
FFT: 0-dB Output ..................................................................................................
FFT: –60-dB Output ...............................................................................................
FFT: –120-dB Output .............................................................................................
FFT: Bipolar Zero Output .........................................................................................
Example Measurement Data
29
3.2.1
29
3.2.2
3.2.3
3.2.4
29
30
30
............................................................ 31
4
Schematics and Printed Circuit Board Layouts
4.1
DEM-DAI/DAC_USB Schematics ........................................................................................ 32
............................................................................
4.1.2 DEM-DAI/DAC_USB USB and MCU ...........................................................................
4.1.3 DEM-DAI/DAC_USB DIR ........................................................................................
4.1.4 DEM-DAI/DAC_USB Interface to DUT Board .................................................................
4.1.5 DEM-DAI/DAC_USB LPF and Buffer ...........................................................................
DEM-PCM1789 Schematic (DUT Daughtercard) ......................................................................
Printed Circuit Board Layouts.............................................................................................
4.3.1 DEM-DAI/DAC_USB Silkscreen (Top) .........................................................................
4.3.2 DEM-DAI/DAC_USB Top Layer .................................................................................
4.3.3 DEM-DAI/DAC_USB Bottom Layer .............................................................................
4.3.4 DEM-PCM1789 (DUT Daughterboard) Silkscreen ............................................................
4.3.5 DEM-PCM1789 (DUT Daughterboard) Top View .............................................................
4.3.6 DEM-PCM1789 (DUT Daughterboard) Bottom View .........................................................
Bills of Material (BOMs) ...................................................................................................
4.1.1
4.2
4.3
4.4
DEM-DAI/DAC_USB Power Supply
32
33
34
35
36
37
38
38
39
40
41
42
43
44
Important Notices ............................................................................................................... 47
4
Contents
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List of Figures
1-1
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
3-1
3-2
3-3
3-4
3-5
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
DEM-DAI1789 Block Diagram ............................................................................................
Error Message at Software Start-up .....................................................................................
Audio Interface and Sampling Mode Control Tab—SPI Mode Recognized ........................................
Audio Interface and Sampling Mode Control Tab—I2C Mode Recognized .........................................
Audio Interface and Sampling Mode Control Tab—USB Connection and EVM Not Recognized ...............
Operation Mode Control Tab .............................................................................................
Digital Attenuation and Soft Mute Control Tab .........................................................................
Zero Flag Control and Monitor Tab ......................................................................................
Analog Mute Function Control Tab ......................................................................................
Register Setting History, Register Direct Access Area ................................................................
Register Contents View ...................................................................................................
Typical Performance vs fS and fSCK ......................................................................................
FFT (0 dB) ...................................................................................................................
FFT (–60 dB) ................................................................................................................
FFT (–120 dB) ..............................................................................................................
FFT of BPZ Output .........................................................................................................
Power-Supply Section .....................................................................................................
USB and MCU Sections ...................................................................................................
DIR Section .................................................................................................................
Interface to DUT Board Section ..........................................................................................
LPF and Buffer Sections ..................................................................................................
DEM-PCM1789 .............................................................................................................
Silkscreen ...................................................................................................................
Top Layer....................................................................................................................
Bottom Layer ................................................................................................................
Silkscreen ...................................................................................................................
Top Layer....................................................................................................................
Bottom Layer ................................................................................................................
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List of Figures
10
16
18
19
20
21
22
23
24
25
26
28
29
29
30
30
32
33
34
35
36
37
38
39
40
41
42
43
5
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List of Tables
1-1
1-2
4-1
4-2
6
SW201: System Clock Rate Selection for DIR9001 ...................................................................
SW201: Data Format Selection for DIR9001 ...........................................................................
Bill of Materials: DEM-DAI/DAC_USB ...................................................................................
Bill of Materials: DEM-PCM1789 .........................................................................................
List of Tables
12
12
44
46
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Preface
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Read This First
About This Manual
This document provides the information needed to set up and operate the DEM-DAI1789 EVM evaluation
module, a test platform for the 24-bit, 192-kHz, differential output, two-channel PCM1789 audio
digital-to-analog converter (DAC). For a more detailed description of the PCM1789, refer to the product
data sheet available from the Texas Instruments web site at http://www.ti.com. Support documents are
listed in the section of this guide entitled Related Documentation from Texas Instruments.
How to Use This Manual
Throughout this document, the abbreviation EVM and the term evaluation module are synonymous with
the DEM-DAI1789 EVM. The abbreviation DUT refers to the PCM1789 device. Unless specifically noted,
the information presented in this manual applies to the PCM1789.
Chapter 1 describes the hardware setup guide for the EVM, including the necessary information required
to configure the EVM switches and jumpers for product evaluation.
Chapter 2 explains how to use the software provided with the DEM-DAI1789 EVM for controlling the
PCM1789.
Chapter 3 includes the EVM electrical schematics, printed circuit board (PCB) layouts, and the bills of
material for both the DEM-PCM1789 and the DEM-DAI/DAC_USB evaluation platform motherboard.
Information About Cautions and Warnings
This document contains caution statements.
CAUTION
This is an example of a caution statement. A caution statement describes a
situation that could potentially damage your software or equipment.
The information in a caution or a warning is provided for your protection. Please read each caution and
warning carefully.
Microsoft, Windows are registered trademarks of Microsoft Corporation.
SPI is a trademark of Motorola Inc.
I2C, I2S are trademarks of NXP Semiconductors.
TOSlink is a trademark of Toshiba Corporation.
All other trademarks are the property of their respective owners.
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Related Documentation From Texas Instruments
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Related Documentation From Texas Instruments
The following document provides information regarding Texas Instruments integrated circuits used in the
assembly of the DEM-DAI1789 EVM. These documents are available from the TI web site. The last
character of the literature number corresponds to the document revision that is current at the time of the
writing of this document. Newer revisions may be available from the TI web site at http://www.ti.com/ or
call the Texas Instruments Literature Response Center at (800) 477-8924 or the Product Information
Center at (972) 644-5580. When ordering, identify the document(s) by both title and literature number.
Data Sheet
Literature Number
PCM1789 Product data sheet
SBAS451A
DIR9001 Product data sheet
SLES198
TUSB3410 Product data sheet
SLLS519G
OPA2134 Product data sheet
SBOS058
MSP430F169 Product data sheet
SLAS368
SN74LVC2G14 Product data sheet
SCES200L
TPS76933 Product data sheet
SLVS203E
REG1117 Product data sheet
SBVS001D
SN74LVC2GU04 Product data sheet
SCES197M
SN74LVC1T45 Product data sheet
SCES515H
SN74LV541 Product data sheet
SCES573A
If You Need Assistance
If you have questions regarding either the use of this evaluation module or the information contained in the
accompanying documentation, please contact the Texas Instruments Product Information Center at (972)
644–5580 or visit the TI web site at www.ti.com.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can
radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable
protection against radio frequency interference. Operation of this equipment in other environments may
cause interference with radio communications, in which case the user at his own expense is required to
take whatever measures may be required to correct this interference.
Trademarks
All trademarks are the property of their respective owners.
8
Read This First
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Chapter 1
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Description and Hardware
The DEM-DAI1789 is an evaluation board for the PCM1789, a 24-bit, 192-kHz, differential output,
two-channel audio DAC with a digital audio receiver, two-channel second-order post filter, mode control
interface to PC, and various switches and jumpers for configuration controls.
The DEM-DAI1789 operates from 5-V and ±15-V analog power supplies with an S/PDIF input signal.
Topic
1.1
1.2
1.3
..................................................................................................
Page
Block Diagram .......................................................................... 10
Basic Connections and Operation ............................................... 11
EVM Configuration Controls ....................................................... 11
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Description and Hardware
9
Block Diagram
1.1
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Block Diagram
USB
3.3 V
Reg.
USB
+15 V
-15 V
SW102
GND
Address or HW Control
GND
USB Mode Control Interface to PC
+5 V
Figure 1-1 shows a block diagram of the DEM-DAI1789, which consists of the DEM-DAI/DAC_USB and
the DEM-PCM1789 (the DUT daughterboard).
+5 V
2
(I C / SPI)
S/PDIF Audio Interface Receiver
Jumper
SCKI
OPT
DIR
LRCK
Coax
L-Ch
BCLK
DAI
Buffer
DIR9001
and
Logic
DATA
DAC
PCM1789
R-Ch
DEM-PCM1789
Daughtercard
HDR301
SW201
2nd-order LPF
OPA2134
fC = 57 kHz
Left Channel
2nd-order LPF
OPA2134
fC = 57 kHz
Right Channel
DEM-DAI/DAC_USB
Motherboard
Mode Control Select
SCLK, Format Control
Figure 1-1. DEM-DAI1789 Block Diagram
1.1.1 Electrostatic Discharge Warning
Many of the components on the DEM-DAI1789 EVM are susceptible to damage by electrostatic discharge
(ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling
the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
CAUTION
Failure to observe ESD handling procedures may result in damage to EVM
components.
10
Description and Hardware
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1.2
Basic Connections and Operation
Basic Connections and Operation
Follow these procedures to configure the DEM-DAI1789 for use.
• Set/confirm HDR001/101, JP101/2, and SW102 to set the proper EVM power configuration and mode
control interface for the PCM1789.
• Set/confirm HDR202/203 and SW203 to provide the proper system clock and other signals from the
digital audio receiver to the PCM1789.
• Set/confirm jumper JP401-408 to select the interface type (differential or single-ended, ac- or
dc-coupling) between the DAC outputs and the second-order low-pass filter (LPF) buffer.
• Set/confirm HDR302 to select the PCM1789 mode control type. No change from the default setting is
required for general evaluation purposes.
• Connect the +5-V and ±15-V power supplies to VCC, AVCC, –AVCC, and GND on connectors CN001 to
CN005.
• Connect the S/PDIF signal into CN201 (COAX) or U201 (OPT), and connect the PC USB port to
CN101 for mode control if required.
• Set/confirm the input data clock and format using SW201, SW102 (hardware control) or the EVM
control software (software SPI™ or I2C™ control) and power on to EVM.
1.3
EVM Configuration Controls
This section presents the standard parameters for the EVM. For normal operation, configure the EVM as
discussed here.
1.3.1 HDR001
This header selects the power-supply source for the control and DIR blocks of the EVM.
• 1–2: Use the power supply provided on CN004/5 (default)
• 2–3: Use a separate power supply provided on 2-3 of HDR001
No change from the default setting is required for general evaluation purposes.
1.3.2 HDR101
HDR101 selects the power-supply configuration of the USB Interface block.
• SELF: Use the EVM power supply for the USB Interface block (default)
• BUS: Use the PC power supply provided via a connected USB cable
No change from the default setting is required for general evaluation purposes.
1.3.3 JP101
This jumper enables the pull-up resistors for the I2C control mode.
• ON: Enables two 1-kΩ pull-up resistors (one each for SCL and SDA) (default)
• OFF: Disables pull-up resistors (for hardware control mode)
No change from the default setting is required except when using hardware control mode.
1.3.4 JP102
JP102 enables a software control signal to be sent via USB to the DUT (PCM1789) according to the mode
control selection of HDR302.
• ON: Enables signal to be sent to DUT in either SPI or I2C control mode (default)
– SPI mode: 1-2,5-6,7-8: ON, 3-4: OFF for ADR5 by SW102.
– I2C mode: 1-2,5-6: ON, 3-4,7-8: OFF for ADR1/0 by SW102.
• OFF: Disables the signal to be sent to DUT in hardware control mode
No change from the default setting is required except when using hardware control mode.
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EVM Configuration Controls
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1.3.5 CN102
CN102 enables the test and write interface for U104; it is not used in any customer application. Always
keep this connector open.
1.3.6 SW101
This switch resets the USB Interface (U102) and Mode Control Interface (U104) operation.
1.3.7 SW102
SW102 enables the user to set (or reset) the address for SPI/I2C mode, if required, and the control signal
for hardware control mode. These functions are defined for the PCM1789; the default setting is OFF.
• 1–8: ADR5(SPI)/ADR1(I2C)/OFF(H/W) (PCM1789, pin 24)
• 2–7: OFF(SPI)/OFF(I2C)/DEMP(H/W) (PCM1789, pin 21)
• 3–6: OFF(SPI)/OFF(I2C)/FMT(H/W) (PCM1789, pin 22)
• 4–5: OFF(SPI)/ADR0(I2C)/OFF(H/W) (PCM1789, pin 23)
No change from the default setting is required except when using hardware control mode.
1.3.8 HDR202 (with HDR203, CN204 and CN205)
The DEM-DAI1789 supports a flexible PCM audio interface through a DAI bridge, so that the PCM1789
can interface with external devices or equipment in place of the DIR9001 digital receiver through an
internal buffer. Interfacing with external components or devices can be done by changing the HDR202
connections of SCKI, BCK, LRCK, DATA, and GND from the left side setting to the right side setting, and
SCKI configuration for interfacing with external can be also changed by using HDR203, CN204, and
CN205. There is no change required from the default setting for general evaluation.
1.3.9 SW201
SW201 selects the system clock rate and format for U203, the DIR9001 digital receiver. Table 1-1 and
Table 1-2 list the system clock rate selection and data format selection options, respectively, for the
DIR9001 (U203).
Table 1-1. SW201: System Clock Rate Selection for DIR9001
PSCK1
PSCK0
On (H)
On (H)
512 fS (Default)
System Clock Selection
On (H)
Off (L)
384 fS
Off (L)
On (H)
256 fS
Off (L)
Off (L)
128 fS
Table 1-2. SW201: Data Format Selection for DIR9001
12
FMT1
FMT0
On (H)
On (H)
16-bit to 24-bit, MSB-first, I2S™ format
(default)
On (H)
Off (L)
16-bit to 24-bit, MSB-first, left-justified
format
Off (L)
On (H)
24-bit, MSB-first, right-justified format
Off (L)
Off (L)
16-bit, MSB-first, right-justified format
Description and Hardware
Data Format Selection
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EVM Configuration Controls
1.3.10 SW202
This switch selects the S/PDIF input signal for U203.
• OPT: Selects the optical input (default)
• COAX: Selects the coaxial input
1.3.11 SW203
This switch selects the operating mode for U203.
• X'tal: Always output the XTI clock source
• PLL: Always output the recovered clock by PLL
• AUTO: Automatic clock selection by ERROR status (default)
1.3.12 SW204
SW204 resets the DIR (DIR9001) operation.
1.3.13 HDR301
This header selects the input clock and data for DSD signal.
• 1–2: Input terminal for DSD-L signal
• 3–4: Input terminal for DSD-R signal
• 5–6: Input terminal for DSD-BCK signal
• 7–8: Input terminal for DSD-SCK signal
No change from the default setting is required for general evaluation purposes.
1.3.14 HDR302
This header selects the mode control of the PCM1789.
• 1–2 (I2C): Software (I2C) control mode
• 3–4 (P/D): Hardware control mode
• 5–6 (P/U): Software (SPI) control mode with ADR6 = 0 (default)
• 7–8 (SPI): Software (SPI) control mode with ADR6 = 1
Either one of these four options must be selected before powering on the EVM; no change from the
default setting is required for general evaluation purposes.
1.3.15 SW301
SW301 resets the DUT (PCM1789) operation.
1.3.16 SW302
This switch controls the AMUTE (Analog Mute) function.
1.3.17 JP401/405 (6–4)
These jumpers control the signal flow from the DUT to the post low-pass filter/buffer.
• Open: Differential interface (default)
• Short: Single-ended interface
No change from the default setting is required for general evaluation purposes.
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EVM Configuration Controls
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1.3.18 JP402/406 (1–2, 3–4)
These jumpers control the signal flow from the DUT to the post low-pass filter/buffer.
• Open: AC coupling (default)
• Short: DC coupling
No change from the default setting is required for general evaluation purposes.
1.3.19 JP403/404/407/408
These jumpers select the interface type for the DUT to the post low-pass filter/buffer.
• Open: Differential interface (default)
• Short: Single-ended interface
No change from the default setting is required for general evaluation purposes.
14
Description and Hardware
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Chapter 2
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Application Software
This chapter describes the functions and use of the DEM-DAI1789 EVM application software. The
software provided with the DEM–DAI1789 allows programming of the PCM1789 internal registers. The
software operates on computers that are equipped with Microsoft® Windows® 2000 and XP operating
systems, and requires connection of the USB port to CN101 of the DEM–DAI1789 using a standard USB
cable.
Topic
2.1
2.2
2.3
..................................................................................................
Page
Description and Installation ........................................................ 16
Software Start-up Procedure ...................................................... 16
Using the Application Software................................................... 17
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Application Software
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Description and Installation
2.1
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Description and Installation
Download the following software tools and documentation from the PCM1789 product folder on the TI web
site.
• Virtual COM port driver software (that is, the USB driver software) for the TUSB3410.
• Application software for the DEM-DAI1789
1. Installation Procedure for Virtual COM Port Driver Software
Refer to the documentation in the downloaded file (Virtual COM Port Driver Installation Instructions.pdf;
also available at http://focus.ti.com/docs/toolsw/folders/print/tusbwinvcp.html)
2. Installation Procedure for Application Software
There is no installer software required. Copy the downloaded application software folder to the desired
local folder. To uninstall the software, delete the local folder.
2.2
Software Start-up Procedure
Note:
Step 1.
Step 2.
Step 3.
Step 4.
This procedure is very important in order for the DEM-DAI1789 to be properly detected by
the PC.
Set HDR302 on the DEM-DAI1789 for SPI mode with ADR6 = 0. (If you prefer to use SPI
mode with ADR6 = 1 or I2C mode, set HDR302 to the required position.)
Turn on the power supply for the DEM-DAI1789.
Connect the USB connector on DEM-DAI1789 to the PC.
Launch the application software ( that is, EVM1789.exe). The default control mode for the
application software is SPI with address 00; if you prefer to use I2C mode or another address,
change the control mode setting to I2C or the address (respectively), and then push the
Reconnect button on the application software interface. After that, the preferred setting is
stored on the PC for both the DEM-DAI1789 and the software.
Error Message at Software Start-up
If the DEM-DAI1789 is not correctly detected by the application software, the error message shown in
Figure 2-1 appears on the PC. After pushing OK, the application software will launch with an indication
of No EVM in red, and controlling the DEM-DAI1789 is impossible. In this case, check the USB
connection between the DEM-DAI1789 and the PC, and the power-supply connection and voltage;
unplug and reconnect these cables as needed, then try launching the software again by pushing the
Reconnect button.
Figure 2-1. Error Message at Software Start-up
16
Application Software
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2.3
Using the Application Software
Using the Application Software
This section discusses the various controls available in the application software using screenshots and
describing the possible control functions for each tab.
For evaluation of PCM1789 audio performance with EVM default conditions settings, no application
software operation and no switch, jumper, or header setting changing on the EVM are required. This
application software is used to control the register contents of the PCM1789 to various values necessary
for a given application.
The PCM1789 operating mode, including the audio interface format and sampling mode, can be set
through the serial control port by this PCM1789 control application software in either I2C or SPI control
mode.
The application software is not required for PCM1789 hardware control mode. Switch SW102 on the EVM
is used for limited functions in hardware control mode.
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Application Software
17
Using the Application Software
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2.3.1 Audio Interface and Sampling Mode Control (SPI Mode)
Figure 2-2 shows the audio interface and sampling mode control tab for SPI mode.
Figure 2-2. Audio Interface and Sampling Mode Control Tab—SPI Mode Recognized
This screen has the following features:
• This tab is the initial window that appears, and indicates that the USB connection with the PC and the
EVM is properly recognized; it also shows that SPI serial control is the interface mode.
• PCM1789 audio interface mode and oversampling mode can be set in this window.
Additionally, four important controls are visible in Figure 2-2.
Reconnect
This button performs a reconnect operation between the PC and the EVM. When the interface mode
(either I2C or SPI) or the address for I2C and SPI changes, pushing this button is required. For system
recovery after releasing the USB cable or turning off the EVM power supply, pushing this button is also
required.
Exit
This button closes and exits the application software.
MRST (Mode Register Reset)
The MRST button resets all PCM1789 register settings and the application software.
SRST (System Reset)
The SRST button resynchronizes the PCM1789. The register setting is not cleared.
18
Application Software
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Using the Application Software
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2
2.3.2 Audio Interface and Sampling Mode Control (I C Mode)
Figure 2-3 illustrates the audio interface and sampling mode control tab for I2C mode.
Figure 2-3. Audio Interface and Sampling Mode Control Tab—I2C Mode Recognized
As with SPI mode (see Section 2.3.1), this initial display screen confirms proper a USB connection with
the PC and the EVM, as well as indicates that I2C serial control mode is properly recognized.
In both SPI and I2C modes, there is an additional control that becomes active:
Address Setting
This field sets the SPI port address and I2C slave address for the software. This address must concur
with the address registered on the EVM. In other words, the SPI and I2C address of the EVM and the
software must be the same.
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Application Software
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Using the Application Software
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2.3.3 USB Connection and EVM Not Recognized
Figure 2-4 displays the audio interface and sampling mode control tab as it appears when the USB
connection with the PC and the EVM and/or serial control mode is not properly recognized. Note the red
No EVM button.
Figure 2-4. Audio Interface and Sampling Mode Control Tab—USB Connection and EVM Not Recognized
Troubleshooting
If there is no change after pushing Reconnect button, the following items should be checked:
q Are the power supplies correctly distributed for the EVM?
q Is the EVM properly connected to the PC?
q Is the USB port on the PC activated?
q Is the Virtual COM port driver software (that is, the USB driver software) correctly installed on the PC?
q Is the selection of SPI/I2C control mode coincident between the application software and the EVM
setting for the PCM1789?
q Is the device address the same for the application software and the EVM setting on the PCM1789?
If you have thoroughly reviewed these procedures and there continues to be no change with the No
EVM indication, contact the Texas Instruments product support center nearest you for assistance.
20
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2.3.4 Operation Mode Control
The operation mode control tab is shown in Figure 2-5.
Figure 2-5. Operation Mode Control Tab
This tab has the following features:
• Power-Save Mode
• De-emphasis
• Digital filter roll-off
• Polarity (phase) between input and output
As illustrated in Figure 2-5, these features can be controlled for both left and right channels.
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2.3.5 Digital Attenuation and Soft Mute Control
Figure 2-6 shows the digital attenuation and soft mute control tab.
Figure 2-6. Digital Attenuation and Soft Mute Control Tab
Digital attenuation can be controlled for each channel by either changing the slider location or directly
entering a target number in 0.5- or 1-dB increments.
• Soft mute on or off using digital attenuation can be also controlled for each channel; operation of digital
attenuation control is ignored while the mute is on.
• Choose between Fine or Wide digital attenuation mode (fine control extends to 63 dB with 0.5-dB
steps; wide control covers a 100-dB range with 1.0-dB steps),
22
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2.3.6 Zero Flag Control and Monitor
Figure 2-7 shows the zero flag control and monitor tab.
Figure 2-7. Zero Flag Control and Monitor Tab
Both the function and the signal polarity of the zero flag pins (PCM1789 pins 19 and 18) can be controlled,
as well as the selection of the Zero Flag function or AMUTEO Function for the ZERO2 pin. The status of
zero input detection is updated by channel when a Read command is performed; a zero flag indication is
cleared by pushing the Clear button.
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2.3.7 Analog Mute Function Control
Figure 2-8 illustrates the analog mute function control tab.
Figure 2-8. Analog Mute Function Control Tab
This window enables the user to select a source event for the analog mute control function of the
PCM1789. Four source events can be selected independent of each other:
• SCKI lost
• Asynchronous clocks
• ZERO1 or ZERO2 detection
• DAC disable command
24
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2.3.8 Register Setting History, Register Direct Access
The Register Setting History and Register Direct Access area of the software interface is shown in
Figure 2-9.
Figure 2-9. Register Setting History, Register Direct Access Area
Register Setting History
The register setting history is shown as Register Address, Register Data in hexadecimal. This history
can be downloaded as a comma-separated value (.csv) file by pressing the Save button. An upload
function is also available from the File menu. The Clear button clears this history.
Register Direct Access
Both read and write functions (read and write any data to or from any address) are available.
Open Script from File Menu
This menu uploads a previously saved register setting snapshot from a stored .csv file.
Save Register Snapshot from File Menu
This menu downloads a register setting snapshot in .csv file format. The saved register setting
snapshot can then be uploaded by the File/Open Script command.
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Using the Application Software
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2.3.9 Register Contents View
Figure 2-10 illustrates a view of the register contents. This option shows all registers of the PCM1789 in a
register map format.
Figure 2-10. Register Contents View
The Register View window has three options (available in the application software):
Open Register View Window
Select Tools → Register Map. This window indicates latest entire register settings of PCM1789.
Register View Window Color Indicators
Green shaded cells (as shown in Figure 2-10) indicate a register value of '1'. White shaded cells
indicate a register value of '0'.
Register View Window Operation
After updating a register setting for the PCM1789 through the application software, the update is
reflected in this register view.
26
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Chapter 3
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Typical Performance and Example Data
This chapter presents typical PCM1789 performance and example measurement data when measured
with the DEM-PCM1789.
Topic
3.1
3.2
..................................................................................................
Page
Typical Performance Data .......................................................... 28
Example Measurement Data ....................................................... 29
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Typical Performance and Example Data
27
Typical Performance Data
3.1
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Typical Performance Data
This section illustrates baseline PCM1789 performance on the DEM-PCM1789 with the default
configuration. These data include typical performance versus sampling rate and system clock, and FFT
results for full-scale, –60 dB, –120 dB, and bipolar zero at 48 kHz/512 fS. As a result of a performance
limitation of the differential to single-ended converter followed by the PCM1789 output, the reading
performance is shown with 1-dB to 1.5-dB degradation in dynamic range, signal-to-noise ration (SNR),
and channel separation.
3.1.1 Typical Performance vs Sampling Rate and System Clock
Figure 3-1 shows typical PCM1789 performance versus the sampling rate and system clock.
PCM1789 PERFORMANCE vs
fS and fSCK CONDITIONS
110
0.4
Dynamic Range
Ch Sep
SNR
0.2
105
Gain Error
Gain Error (dB)
THD+N, Dynamic Range,
SNR and Channel Separation (dB)
115
0
-0.2
100
THD+N
-0.4
95
48 kHz/512 fS
96 kHz/256 fS
192 kHz/128 fS
fS and fSCK Conditions
Figure 3-1. Typical Performance vs fS and fSCK
28
Typical Performance and Example Data
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Example Measurement Data
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3.2
Example Measurement Data
Figure 3-2 through Figure 3-5 show the dynamic performance of the PCM1789 in a variety of FFT graphs.
3.2.1 FFT: 0-dB Output
Left Channel
Right Channel
20
100
1k
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
dBrB
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
dBrB
dBrA
PCM1789 DYNAMIC PERFORMANCE
(0-dB OUTPUT)
10k 20k
Frequency (Hz)
Figure 3-2. FFT (0 dB)
3.2.2 FFT: –60-dB Output
dBrA
PCM1789 DYNAMIC PERFORMANCE
(-60-dB OUTPUT)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
Left Channel
Right Channel
20
100
1k
10k 20k
Frequency (Hz)
Figure 3-3. FFT (–60 dB)
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29
Example Measurement Data
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3.2.3 FFT: –120-dB Output
Left Channel
Right Channel
20
100
1k
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
dBrB
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
dBrB
dBrA
PCM1789 DYNAMIC PERFORMANCE
(-120-dB OUTPUT)
10k 20k
Frequency (Hz)
Figure 3-4. FFT (–120 dB)
3.2.4 FFT: Bipolar Zero Output
dBrA
PCM1789 DYNAMIC PERFORMANCE
(BIPOLAR ZERO OUTPUT)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
Left Channel
Right Channel
20
100
1k
10k 20k
Frequency (Hz)
Figure 3-5. FFT of BPZ Output
30
Typical Performance and Example Data
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Chapter 4
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Schematics and Printed Circuit Board Layouts
This chapter presents the schematics, printed circuit board (PCB) layouts, and bills of material (BOMs) of
the DEM-DAI/DAC_USB and the DEM-PCM1789.
Topic
4.1
4.2
4.3
4.4
..................................................................................................
DEM-DAI/DAC_USB Schematics .................................................
DEM-PCM1789 Schematic (DUT Daughtercard) .............................
Printed Circuit Board Layouts ....................................................
Bills of Material (BOMs) .............................................................
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Page
32
37
38
44
Schematics and Printed Circuit Board Layouts
31
DEM-DAI/DAC_USB Schematics
4.1
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DEM-DAI/DAC_USB Schematics
4.1.1 DEM-DAI/DAC_USB Power Supply
The power-supply section is shown in Figure 4-1.
CN005
GND
CN004
VCC
CN003
-AVCC
CN002
GND
CN001
+AVCC
D002
D2S6M
D001
D2S6M
C003
100u/16V
C002
100u/16V
C001
100u/16V
1
D003
D2S6M
2
VCC 5V
GND
VCC DUT
GND
VDD DUT
VIN
VOUT
TAB
C005
10u/16V
2
GND
C006
0.1u
U001
REG1117
3
1
TAB
VDD 3.3V
VIN
GND
VOUT
2
1
C007
10u/16V
U002
REG1117
3
3
HDR001
C004
0.1u
-AVCC
GND
+AVCC
GND
Figure 4-1. Power-Supply Section
32
Schematics and Printed Circuit Board Layouts
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DEM-DAI/DAC_USB Schematics
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4.1.2 DEM-DAI/DAC_USB USB and MCU
The USB and MCU section is illustrated in Figure 4-2.
3
VDD 3.3V
1
8
6
4
2
6
7
8
7
5
1
2
4
3
4
5
2
X101
12.000MHz
GND
RA106
47k x 4
1
GND
4 3
Q101
DTC143ESA
SW102
DSS104
RA105
1k x 2
U101
TPS76933
GND
2
4
GND NC/FB
GND
R101
1.5k
C103
1u
EN
2 1
2
3
C101
0.1u
5
OUT
3
C102
1u
L101
MPZ2012S331A
IN
1
1
3
Vbus
DM
DP
JP103
CN101
USB_TYPE-B
1
2
3
4
GND
1
2
HDR101
JP101
MS/ADR
C108
22p
C107
22p
MC/SCL
MDI/SDA
C109
0.1u
MDO
GND
2A
2Y
8
6
7
28
4
5
29
18
17
P1.5
P1.6
19
P1.7
P2.0
20
21
P2.1
22
P2.2
P2.3
25
23
24
P2.4
P2.5/Rosc
26
P2.6
27
P2.7
P3.0
15
14
13
12
11
10
9
C115
22p
8
7 X102
32.768kHz C114
22p
6
5
4
3
2
1
64
63
62
61
60
5
59
P5.5
6
16
AVcc
DVcc
DVss
P5.4
AVss
P6.3
P6.2
P5.3
P6.1
P6.4
P6.0
P5.2
RST
P6.5
TCK
P6.6
P5.1
49
1Y
VCC
P3.1
P5.0
GND
4
GND
U103
SN74LVC2G14
14
12
GND
C112 C113
0.1u 1u
10
GND
1A
3
P6.7
8
4
3
SW101
SKHH_SW
3
1
VREF+
P4.7
6
2
1
2
XIN
P4.6
2
1
C110
10u/16V
31
P4.5
R105
10k
R104
470
XOUT
U104
MSP430F169IPM
TMS
48
C111
0.1u
R103
47k
P4.4
4
D102
1SS133
VeREF+
57
47
VeREF-
P4.3
56
46
P4.2
58
45
P1.0
TDI
7
5
3
1
7
5
3
1
3
1
44
RA104
10k x 4
P4.1
55
43
P1.1
TDO
8
6
4
2
8
6
4
2
4
2
42
P4.0
XT2IN
39
GND
P1.2
54
38
P1.3
P3.7
XT2OUT
37
P1.4
P3.6
53
17
P3.5
52
36
41
RA103
10k x 4
30
2
18
P3.2
32
35
P5.7
34
19
P5.6
33
20
P3.3
P3.4
22
21
40
RA102
10k x 2
100k
50
-RI/CP
-DCO
SIN
23
16
15
GND
-DSR
GND
24
51
26
27
28
25
Vcc
X2
X1
30
29
P3.4
P3.3
DM
9
GND
GND
SOUT
14
8
GND
-RTS
DP
-CTS
7
PUR
-WAKEUP
D101
TLSU124
-DTR
U102
TUSB3410VF
SCL
6
CLKOUT
Vdd18
12
5
TEST0
Vcc
11
0.1u
SUSPEND
13
0.1u
4
P3.1
32
C106
R106
JP102
TEST1
SDA
3
C105
R102
2.2k
-RESET
2
-VREGEN
10
3
1
1
C104
1u
P3.0
RA101
33 x 2
31
4
2
GND
13
9
11
7
5
3
1
CN102
DIR9001_MC
DIR9001_MD
DIR9001_MS
To DIR SECTION (Ref No.2)
Figure 4-2. USB and MCU Sections
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Schematics and Printed Circuit Board Layouts
33
DIR9001_MD
C202
C201
0.1u 10u/16V
GND
R201
75
R203
2.2k
R202
CN201 C203 47k
RCA PJ 0.1u
GND
OUT 1
U201
TORX141
3
2
1
2Y
VCC
1Y
U202
SN74LVC2GU04
2A
GND
1A
C204
0.1u
4
5
6
From MCON SECTION (Ref No.1)
GND
2
Vcc
3
6
5
C207
18p
R205
330
C206
0.1u
470
R204
GND
COAX
OPTICAL
R206
*
GND
SW204
SKHH_SW
D204
1SS133
SW202
FT1D-2M
CN202
C208
18p
X201
24.576MHz
C205
10u/16V
D201
TLGU53D
GND
5 PSCK0
4
L
6 PSCK1
3
H
7 FMT0
2
SW201
DSS104
1
8 FMT1
4
3
JP201
1
2
R211
470
R210
47k
1
3
DIR9001_MS
2
4
Schematics and Printed Circuit Board Layouts
11
12
BCK
DOUT
14
GND
C213
10u/16V
10
LRCK
13
9
CLKST
8
7
6
5
4
FSOUT1
SCK
2
3
FSOUT0
1
3
2
1
1Y
2Y
VCC
C214
0.1u
RSV
RXIN
RST
FILT
AGND
VCC
FMT0
FMT1
ERROR
CKSEL
6
4
5
COUT
UOUT
EMPH
BFRAME
VDD 3.3V
U204
SN74LVC2G14
2A
GND
1A
PSCK1
PSCK0
DOUT
BCKO
LRCKO
CLKST
XTI
XTO
DGND
VDD
SCKO
FSOUT1
FSOUT0
AUDIO
U203
DIR9001
GND
GND
GND
6
FSOUT1
2
CN203
7
5
4
COUT
FSOUT0
3
2
1
UOUT
BFRAME
CLKST
C212
0.068u
GND
2.2k
D202
TLSU124
R207 ERROR
GND
DOUT
LRCK
BCK
SCK
HDR201
GND
R215
33
R213
33
R214
33
R212
33
From CONNECTOR SECTION (Ref No.3)
SCKO
D203
TLOU124
R209
1.5k
UOUT
COUT
16
BFRAME
C211
0.0047u
R208
680
C209 C210
0.1u 10u/16V
SW203
FT1E-2M X'tal
PLL
AUTO
15
17
18
19
20
21
22
23
24
25
26
27
28
TP201
ERROR
1
3
10
U205
74LV541
GND
11
12
14
15
16
17
18
19
20
9
Vcc
13
GND
C215
0.1uF
8
7
6
5
4
3
2
1
JP202
VDD 3.3V
1
2
34
DIR9001_MC
CN204
GND
GND
19
16
13
10
7
4
1
U
HDR3X7
GND
3
2
6
5
9
8
12
11
15
14
18
17
21
20
SCKI
TO CONNECTOR SECTION (Ref No.3)
DATA
TO CONNECTOR SECTION (Ref No.3)
LRCK
BCK
TO CONNECTOR SECTION (Ref No.3)
DEM-DAI/DAC_USB Schematics
www.ti.com
4.1.3 DEM-DAI/DAC_USB DIR
Figure 4-3 shows the DIR section.
Figure 4-3. DIR Section
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4.1.4 DEM-DAI/DAC_USB Interface to DUT Board
Figure 4-4 illustrates the interface to DUT board section.
VDD 3.3V
VDD DUT
D301
1SS133
1
2
1
R302
470
2
C301
10u/16V
4
SW301
SKHH_SW
3
VCC DUT
C302
0.1u
R301
47k
GND
3
1A
GND
2A
1Y
VCC
2Y
1
6
5
3
D302
TLGU53D
D303
TLGU53D
4
U301
SN74LVC2G14
GND
2
1
4
RA301
470
ZFLG1
VCC
ZFLG2
VCC
VDD
GND
VDD
GND
1
-AVCC
GND
GND
+AVCC
RST
GND
MDO
MDO
MDI/SDA
MDI
VOUTL-
VOUTL-
MC/SCL
MC
VOUTL+
VOUTL+
MS/ADR
ML
GND
GND
GND
D_SCK
VOUTR-
VOUTR-
SCKO
VOUTR+
VOUTR+
R303
33
R304
33
R305
33
R306
33
R307
33
R308
33
R309
33
SCKO
SCKI
BCK
LRCK
DATA
To ANALOG SECTION (Ref No.4)
SCKI
DSD_R
AVcc-
BCK
AVcc+
LRCK
DATA
GND
DSD_L
GND
CN301
CN302
6
8
7
10
4
5
GND
CN303
1
2
3
GND
1
To ANALOG SECTION (Ref No.4)
HDR301
VDD DUT
GND
I2C
WIDE
NARROW
R310
2
4
6
8
1
4 5
7
SPI
2 3
GND
47k
SW302
FT1D-2M
HDR302
RA302
220k
3
1
GND
C303
0.1u
GND
Figure 4-4. Interface to DUT Board Section
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35
DEM-DAI/DAC_USB Schematics
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4.1.5 DEM-DAI/DAC_USB LPF and Buffer
The LPF and buffer section is shown in Figure 4-5.
R405
7.5k
C406
470p
+AVCC
C407
10u/16V
VOUTL+
C401
10u/16V
R401
10k
R406
470
8
JP401
*
1
2
1
4
5
6
3
JP402
GND
1
2
3
4
4
VOUTL-
3
JP403
GND
C404
4700p
-AVCC
C408
10u/16V
GND
GND
R403
10k
R404
7.5k
C402
10u/16V
From CONNECTOR SECTION (Ref No.3)
PJ401
WHITE
U401
OPA2134
C403
4700p
R402
10k
JP404
GND
TP401
R408
47
2
R407
470
C405
470p
GND
GND
R413
7.5k
C414
470p
TP402
JP405
*
VOUTR+
1
2
3
4
5
6
C409
10u/16V
R409
10k
R414
470
6
7
VOUTR-
PJ402
RED
5
JP406
GND
R416
47
1
2
3
4
JP407
R410
10k
GND
C412
4700p
JP408
GND
U401
OPA2134
C411
4700p
GND
C410
10u/16V
From CONNECTOR SECTION (Ref No.3)
R411
10k
R412
7.5k
R415
470
GND
C413
470p
GND
Figure 4-5. LPF and Buffer Sections
36
Schematics and Printed Circuit Board Layouts
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DEM-PCM1789 Schematic (DUT Daughtercard)
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4.2
DEM-PCM1789 Schematic (DUT Daughtercard)
Figure 4-6 shows the DEM-PCM1789 schematic.
ZFLG1
1
ZERO1
1
ZERO2
ZFLG2
1
1
VDD
GND
1
BCK
2
DATA
3
4
RST
MDO
MDO
5
SCKI
6
MD/SDA
MDI
C001 C002
10u/16V 1u
MC/SCL
MC
MS/ADR
ML
8
9
GND
GND
C003
10u/16V
D_SCK
SCKO
SCKI
SCKI
DSD_R
BCK
BCK
7
LRCK
BCK
DIN
RST
ADR5/ADR1/RSV
MS/ADR0/RSV
MC/SCL/FMT
MD/SDA/DEMP
SCKI
MODE
VDD
ZERO1
DGND
ZERO2
VCC1
AMUTEI
VCOM
VCC2
C004 C005
10
AGND1
1u 10u/16V
VOUTL- 11
VOUTL-
GND
VOUTL+ 12
AGND2
VOUTR-
VOUTL+
VOUTR+
24
MDO
23
MS/ADR
22
MC/SCL
21
MD/SDA
GND
GND
NC
NC
20
NC
19
ZERO1
1 ZERO2
18
NC
2
VOUTLHDR001
17
VOUTL-
VOUTL+
VOUTL+
3
GND
16
GND
C006 C007
1u 10u/16V
15
GND
14
VOUTR-
VOUTR-
13
VOUTR+
VOUTR+
VOUTRVOUTR+
U001
PCM1789
NC
GND
AVcc-
LRCK
LRCK
AVcc+
DATA
DATA
DSD_L
VCC
VCC
VDD
LRCK
NC
20 20
GND
20
TP001 CN301
*
20
GND
CN302 TP002
*
GND
1
10
GND
1
10 10
1
CN303
GND
GND
MUTEI
MODE
NC
MUTEO
NC
NC
TP003
*
NC
NC
NC
Figure 4-6. DEM-PCM1789
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Schematics and Printed Circuit Board Layouts
37
Printed Circuit Board Layouts
4.3
www.ti.com
Printed Circuit Board Layouts
Note:
Board layouts are not to scale. These figures are intended to show how the board is laid out;
they are not intended to be used for manufacturing DEM-DAI1789 PCBs.
4.3.1 DEM-DAI/DAC_USB Silkscreen (Top)
Figure 4-7 shows the silkscreen plane, top layer image.
Figure 4-7. Silkscreen
38
Schematics and Printed Circuit Board Layouts
SBAU154 – April 2009
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Printed Circuit Board Layouts
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4.3.2 DEM-DAI/DAC_USB Top Layer
Figure 4-8 shows the top layer image of the board.
Figure 4-8. Top Layer
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Schematics and Printed Circuit Board Layouts
39
Printed Circuit Board Layouts
www.ti.com
4.3.3 DEM-DAI/DAC_USB Bottom Layer
Figure 4-9 shows the bottom layer image of the board.
Figure 4-9. Bottom Layer
40
Schematics and Printed Circuit Board Layouts
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Printed Circuit Board Layouts
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4.3.4 DEM-PCM1789 (DUT Daughterboard) Silkscreen
Figure 4-10 shows the silkscreen plane, top layer image for the DUT daughterboard.
Figure 4-10. Silkscreen
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Schematics and Printed Circuit Board Layouts
41
Printed Circuit Board Layouts
www.ti.com
4.3.5 DEM-PCM1789 (DUT Daughterboard) Top View
Figure 4-11 shows the top layer image for the DUT daughterboard.
Figure 4-11. Top Layer
42
Schematics and Printed Circuit Board Layouts
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Printed Circuit Board Layouts
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4.3.6 DEM-PCM1789 (DUT Daughterboard) Bottom View
Figure 4-12 shows the bottom layer image for the DUT daughterboard.
Figure 4-12. Bottom Layer
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Schematics and Printed Circuit Board Layouts
43
Bills of Material (BOMs)
4.4
www.ti.com
Bills of Material (BOMs)
Table 4-1 lists the BOM information for the DEM-DAI/DAC_USB board. Table 4-2 includes the BOM
information for the DEM-PCM1789 board.
Table 4-1. Bill of Materials: DEM-DAI/DAC_USB
Qty
Reference Designators
2
C207, C208
Chip Ceramic
Capacitor
18 pF, J
Murata
4
C107, C108, C114, C115
Chip Ceramic
Capacitor
22 pF, J
Murata
20
C004, C006, C101, C105, C106, Chip Ceramic
C109, C111, C112, C201, C203, Capacitor
C204, C206, C209, C214-C218,
C302, C303
Specification
Manufacturer Part No
Manufacturer
0.1 µF
GRM188B11E104KA01
Murata
1
C103
Chip Ceramic
Capacitor
1 µF
GRM188B11A105(K)
Murata
3
C102, C104, C113
Chip Ceramic
Capacitor
10 µF
GRM21BB31A106KA
Murata
4
C405, C406, C413, C414
Polypropylene
Capacitor
470 pF
APSF0100J471
NISSEI
5
C211, C403, C404, C411, C412
Polypropylene
Capacitor
4700 pF
APSF0100J472
NISSEI
1
C212
Polypropylene
Capacitor
0.068 µF
APSF0100J683
NISSEI
3
C110, C213, C301
Chip Tantalum
Capacitor
10 µF/16 V
ESVA1C106M
NEC TOKIN
5
C005, C007, C202, C205, C210
OS Capacitor
10 µF/16 V
16SS10M
Sanyo
6
C401, C402, C407-C410
Electrolytic Capacitor
10 µF/16 V
R0A-16V100M
ELNA
3
C001-C003
Electrolytic Capacitor
220 µF/25 V
R0A-25V221M
ELNA
11
R212-R215, R303-R309
Chip Resistor
33 Ω, D
RR0816
Susumu
2
R408, R416
Chip Resistor
47 Ω, D
RP0816
Susumu
1
R201
Chip Resistor
75 Ω, D
RR0816
Susumu
1
R205
Chip Resistor
330 Ω, D
RR0816
Susumu
R104, R204, R211, R302, R406, Chip Resistor
R407, R414, R415
470 Ω, D
RP0816
Susumu
8
44
Part Name, Type
2
R208, R209
Chip Resistor
680 Ω, D
RR0816
Susumu
2
R101, R311
Chip Resistor
1.5 kΩ, D
RP0816
Susumu
3
R102, R203, R207
Chip Resistor
2.2 kΩ, D
RP0816
Susumu
4
R404, R405, R412, R413
Chip Resistor
7.5 kΩ, D
RP0816
Susumu
7
R105, R401-R403, R409-R411
Chip Resistor
10 kΩ, D
RP0816
Susumu
5
R103, R202, R210, R301, R310
Chip Resistor
47 kΩ, D
RP0816
Susumu
1
R106
Chip Resistor
100 kΩ, D
RP0816
Susumu
1
RA101
Resistor Networks
33 Ω (x2)
CN1J2
KOA
1
RA301
Resistor Networks
470 Ω (x2)
CN1J2
KOA
1
RA105
Resistor Networks
1 kΩ (x2)
CN1J2
KOA
1
RA102
Resistor Networks
10 kΩ (x2)
CN1J2
KOA
1
RA302
Resistor Networks
220 kΩ (x2)
CN1J2
KOA
2
RA103, RA104
Resistor Networks
10 kΩ (x4)
CN1J4
KOA
1
RA106
Resistor Networks
47 kΩ (x4)
CN1J4
KOA
1
L101
Chip Ferrite Bead
MPZ2012S331A
TDK
3
D102, D204, D301
3
D001-D003
3
D201, D302, D303
LED
1
D304
LED
2
D101, D202
1
D203
1
Q101
Digital Transistor
Chip Diode
HSU119-E
Renesas
CMS05
Toshiba
Green
TLPGU1002A
Toshiba
Orange
TLOU1002A
Toshiba
LED
Red
TLSU1002A
Toshiba
LED
Yellow
TLYU1002A
Toshiba
DTC143E
ROHM
Diode
Schematics and Printed Circuit Board Layouts
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Bills of Material (BOMs)
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Table 4-1. Bill of Materials: DEM-DAI/DAC_USB (continued)
Qty
Reference Designators
1
U401
Op Amp
Part Name, Type
1
U206
Logic IC
3
U103, U204, U301
Logic IC
1
U202
Logic IC
1
U205
Logic IC
1
U203
IC
1
U104
1
Specification
Manufacturer Part No
Manufacturer
OPA2134PA
TI
Package: DCK
SN74LVC1T45
TI
Package: DCK
SN74LVC2G14
TI
Package: DCK
SN74LVC2GU04
TI
SN74LV541
TI
DIR
DIR9001
TI
IC
MCU
MSP430F169IPM
TI
U102
IC
USB
TUSB3410VF
TI
1
U101
IC
100 mA, 3.3 V
TPS76933
TI
2
U001, U002
Regulator IC
800 mA, 3.3 V
REG1117-3.3
TI
1
U201
TOSlink™
Receiver
TORX141
1
X101
Crystal Resonator
12.000 MHz
CX5032GB
KSS
1
X201
Crystal Resonator
24.576 MHz
CX5032GB
KSS
1
X102
Crystal Resonator
32.768 kHz
FC-135, 12.5pF
3
HDR001, HDR101, HDR203
TH-type Male
Connector
3-pin
FFC-3AMEP1
HTK
2
HDR301, HDR302
TH-type Male
Connector
8-pin
FFC-8BMEP1
HTK
1
HDR202
TH-type Male
Connector
21-pin
FFC-21NSM1
HTK
5
JP202, JP403, JP404, JP407,
JP408
TH-type Male
Connector
2-pin
FFC-2BMEP1
HTK
3
JP101, JP402, JP406
TH-type Male
Connector
4-pin
FFC-4BMEP1
HTK
1
JP201
TH-type Male
Connector
6-pin
FFC-6BMEP1
HTK
1
JP102
TH-type Male
Connector
8-pin
FFC-8BMEP1
HTK
1
CN203
TH-type Male
Connector
7-pin
FFC-7AMEP1
HTK
3
CN202, CN204, CN205
TH-type Male
Connector
2-pin
FFC-2BMEP1
HTK
1
CN102
TH-type Male
Connector
14-pin
FFC-14BMEP1
HTK
3
CN301-CN303
Connector
10-pin
XB-3-7-10P
Mac8
5
CN001-CN005
Banana Jack
Yellow, Green,
Blue, Red, Black
T-45
1
CN101
USB Connector type B
USB_TYPE-B
67068-8001
Molex
1
CN201
RCA Pin Jack
Yellow
LPR6520-0804
SMK
1
PJ402
RCA Pin Jack
Red
LPR6520-0802
SMK
1
PJ401
RCA Pin Jack
White
LPR6520-0803
SMK
2
SW102, SW201
DIP Switch
DSS104
Fujisoku
2
SW202, SW302
Toggle Switch
FT1D-2M
Fujisoku
1
SW203
Toggle Switch
FT1E-2M
Fujisoku
3
SW101, SW204, SW301
2
TP401, TP402
Test Pin
LC-2-G
Mac8
1
TP201
Test Pin
LC-4-G
Mac8
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Tact Switch
Toshiba
EPSON
Sato Parts
Alps
Schematics and Printed Circuit Board Layouts
45
Bills of Material (BOMs)
www.ti.com
Table 4-2. Bill of Materials: DEM-PCM1789
46
Qty
Reference Designators
3
C002, C004, C006
4
C001, C003, C005, C007
1
U001
1
HDR001
Part Name, Type
Chip Ceramic
Capacitor
Electrolytic
Capacitor
Specification
Manufacturer Part No
1 µF
GRM188B11A105(K)
Murata
10 µ/16 V
R3A-16V100M
ELNA
IC
DAC
PCM1789
TH-type Male
Connector
3-pin
FFC-3AMEP1
Schematics and Printed Circuit Board Layouts
Manufacturer
TI
HTK
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It is important to operate this EVM within the input voltage range of –4 V to +4 V and the output voltage range of –4 V to +4 V.
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