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Texas Instruments DRV601EVM2 - User guides
User's Guide
SLOU217 – March 2008
DRV601EVM2
This user’s guide describes the operation of the DRV601EVM2 stereo line driver evaluation module and
provides measurement data and design information such as the schematic, bill of materials, and
printed-circuit board layout.
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8
Contents
Overview ...................................................................................................................... 2
Quick Setup Guide........................................................................................................... 4
Shutdown ..................................................................................................................... 5
Component Selection ....................................................................................................... 5
Layout Recommendations .................................................................................................. 7
DRV601EVM2 Performance ............................................................................................... 8
Related Documentation from Texas Instruments ...................................................................... 19
Design Documentation .................................................................................................... 19
List of Figures
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23
DRV601EVM2 ................................................................................................................ 2
DRV601EVM2 Functional Block Diagram ................................................................................ 3
DRV601EVM2 Physical Structure ......................................................................................... 3
Power-Up/Down Sequence ................................................................................................. 5
Second-Order, Active Low-Pass Filter .................................................................................... 6
THD+N vs Voltage (Analog Input) ....................................................................................... 10
THD+N vs Voltage (Analog Input) Linear Scale........................................................................ 10
THD+N vs Voltage (Digital Input) ........................................................................................ 11
THD+N vs Voltage (Digital Input) Linear Scale ........................................................................ 11
THD+N vs Frequency (Analog Input) .................................................................................... 12
THD+N vs Frequency (Digital Input) ..................................................................................... 12
FFT Spectrum With –60-dBFS Tone (Analog Input)................................................................... 13
FFT Spectrum With –60-dBFS Tone (Digital Input) ................................................................... 13
Idle Noise FFT Spectrum (Analog Input) ................................................................................ 14
Idle Noise FFT Spectrum (Digital Input) ................................................................................. 14
Channel Separation (Analog Input) ...................................................................................... 15
Channel Separation (Digital Input) ....................................................................................... 15
Frequency Response (Analog Input) .................................................................................... 16
Frequency Response (Digital Input) ..................................................................................... 16
Pop/Click (Enable) ......................................................................................................... 17
Pop/Click (Disable) ......................................................................................................... 18
DRV601EVM2 PCB Component Placement Top ...................................................................... 23
DRV601EVM2 PCB Top and Bottom Layers ........................................................................... 23
List of Tables
1
2
3
4
DRV601EVM2 Specifications ..............................................................................................
Recommended Supply Voltage ............................................................................................
DRV601EVM2 Specification ................................................................................................
General Test Specifications ................................................................................................
2
5
6
8
PurePath Digital, DirectPath, FilterPro are trademarks of Texas Instruments.
TOSLINK is a trademark of Toshiba Corp..
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Overview
5
6
7
8
9
10
1
Electrical Data ................................................................................................................ 8
Audio Performance Analog Input .......................................................................................... 8
Audio Performance Digital Input ........................................................................................... 8
Physical Specifications ...................................................................................................... 9
DRV601EVM2 Parts List .................................................................................................. 21
PCB Specifications ......................................................................................................... 22
Overview
The DRV601EVM2 customer evaluation module (EVM) demonstrates the integrated circuits DRV601RTJ
from Texas Instruments (TI).
The DRV601 is a stereo line driver designed to allow the removal of the DC-blocking capacitors for
reduced component count and cost. The DRV601 is ideal for single-supply electronics where size and
cost are critical design parameters.
The DRV601 is capable of driving 2 Vrms into a 600-Ω load at 3.3-V supply. The DRV601 has external
gain-setting resistors that support a gain range of -1 V/V to -10 V/V and line outputs that have ±8 kV IEC
ESD protection. The DRV601 has independent shutdown control for the left and right audio channels.
This EVM is configured with one TOSLINK™digital audio S/PDIF connector, two RCA phono input
connectors, and two RCA phono output connectors. Power supply is connected via a two-pin 2,54-mm pin
header.
Table 1. DRV601EVM2 Specifications
KEY PARAMETERS
Supply Voltage
5V
Number of Channels
2
Load Impedance
Minimum 600 Ω
Output Voltage
2 Vrms
DYR
> 105 dB analog in, 98 dB digital in
This EVM is designed for evaluating applications such as set-top boxes and PDP/LCD televisions.
This document covers EVM specifications, audio performance measurements graphs, and design
documentation that includes schematics, parts list, and layout design.
Figure 1. DRV601EVM2
2
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Overview
Gerber (layout) files are available at the TI Web site.
1.1
DRV601EVM2 Features
•
•
•
•
•
Two-channel evaluation module [a double-sided, plated-through printed-circuit board (PCB) layout]
2-Vrms line output
Digital S/PDIF TOSLINK™ input
Output capacitor-less.
Shutdown button
Figure 2. DRV601EVM2 Functional Block Diagram
1.2
PCB Key Map
The physical structure of the DRV601EVM2 is shown in Figure 3.
Figure 3. DRV601EVM2 Physical Structure
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Quick Setup Guide
2
Quick Setup Guide
This section describes the DRV601EVM2 board in regards to power supply and system interfaces. It
provides information regarding handling and unpacking, absolute operating conditions, and a description
of the factory default switch and jumper configuration.
The following is a step–by–step guide to configuring the DRV601EVM2 for device evaluation.
2.1
Electrostatic Discharge Warning
Many of the components on the DRV601EVM2 are susceptible to damage by electrostatic discharge
(ESD). Customers are advised to observe proper ESD handling precautions when unpacking and handling
the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
CAUTION
Failure to observe ESD handling procedures may result in damage to EVM
components.
2.2
Unpacking the EVM
On opening the DRV601EVM2 package, ensure that the following items are included:
• 1 pc. DRV601EVM2 board with one DRV601RTJ
• 1 pc. PurePath Digital™ CD-ROM
If either of these items is missing, contact the Texas Instruments Product Information Center nearest you
to inquire about a replacement.
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Shutdown
2.3
Power Supply Setup
To power up the EVM, one power supply is needed. The power supply is connected to the EVM using a
2-pin, 2,54-mm pin header, J10.
Table 2. Recommended Supply Voltage
Description
Voltage Limitations
Power supply
5V
Current Requirement
Cable
0.25 A
CAUTION
Applying voltages above the limitations given in Table 2 may cause permanent
damage to your hardware.
3
Shutdown
For minimum click and pop during power on and power off, the shutdown pin should be kept low. The
preferred power-up/down sequence is shown in Figure 4.
DVDD
SHUTDOWN
> 50ms
> 50ms
Figure 4. Power-Up/Down Sequence
On the DRV601EVM2, the correct shutdown signal is provided by U95, a TPS3825-33 supply monitor.
4
Component Selection
4.1
Charge Pump
The charge pump flying capacitor, C13, serves to transfer charge during the generation of the negative
supply voltage. The PVSS capacitor must be at least equal to the charge pump capacitor in order to allow
maximum charge transfer. Low ESR capacitors are an ideal selection, and a value of 1 µF is typical.
Capacitor values smaller than 1 µF can be used, but the maximum output can be reduced. It is therefore
recommended to validate the design with thorough testing.
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Component Selection
4.2
Decoupling Capacitors
The DRV601 is a DirectPath™ line driver amplifier that requires adequate power supply decoupling to
ensure that the noise and total harmonic distortion (THD) are low. A good low equivalent-series-resistance
(ESR) ceramic capacitor, C12, typical 1 µF, placed as close as possible to the device VDD leads works
best. Placing this decoupling capacitor close to the DRV601 is important for the performance of the
amplifier. For filtering lower frequency noise signals, a 10-µF or greater capacitor placed near the audio
amplifier also helps, but is not required in most applications because of the high PSRR of this device.
The charge pump circuit does apply ripple current on the VDD line, and a LC or RC filter may be needed if
noise-sensitive audio devices share the VDD supply.
4.3
Using the DRV601 as a Second-Order Low-Pass Filter
Many of the audio DACs used today require an external low-pass filter, to remove band noise. This is
possible with the DRV601, and the EVM is configured as a 40-kHz, second-order, active Butterworth filter.
The topology chosen is the MFB Single-Ended. Further, the DRV601 needs a ac-coupling capacitor to
remove dc-content from the source.
R2
C1
R1
C3
R3
+
C2
Figure 5. Second-Order, Active Low-Pass Filter
The component values can be calculated with the help of the TI FilterPro™ program available on:
http://focus.ti.com/docs/toolsw/folders/print/filterpro.html
In Table 3, various proposals for the filter and gain settings can be found.
Table 3. DRV601EVM2 Specification
Gain
High Pass
Low Pass
C1
C2
C3
R1
R2
R3
–1 V/V
16 Hz
40 kHz
100 pF
680 pF
1 µF
10 kR
10 kR
24 kR
-1.5 V/V
19 Hz
40 kHz
68 pF
680 pF
1 µF
8.2 kR
12 kR
30 kR
-2 V/V
11 Hz
40 kHz
33 pF
330 pF
1 µF
15 kR
30 kR
47 kR
–2 V/V
11 Hz
30 kHz
47 pF
470 pF
1 µF
15 kR
30 kR
43 kR
–3.33 V/V
12 Hz
40 kHz
33 pF
470 pF
1 µF
13 kR
43 kR
43 kR
-10 V/V
15 Hz
30 kHz
22 pF
1 nF
2.2 µF
4.7 kR
47 kR
27 kR
The resistor values should be low value to get low noise, but should be high value to get a small size
ac-coupling capacitor. With the proposed values, 15k, 30k, and47k, a DYR of 105 dB can be achieved
with a small 1-µF input ac-coupling capacitor.
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Layout Recommendations
5
Layout Recommendations
5.1
Exposed Pad on the DRV601RJT Package
The exposed metal pad on the DRV601RTJ package can be soldered to a pad on the PCB in order to
improve reliability. The pad on the PCB should be allowed to float and not be connected to ground or
power. Connecting this pad to power or ground prevents the device from working properly because it is
connected internally to PVSS.
5.2
SGND and PGND Connections
The SGND and PGND pins of the DRV601 must be routed separately back to the decoupling capacitor in
order to provide proper device operation. If the SGND pins are connected directly to each other, the part
functions without risk of failure, but the noise and THD performance can be reduced.
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DRV601EVM2 Performance
6
DRV601EVM2 Performance
This section provides general test specifications, electrical data, audio performance data, and physical
specifications.
Table 4. General Test Specifications (1)
GENERAL TEST SPECIFICATIONS
NOTES
Supply Voltage
5V
600 Ω
Load Impedance
Input Signal
1-kHz Sine Digital audio TOSLINK™ S/PDIF
Measurement Filter
(1)
AES17
These test conditions are used for all tests, unless otherwise specified.
Table 5. Electrical Data (1)
ELECTRICAL DATA SPECIFICATIONS
NOTES/CONDITIONS
Output Voltage, 600 Ω
2 Vrms 1 kHz, unclipped (< 1% THD), TA = 25°C
Output Voltage, 100 kΩ
2.1 Vrms 1 kHz, unclipped (< 1% THD), TA = 25°C
Supply Current
< 10 mA 1 kHz, 2 m Vrms output voltage
Supply Current
< 20 mA 1 kHz, 2 m Vrms output voltage into 600 Ω
(1)
All electrical and audio specifications are typical values.
Table 6. Audio Performance Analog Input
AUDIO PERFORMANCE ANALOG INPUT
NOTES/CONDITIONS
THD+N, 600 Ω
0.02 Vrms
< 0.099 % 1 kHz (Noise-limited)
THD+N, 600 Ω
0.2 Vrms
< 0.009 % 1 kHz (Noise-limited)
THD+N, 600 Ω
2 Vrms
< 0.006 % 1 kHz
THD+N, 100 kΩ
0.02 Vrms
< 0.099 % 1 kHz (Noise-limited)
THD+N, 100 kΩ
0.2 Vrms
< 0.009 % 1 kHz (Noise- limited)
THD+N, 100 kΩ
2 Vrms
Dynamic Range
< 0.003 % 1 kHz
> 105 dB Ref: 2 Vrms, A-weighted, AES17 filter
< 12 µVrms A-weighted, AES17 filter
Noise Voltage
DC Offset
< 5 mV No signal, 600-Ω load
Channel Separation
> 97 dB 1 kHz, 2 Vrms
±1 dB 2 Vrms/600 Ω
Frequency Response: 20 Hz to 20 kHz
Table 7. Audio Performance Digital Input
AUDIO PERFORMANCE DIGITAL INPUT
0.02 Vrms
< 0.2 % 1 kHz (Noise-limited)
THD+N, 600 Ω
0.2 Vrms
< 0.02 % 1 kHz (Noise-limited)
THD+N, 600 Ω
2 Vrms
< 0.04 % 1 kHz
THD+N, 100 kΩ
0.02 Vrms
< 0.2 % 1 kHz (Noise-limited)
THD+N, 100 kΩ
0.2 Vrms
< 0.02 % 1 kHz (Noise- limited)
THD+N, 100 kΩ
2 Vrms
Dynamic Range
Noise Voltage
< 0.04 % 1 kHz
> 98 dB Ref: 2 Vrms, A-weighted, AES17 filter
< 25 µVrms A-weighted, AES17 filter
DC Offset
< 5 mV No signal, 600-Ω load
Channel Separation
> 75 dB 1 kHz, 2 Vrms
Frequency Response: 20 Hz to 20 kHz
8
NOTES/CONDITIONS
THD+N, 600 Ω
DRV601EVM2
±1 dB 2 Vrms/600 Ω
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DRV601EVM2 Performance
Table 8. Physical Specifications (1)
PHYSICAL SPECIFICATIONS
PCB Dimensions
Total Weight
(1)
NOTES/CONDITIONS
70 x 70 x 25 Width x Length x Height (mm)
40 g Components + PCB + Mechanics
All electrical and audio specifications are typical values.
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DRV601EVM2 Performance
6.1
THD+N vs Voltage (Analog Input)
THD+N - Total Harmonic Distortion + Noise - %
10
5
2
1
0.5
0.2
0.1
0.05
600 W
0.02
0.01
0.005
100 kW
0.002
0.001
3m
5m
10m
20m
50m
100m 200m
Voltage - V
500m
1
2
4
Figure 6. THD+N vs Voltage (Analog Input)
THD+N - Total Harmonic Distortion + Noise - %
The THD+N from 10 mVrms to approximately 0.5 Vrms is dominated by noise.
10
5
2
1
0.5
600 W
0.2
0.1
100 kW
0.05
0.02
0.01
0.005
0.002
0.001
200m 400m 600m 800m
1
1.2
1.4
Voltage - V
1.6
1.8
2
2.2
2.4
Figure 7. THD+N vs Voltage (Analog Input) Linear Scale
Here the THD+N versus output voltage is shown with linear scale. This makes it easier to see where
clipping occurs. Clipping is often defines as THD+N=1%.
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THD+N vs Voltage (Digital Input)
THD+N - Total Harmonic Distortion + Noise - %
6.2
Input = 1 kHz
10
5
2
1
0.5
0.2
0.1
600 W
0.05
0.02
0.01
100 kW
0.005
0.002
0.001
3m
5m
10m
20m
50m
100m 200m
Voltage - V
500m
1
2
4
Figure 8. THD+N vs Voltage (Digital Input)
THD+N - Total Harmonic Distortion + Noise - %
The THD+N in the range from 10 mVrms to 1 Vrms is completely dominated by noise. The THD+N is
independent of the load impedances and is set by the PCM1772 DAC.
10
Input = 1 kHz
5
2
1
0.5
0.2
0.1
600 W
0.05
0.02
0.01
100 kW
0.005
0.002
0.001
200m
400m
600m
800m
1
1.2
Voltage - V
1.4
1.6
1.8
2
Figure 9. THD+N vs Voltage (Digital Input) Linear Scale
Here the THD+N versus output voltage is shown with linear scale. This makes it easier to see where
clipping occurs. Clipping is often defined as THD+N = 1%.
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DRV601EVM2 Performance
THD+N vs Frequency
THD+N - Total Harmonic Distortion + Noise - %
6.3
10
Input = 2 Vrms
5
2
1
0.5
0.2
0.1
0.05
600 W
0.02
0.01
100 kW
0.005
0.002
0.001
20
50
100
200
500
1k
f - Frequency - Hz
2k
5k
10k
20k
Figure 10. THD+N vs Frequency (Analog Input)
THD+N - Total Harmonic Distortion + Noise - %
10
Input = 0 dBFs
5
2
1
0.5
0.2
0.1
600 W
0.05
0.02
0.01
100 kW
0.005
0.002
0.001
20
50
100
200
500
1k
2k
f - Frequency - Hz
5k
10k
20k
Figure 11. THD+N vs Frequency (Digital Input)
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DRV601EVM2 Performance
6.4
FFT Spectrum With –60 dBFS Tone
Reference voltage is 2 V rms. FFT size is 16k.
0
-10
-20
-30
Amplitude - dB
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
0
2k
4k
6k
8k
10k
12k
14k
f - Frequency - Hz
16k
18k
20k
22k
Figure 12. FFT Spectrum With –60-dBFS Tone (Analog Input)
0
-10
-20
-30
Amplitude - dBr
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
0
2k
4k
6k
8k
10k
12k
14k
16k
18k
20k
22k
f - Frequency - Hz
Figure 13. FFT Spectrum With –60-dBFS Tone (Digital Input)
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DRV601EVM2 Performance
6.5
Idle Noise FFT Spectrum
Reference voltage is 2 Vrms. FFT size is 16k.
0
-10
-20
-30
Amplitude - dBr
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
0
10k
20k
30k
40k
50k
60k
f - Frequency - Hz
70k
80k
90k
Figure 14. Idle Noise FFT Spectrum (Analog Input)
0
-10
-20
-30
Amplitude - dBr
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
0
10k
20k
30k
40k
50k
60k
f - Frequency - Hz
70k
80k
90k
Figure 15. Idle Noise FFT Spectrum (Digital Input)
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DRV601EVM2 Performance
6.6
Channel Separation
Output signal is 2 Vrms. Reference voltage is 2 Vrms. Load is 600R.
10
0
-10
0 dB
-20
Amplitude - dBr
-30
-40
Right to Left
-50
-60
-70
-80
-90
Left to Right
-100
-110
-120
10
20
50
100
200
500
1k
f - Frequency - Hz
2k
5k
10k
20k
10k
20k
Figure 16. Channel Separation (Analog Input)
10
0
-10
0 dB
-20
Amplitude - dBr
-30
-40
-50
Right to Left
-60
-70
-80
-90
Left to Right
-100
-110
-120
10
20
50
100
200
500
1k
f - Frequency - Hz
2k
5k
Figure 17. Channel Separation (Digital Input)
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DRV601EVM2 Performance
6.7
Frequency Response
Amplitude - dBr
Measurement bandwidth filter is set to 500 kHz. Load is 600R.
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
10
20
50
100 200
500 1k
2k
5k
f - Frequency - Hz
10k 20k
50k 100k 200k
Amplitude - dBr
Figure 18. Frequency Response (Analog Input)
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
10
20
50
100
200
500 1k
2k
5k
f - Frequency - Hz
10k
20k
50k 100k 200k
Figure 19. Frequency Response (Digital Input)
The low-frequency cutoff of 10 Hz (–3 dB) is determined by the input ac-coupling capacitor, 1 µF, together
with the feedback network input impedance of 15kR.
The low-pass, second-order filter implemented gives a –3 dB approximately at 35 kHz, and the response
is 13 dB down at 80 kHz.
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6.8
Pop/Click (Enable)
No input signal is applied. The measurement results are presented both in a time domain and in a
frequency domain. The resistor load is 600 Ω.
The power supply is applied, and then the shutdown signal is released. The shutdown signal is used to
trigger the measuring system. For a description of the measuring technique, see the application report
Pop and Click Measuring Technique (SLEA044).
100m
80m
60m
Voltage - V
40m
20m
0
-20m
-40m
-60m
-80m
-100m
-2m
-1m
0
t - Time - sec
1m
2m
+0
-10
-20
Amplitude - dBr
-30
-40
-50
-60
-70
-80
-90
-100
300
500
1k
2k
5k
f - Frequency - Hz
10k
20k 30k
Figure 20. Pop/Click (Enable)
The DRV601 shows low pop during enable; only two small high-frequency spikes can be seen. The
measurements are made with reference to 2 Vrms = 0 dB, 2 mV=-60 dBr.
6.9
Pop/Click (Disable)
No input signal is applied. The measurement results are presented both in a time domain and in a
frequency domain.
No input signal applied. Load: 600 Ω.
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DRV601EVM2 Performance
100m
80m
60m
Voltage - V
40m
20m
0
-20m
-40m
-60m
-80m
-100m
-2m
-1m
0
1m
2m
t - Time - sec
0
-10
-20
Amplitude - dB
-30
-40
-50
-60
-70
-80
-90
-100
300
500
1k
2k
5k
10k
f - Frequency - Hz
20k 30k
Figure 21. Pop/Click (Disable)
During power down, the click is even lower than during power on (enable). A small click is seen.
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Related Documentation from Texas Instruments
7
Related Documentation from Texas Instruments
The following is a list of documents containing detailed descriptions of the integrated circuits used in the
design of the DRV601EVM2.
1. DRV601, DirectPath™ Stereo Line Driver, Adjustable Gain data sheet (SLOS553)
2. DIR9001, 96-kHz, 24-Bit Digital Audio Interface Receiver data sheet (SLES198)
3. PCM1772, PCM1773, Low-Voltage and Low-Power Stereo Audio Digital-to-Analog Converter With
Lineout Amplifier data sheet (SLES010)
8
Design Documentation
This section includes a schematic for the DRV601EVM2, the bill of materials, and the PCB design
specifications.
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DRV601EVM2
19
2
1
J21
J22
4
3
2
1
4
3
2
1
5
4
3
PVSS
NC
C1N
GND
GND
+5V
GND
1
2
Header
1
2
C90
10uF
2
J10
1
C91
100nF
3
Power Supply
LEFT
Phono socket
Output
RIGHT
GND
Phono socket
C14
1uF
GND
1
2
21
PowerPAD
20
NC
2
2
19
IN
10R
R19
10R
R18
NC
6
17
1
1
U1
DRV601
PVDD
SVSS
7
GND
1
2
16
4
TLV1117-33C
OUT
OUT
U90
11
12
13
14
15
C92
100nF
+3.3V2
OUTR
NC
INL
/SDR
INR
+3.3V
GND
C93
10uF
1
C20
33pF
R15
47k
2
2
R16
33k
GND
SW90
Switch
C18
330pF
R12
15k
C17
330pF
R11
15k
1 2
1 2
C16
1uF
C15
1uF
2
J14
1 2
J13
1
3
1
3
1
GND
GND
J11
Phono socket
VOUTL
VOUTR
4
3
2
1
+3.3V
GND
C95
1nF
4
5
MR
VDD
TPS3825-33
RESET
GND
RESET
U95
3
2
1
GND
2
R96
10k
Layout note:
Do not ground the powerpad - keep it floating
Place C12-C13-C14 close to U10
Place R14-C19 close to pin 15
Place R15-C20 close to pin 13
1
/POR
1
Q95
R95
220R
D95
Green
+3.3V
High Pass filter: R11-C15 = R12-C16 aprox. 10Hz
Low Pass filter: 40kHz 2nd Order Butterworth
J12
Phono socket
Analog Input
4
3
2
1
Gain: = R16/R11 = R17/R12 = 2.2
R17
33k
2
GND
2
1
2
GND
10.0R
C96
10uF
+3.3V
GND
GND
C50
10uF
R50
4.7R
+3.3V
BCK
DATA
LRCK
C51
100nF
DATA
BCK
LRCK
MCLK
C62
47uF
DAC-PD
SPDIF
VOUTL
VOUTR
DAC
VOUTR
VCOM
AGND2
AGND1
PCM1773
DIR9001
PSCK1
PSCK0
DOUT
BCKO
LRCKO
C58
10uF
COUT
UOUT
EMPH
BFRAME
RSV
RST
RXIN
CLKST
FILT
AGND
VCC
FMT0
FMT1
ERROR
CKSEL
D50
Red
VOUTL
AIN
VCC2
VCC1
DEMP
AMIX
FMT
SCKI
XTI
XTO
DGND
VDD
SCKO
FSOUT1
FSOUT0
AUDIO
U50
8
7
6
5
PD
BCK
DATA
LRCK
U60
Unlock
TORX
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DAC-PD
GND
GND
GND
4
3
2
1
2
R56
MCLK
C60
10uF
1
1
GND
Q50
PMBT2222
2 1
5
4
3
2
1
NC
NC
VCC
GND
OUT
J50
/POR
R51
680R
C53
4.7nF
2
C54
10uF
GND
GND
1 1
+3.3V
R60
4.7R
+3.3V
R54
10k
C55
100nF
R55
1.0k
C61
100nF
C59
100nF
R58
4.7R
GND
2
1
GND
220R
+3.3V
15
16
17
18
19
20
21
22
23
24
25
26
27
28
9
10
11
12
13
14
15
16
1
2
1
AMP ON/OFF
1
C19
33pF
R14
47k
C12
1uF
1
1
2
18
/SDL
NC
8
NC
SGND
OUTL
9
SVDD
10
2
1
PGND
1
2
2
1
2
1
5
C1P
4
2
2
2
1
2
1
2
1
Shunt Header
Shunt Header
1
6
RIGHT
LEFT
C13
1uF
2
1
2
1
2
GND
3
1
2
1
2
3
2
1
2
1
2
R90
PMBT 2222
1
2
2
1
1
1 2
2
C52
68nF
2
2
1
GND
R52
4.7R
+3.3V
R53
4.7R
2
/POR
1
2
1
3 2
2
1
2
1
2
2
DRV601EVM2
Toslink Optical Receiver
+3.3V2
20
1
DRV601EVM2 Schematic
1
8.1
Digital Input
Line Driver
www.ti.com
Design Documentation
SLOU217 – March 2008
Submit Documentation Feedback
Power
www.ti.com
Design Documentation
8.2
Parts List
Table 9. DRV601EVM2 Parts List
Qty
Part
Reference
Description
Manufacture
First Mfr P/N
1
R90
10.0R / 250mW / 1% / 1206 Thick Film Resistor
Yageo
RC1206FR-0710RL
1
R55
1.0k / 100mW / 5% / 0603 Thick Film Resistor
Yageo
RC0603JR-071KL
2
R54 R96
10k / 100mW / 5% / 0603 Thick Film Resistor
Yageo
RC0603JR-0710KL
2
R18 R19
10R / 100mW / 5% / 0603 Thick Film Resistor
Yageo
RC0603JR-0710RL
2
R11 R12
15k / 100mW / 5% / 0603 Thick Film Resistor
Yageo
RC0603JR-0715KL
2
R56 R95
220R / 100mW / 5% / 0603 Thick Film Resistor
Yageo
RC0603JR07220RL
2
R16 R17
33k / 100mW / 5% / 0603 Thick Film Resistor
Yageo
RC0603JR-0733KL
2
R14 R15
47k / 100mW / 5% / 0603 Thick Film Resistor
Yageo
RC0603JR-0747KL
5
R50 R52 R53 4.7R / 100mW / 5% / 0603 Thick Film Resistor
R58 R60
Yageo
RC0603JR-074R7L
1
R51
Yageo
RC0603JR07680RL
3
C12 C13 C14 Ceramic 1µF / 16V / 20% X7R 0805 Capacitor
BC Components
0805B105M160NT
3
C59 C91 C92 Ceramic 100nF / 16V / 20% X7R 0603 Capacitor
Vishay
VJ0603Y104MXJ
3
C51 C55 C61 Ceramic 100nF / 50V / 20% X7R 0603 Capacitor
Vishay
VJ0603Y104MXA
1
C53
Ceramic 4.7nF / 50V / 20% X7R 0603 Capacitor
BC Components
0603B472M500NT
1
C52
Ceramic 68nF / 16V / 20% X7R 0603 Capacitor
BC Components
0603B683M160NT
1
C95
Ceramic 1nF / 50V / 10% NP0 0603 Capacitor
BC Components
0603N102K500NT
2
C19 C20
Ceramic 33pF / 50V / 10% NP0 0603 Capacitor
BC Components
0603N330K500NT
2
C17 C18
Ceramic 330pF / 50V / 10% NP0 0603 Capacitor
BC Components
0603N331K500NT
8
C50 C54 C58 Electrolytic 10µF / 16V / 20% Aluminum 1.5mm x 4mm KG Series
C60 C90 C93 – General Purpose, Miniature Capacitor
C96
Panasonic
ECEA1CKG100
1
C62
Electrolytic 47µF / 6.3V / 20% Aluminum 1.5mm x 4mm ML Series
– Miniature Capacitor
Rubycon
6.3ML47M4X7
2
C15 C16
Metal Film 1µF / 16V / 20% Polyester 1210 Capacitor
Panasonic
ECPU1C105MA5
1
D50
Light Emitting Red LED (0603)
Toshiba
TLSU1008
1
D95
Light Emitting Green LED (0603)
Toshiba
TLGU1008
2
Q50 Q95
600mA / 40V NPN Small signal PMBT2222 Transistor (SOT-23)
Philips
PMBT2222
1
U50
DIR9001 / 96kHz Digital Audio Receiver (TSSOP28)
Texas
Instruments
DIR9001PW
1
U60
PCM1773 / Low-Power Stereo DAC with line-out (H/W Control)
(TSSOP16-PW)
Texas
Instruments
PCM1773PW
1
U1
DRV601 / DirectPath(TM) Audio Line Driver with external gain
setting. (QFN-20)
Texas
Instruments
DRV601RTJT
1
U95
TPS3825-33 / 3.3V Supply Voltage Supervisor (SOP5-DBV)
Texas
Instruments
TPS3825-33DBVT
1
U90
TLV1117-33C / 3.3V/800mA Positive Voltage Regulator
(SOT4-DCY)
Texas
Instruments
TLV1117-33CDCYR
1
J50
Toslink Optical Receiver Toslink Receiver, 3.3V Special func.
Toshiba
TORX141P
4
SCREW11
SCREW12
SCREW13
SCREW14
M3x6 Pan Head, Pozidriv, A2 Screw
Bossard
BN 81882 M3x6
4
WASHER11
WASHER12
WASHER13
WASHER14
M3 Stainless Steel Washer
Bossard
BN 670 M3
680R / 100mW / 5% / 0603 Thick Film Resistor
SLOU217 – March 2008
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DRV601EVM2
21
www.ti.com
Design Documentation
Table 9. DRV601EVM2 Parts List (continued)
8.3
Qty
Part
Reference
Description
Manufacture
First Mfr P/N
4
STANDOFF1
1
STANDOFF1
2
STANDOFF1
3
STANDOFF1
4
M3x10 Aluminum Stand-off
Ettinger
05.03.108
1
J10
2 pins / 1 row / 2,54mm Pitch Vertical Male Friction lock Pin
Header
Molex
22-27-2021
4
J11 J12 J21
J22
Horizontal Female w. Switch Coax Phono socket
Chunfeng
RJ843-4W
2
J13 J14
3 pins / 1 row / 2,00mm Pitch Vertical Male Gold Shunt Header
Shunt Header
Harwin
M22-2010305
1
SW90
Switch DPDT PCB Mount Switch
NKK-Nikkai
G-22-AP
1
PCB11
A838-PCB-001(2.00) / DRV601EVM2 Printed Circuit Board (2.00)
Printline
A838-PCB001(2.00)
PCB Specifications
Table 10. PCB Specifications
22
Board identification
A838-PCB-001(2.00)
Board type
Double-sided plated-through board
Laminate type
FR4
Laminate thickness
1,6 mm
Copper thickness
35 µm (Include plating exterior layer)
Copper plating of holes
> 25 µm
Minimum hole diameter
0,3 mm
Silkscreen component side
White—Remove silkscreen from solder area and pre-tinned areas
Silkscreen solder side
None
Solder mask component side
Green
Solder mask solder side
Green
Protective coating
Solder coating and chemical silver on free copper
Electrical tests
PCB must be electrically tested
Manufactured to
PERFAG 2E (www.perfag.dk)
Aperture table
PERFAG 10A (www.perfag.dk)
Board size
60 mm × 50 mm
Comments
See drill information file (A838-PCB-001 (DrillDrawing).pdf)
DRV601EVM2
SLOU217 – March 2008
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www.ti.com
Design Documentation
8.4
PCB Layout
Gerber files are available on the EVM page for download.
Figure 22. DRV601EVM2 PCB Component Placement Top
Figure 23. DRV601EVM2 PCB Top and Bottom Layers
SLOU217 – March 2008
Submit Documentation Feedback
DRV601EVM2
23
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It is important to operate this EVM within the input voltage range of 1.8 V to 4.5 V and the output voltage range of 2 Vrms.
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions
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