Texas Instruments | 24-Bit A/D Converter with One- and Two-Channel Differential Inputs and Int Osc (Rev. C) | Datasheet | Texas Instruments 24-Bit A/D Converter with One- and Two-Channel Differential Inputs and Int Osc (Rev. C) Datasheet

Texas Instruments 24-Bit A/D Converter with One- and Two-Channel Differential Inputs and Int Osc (Rev. C) Datasheet
AD
¨
S1
22
5
AD
S1
ADS1225
ADS1226
¨
22
6
www.ti.com ....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
24-Bit Analog-to-Digital Converter
with One- and Two-Channel Differential Inputs and Internal Oscillator
FEATURES
DESCRIPTION
1
•
•
•
•
•
2
•
•
•
•
•
•
•
•
•
100SPS Data Rate (High-Speed Mode)
Single-Cycle Settling
Easy Conversion Control with START Pin
Automatic Shutdown
Low Noise: 4µVRMS Noise (High-Resolution
Mode)
Input Multiplexer with Two Differential
Channels (ADS1226)
Voltage Reference Supports Ratiometric
Measurements
Self-Calibrating
Simple Read-Only 2-Wire Serial Interface
Internal High-Impedance Input Buffer
Internal Temperature Sensor
Internal Oscillator
Low-Power: 1mW While Operating, < 1µA
During Shutdown
Analog and Digital Supplies: 2.7V to 5.5V
APPLICATIONS
•
•
•
Hand-Held Instrumentation
Portable Medical Equipment
Industrial Process Control
The ADS1225 and ADS1226 are 24-bit delta-sigma
analog-to-digital (A/D) converters. They offer
excellent performance, ease-of-use, and low power in
a small 4mm × 4mm QFN package and are
well-suited
for
demanding
high-resolution
measurements, especially in portable and other
space-saving and power-constrained applications.
The ADS1225 and ADS1226 convert on command
using a dedicated START pin. Simply pulse this pin to
initiate a conversion. Data is read in a single cycle for
retrieval over a 2-wire serial interface that easily
connects to popular microcontrollers like the
MSP430. After the conversion completes, the
ADS1225 and ADS1226 automatically shuts down all
circuitry.
Internal features include a two-channel multiplexer
(ADS1226), selectable input buffer, temperature
sensor, and oscillator. The full-scale range is defined
by the external voltage reference with support
provided for up to a 5V differential input signal. Two
operating modes allow for speed (100SPS data rate,
15µVRMS noise) or resolution (4µVRMS noise, 16SPS
data rate).
The ADS1225/6 supports 2.7 to 5.5V analog and
digital supplies. Power consumption is 1mW while
converting with 3V supplies. The ADS1225 and
ADS1226 are fully specified over an extended
industrial temperature range of –40°C to +105°C.
TEMPEN
AVDD
VREFP VREFN
DVDD
START
AINP1
AINN1
MUX
Buffer
AINP2
DS
ADC
Serial Interface
SCLK
DRDY/DOUT
AINN2
Oscillator
MUX
BUFEN
MODE
GND
ADS1226 Only
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2009, Texas Instruments Incorporated
ADS1225
ADS1226
SBAS346C – MAY 2006 – REVISED JANUARY 2009 ....................................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum located at the end of
this data sheet or see the TI web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range, unless otherwise noted.
ADS1225, ADS1226
UNIT
–0.3 to +6
V
AVDD to GND
DVDD to GND
–0.3 to +6
V
100, momentary
mA
10, continuous
mA
Analog input voltage to GND
–0.3 to AVDD +0.3
V
Digital input voltage to GND
–0.3 to AVDD +0.3
V
+150
°C
Operating temperature range
–55 to +125
°C
Storage temperature range
–50 to +150
°C
Input current
Maximum junction temperature
(1)
2
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
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ADS1226
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ELECTRICAL CHARACTERISTICS
All specifications at TA = –40°C to +105°C, AVDD = +5V, DVDD = +3V, and VREF = +5V, unless otherwise noted.
ADS1225, ADS1226
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog Input
Full-scale input voltage
Absolute input voltage
Differential input impedance
Common-mode input impedance
AINP – AINN
±VREF
V
Buffer off; AINP, AINN with respect to GND
GND – 0.1
AVDD + 0.1
Buffer on; AINP, AINN with respect to GND
GND + 0.05
AVDD – 1.5
V
V
Buffer off
2
MΩ
Buffer on
1
GΩ
Buffer off
4
MΩ
System Performance
Resolution
Data rate
Integral nonlinearity (INL)
24
Bits
High-Speed mode
75
100
125
SPS (1)
High-Resolution mode
12
16
22
SPS (1)
% of FSR (2)
0.0005
0.0020
Offset error
End-point fit
60
200
Offset error drift
0.3
Gain error
0.004
Gain error drift
0.025
%
0.3
ppm/°C
95
dB
dB
Common-mode rejection
At dc
Analog power-supply rejection
At dc, ± 10% Δ in AVDD
95
Digital power-supply rejection
At dc, DVDD = 2.7V to 5.5V
80
dB
High-Speed mode
1.5
ppm of FSR, rms
High-Resolution mode
0.4
ppm of FSR, rms
TA = +25°C
106
mV
360
µV/°C
Noise
85
µV
µV/°C
Temperature Sensor
Temperature sensor voltage
Temperature sensor coefficient
Voltage Reference Input
Reference input voltage
0.5
AVDD
V
Negative reference input
VREF = VREFP – VREFN
GND – 0.1
VREFP – 0.5
V
Positive reference input
VREFN + 0.5
AVDD + 0.1
Voltage reference impedance
(1)
(2)
1.5
V
MΩ
SPS = samples per second.
FSR = full-scale range = 2 × VREF.
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS1225 ADS1226
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ADS1225
ADS1226
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ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA = –40°C to +105°C, AVDD = +5V, DVDD = +3V, and VREF = +5V, unless otherwise noted.
ADS1225, ADS1226
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Digital Input/Output
Logic
levels
VIH
0.8 DVDD
DVDD + 0.1
V
VIL
GND – 0.1
0.2 DVDD
V
VOH
IOH = 1mA
VOL
IOL = 1mA
0.8 DVDD
V
Input leakage
0.2 DVDD
V
±10
µA
V
Power Supply
AVDD
2.7
5.5
DVDD
2.7
5.5
AVDD current
DVDD current
Total power dissipation
V
Shutdown
<1
µA
AVDD = 5V, converting, buffer off
285
µA
AVDD = 5V, converting, buffer on
405
µA
AVDD = 3V, converting, buffer off
265
µA
AVDD = 3V, converting, buffer on
385
µA
Shutdown
<1
µA
DVDD = 5V, converting
90
µA
DVDD = 3V, converting
55
µA
AVDD = 5V, DVDD = 3V, buffer off
1.6
AVDD = DVDD = 3V, buffer off
2.5
1
mW
mW
Temperature Range
Specified
–40
+105
°C
Operating
–55
+125
°C
Storage
–60
+150
°C
4
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ADS1226
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PIN CONFIGURATION
START
1
SCLK
2
DVDD
AVDD
VREFP
VREFN
16
15
14
13
RGV PACKAGE
QFN-16, 4.0mm × 4.0mm
(TOP VIEW)
12
GND
11
AINN1
AINP1
ADS1225
7
8
NC
9
MODE
4
6
BUFEN
TEMPEN
10
5
3
GND
DRDY/DOUT
NC
PIN DESCRIPTIONS—ADS1225
TERMINAL
NAME
NO.
ANALOG/DIGITAL
INPUT/OUTPUT
START
1
Digital Input
High: Start conversions; Low: Shutdown
SCLK
2
Digital Input
Serial clock input
DRDY/DOUT
3
Digital Output
BUFEN
4
Digital Input
Enables buffer after MUX
GND
5
Ground
Analog and digital ground
TEMPEN
6
Digital Input
Selects temperature sensor input from MUX
MODE
7
Digital Input
Selects between High-Speed and High-Resolution modes
NC
8
No connect
NC
9
No connect
AINP1
10
Analog Input
Analog channel 1 positive input
AINN1
11
Analog Input
Analog channel 1 negative input
GND
12
Ground
Analog and digital ground
VREFN
13
Analog Input
Negative reference input
VREFP
14
Analog Input
Positive reference input
AVDD
15
Analog
Analog power supply
DVDD
16
Digital
Digital power supply
DESCRIPTION
Dual-purpose output:
Data ready: indicates valid data by going low.
Data output: outputs data, MSB first, on the rising edge of SCLK.
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ADS1225
ADS1226
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START
1
SCLK
2
DVDD
AVDD
VREFP
VREFN
16
15
14
13
RGV PACKAGE
QFN-16, 4.0mm × 4.0mm
(TOP VIEW)
12
GND
11
AINN1
ADS1226
8
AINN2
AINP2
9
7
4
MODE
BUFEN
6
AINP1
TEMPEN
10
5
3
MUX
DRDY/DOUT
PIN DESCRIPTIONS—ADS1226
TERMINAL
NAME
NO.
ANALOG/DIGITAL
INPUT/OUTPUT
START
1
Digital Input
High: Start conversions; Low: Shutdown
SCLK
2
Digital Input
Serial clock input
DRDY/DOUT
3
Digital Output
BUFEN
4
Digital Input
Enables buffer after MUX
MUX
5
Digital Input
Selects analog input from MUX
TEMPEN
6
Digital Input
Selects temperature sensor input from MUX
MODE
7
Digital Input
Selects between High-Speed and High-Resolution modes
AINP2
8
Analog Input
Analog channel 2 positive input
AINN2
9
Analog Input
Analog channel 2 negative input
AINP1
10
Analog Input
Analog channel 1 positive input
AINN1
11
Analog Input
Analog channel 1 negative input
GND
12
Ground
Analog and digital ground
VREFN
13
Analog Input
Negative reference input
VREFP
14
Analog Input
Positive reference input
AVDD
15
Analog
Analog power supply
DVDD
16
Digital
Digital power supply
6
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DESCRIPTION
Dual-purpose output:
Data ready: indicates valid data by going low.
Data output: outputs data, MSB first, on the rising edge of SCLK.
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS1225 ADS1226
ADS1225
ADS1226
www.ti.com ....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
TYPICAL CHARACTERISTICS
At TA = +25°C, AVDD = +5V, DVDD = +3V, and VREF = +5V, unless otherwise noted.
ANALOG CURRENT vs TEMPERATURE
ANALOG CURRENT vs TEMPERATURE
500
350
Buffer On
Buffer Off
AVDD = 5V
325
450
Current (mA)
Current (mA)
AVDD = 5V
300
275
AVDD = 3V
400
AVDD = 3V
250
350
225
300
200
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
Temperature (°C)
Temperature (°C)
Figure 1.
Figure 2.
DIGITAL CURRENT vs TEMPERATURE
100
125
ANALOG CURRENT vs SUPPLY VOLTAGE
450
120
AVDD = 5V
90
75
60
350
300
Buffer Off
AVDD = 3V
45
250
200
30
-55
-25
5
35
65
95
125
2.5
3.0
3.5
4.0
4.5
Temperature (°C)
AVDD Supply Voltage (V)
Figure 3.
Figure 4.
DIGITAL CURRENT vs SUPPLY VOLTAGE
5.0
5.5
TEMPERATURE SENSOR VOLTAGE vs TEMPERATURE
150
Temperature Sensor Voltage (mV)
110
100
90
Current (mA)
Buffer On
400
Current (mA)
Current (mA)
105
80
70
60
50
140
130
120
110
100
90
80
70
40
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-55
-25
5
35
DVDD Supply Voltage (V)
Temperature (°C)
Figure 5.
Figure 6.
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Product Folder Link(s): ADS1225 ADS1226
65
95
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ADS1225
ADS1226
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, AVDD = +5V, DVDD = +3V, and VREF = +5V, unless otherwise noted.
INTEGRAL NONLINEARITY vs INPUT VOLTAGE
INTEGRAL NONLINEARITY vs INPUT VOLTAGE
10
15
Buffer Off
-40°C
10
5
+25°C
0
-5
+105°C
+85°C
-10
+55°C
Buffer On
-10°C
6
-10°C
INL (ppm of FSR)
INL (ppm of FSR)
-40°C
8
+25°C
4
2
0
+55°C
-2
+85°C
-4
+105°C
-6
-8
-10
-3.5
-15
-5
-4
-3
-2
-1
0
1
2
3
4
5
-2.5
Input Voltage, VIN (V)
-1.5
-0.5
0.5
1.5
2.5
3.5
Input Voltage, VIN (V)
Figure 7.
Figure 8.
OFFSET vs TEMPERATURE
GAIN ERROR vs TEMPERATURE
0.002
20
10
Gain Error (%)
Offset (mV)
0.001
0
-10
-20
0
-0.001
-30
-0.002
-40
-50
0
-25
25
50
75
100
-50
125
-25
0
25
Figure 9.
NOISE vs INPUT VOLTAGE
High-Speed Mode
Buffer Off
2.5
Noise (ppm of FSR, rms)
Noise (ppm of FSR, rms)
125
NOISE vs INPUT VOLTAGE
2.0
1.5
1.0
0.5
8
100
3.0
2.5
0
-5
75
Figure 10.
3.5
3.0
50
Temperature (°C)
Temperature (°C)
High-Speed Mode
Buffer On
2.0
1.5
1.0
0.5
0
-4
-3
-2
-1
0
1
2
3
4
5
-3.5
-2.5
-1.5
-0.5
0.5
Input Voltage, VIN (V)
Input Voltage, VIN (V)
Figure 11.
Figure 12.
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1.5
2.5
3.5
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Product Folder Link(s): ADS1225 ADS1226
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ADS1226
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, AVDD = +5V, DVDD = +3V, and VREF = +5V, unless otherwise noted.
NOISE vs INPUT VOLTAGE
NOISE vs INPUT VOLTAGE
0.9
0.7
High-Resolution Mode
Buffer Off
0.6
0.7
Noise (ppm of FSR, rms)
Noise (ppm of FSR, rms)
0.8
0.6
0.5
0.4
0.3
0.2
High-Resolution Mode
Buffer On
0.5
0.4
0.3
0.2
0.1
0.1
0
-5
-4
-3
-2
-1
0
1
2
3
4
0
-3.5
5
-2.5
0.5
-0.5
1.5
Input Voltage, VIN (V)
Figure 13.
Figure 14.
NOISE HISTOGRAM
250
-1.5
Input Voltage, VIN (V)
2.5
3.5
NOISE HISTOGRAM
80
High-Speed Mode
High-Resolution Mode
70
60
Occurrence
Occurrence
200
150
100
50
40
30
20
50
10
0
-30 -25 -20 -15 -10 -5
160
120
80
40
0
-40
-80
-120
-160
0
0
5
10
15
20
25
30
Output Code
Output Code
Figure 15.
Figure 16.
HIGH-SPEED MODE DATA RATE
vs TEMPERATURE
HIGH-RESOLUTION MODE DATA RATE
vs TEMPERATURE
120
21
Data Period (SPS)
Data Period (SPS)
110
100
90
18
15
80
70
12
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
Temperature (°C)
Temperature (°C)
Figure 17.
Figure 18.
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100
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ADS1225
ADS1226
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OVERVIEW
ANALOG INPUTS (AINx+, AINx–)
The ADS1225 and ADS1226 are 24-bit delta-sigma
A/D converters. Figure 19 shows a conceptual
diagram of the device. The ADS1225 has a single
channel, while the ADS1226 allows for one of two
input channels to be selected through a multiplexer. A
buffer can also be selected to increase the input
impedance. The modulator measures the differential
input signal VIN = (AINP – AINN) against the
differential reference VREF = (VREFP – VREFN). The
full-scale input range is ±VREF. A 2-wire serial
interface indicates conversion completion and
provides the user with the output data. An internal
oscillator allows for free-running of the ADS1225 and
ADS1226.
The input signal to be measured is applied to the
input pins AINPx and AINNx. The positive internal
input is generalized as AINP, and the negative
internal input is generalized as AINN. The signal is
selected though the input MUX, which is controlled by
MUX, as shown in Table 1. The ADS1225 and
ADS1226 accept differential input signals, but can
also measure unipolar signals. When measuring
unipolar (or single-ended) signals with respect to
ground, connect the negative input (AINN) to ground
and connect the input signal to the positive input
(AINP). Note that when the ADS1225 and ADS1226
are configured this way, only half of the converter
full-scale range is used since only positive digital
output codes are produced. An input buffer can be
selected to increase the input impedance of the A/D
converter with the BUFEN pin.
Two other pins are used to control the operation of
the ADS1225 and ADS1226. The START pin initiates
conversions. The MODE pin puts the device into one
of two modes. In High-Speed mode, the device gives
data at 100 samples per second (SPS). In
High-Resolution mode, data comes out at 16SPS with
lower noise. In both modes, the device has
single-cycle settling, reducing the latency of the
output data.
Table 1. Input Channel Selection with MUX
DIGITAL PIN
SELECTED ANALOG INPUTS
MUX
POSITIVE INPUT
NEGATIVE INPUT
0
AINP1
AINN1
1
AINP2
AINN2
VREFP VREFN
TEMPEN
START
S
VREF
AINP1
AINN1
MUX
AINP
AINN
AINP2
VIN
Buffer
S
DS
ADC
Serial Interface
SCLK
DRDY/DOUT
AINN2
Oscillator
MUX
MODE
BUFEN
ADS1226 Only
Figure 19. Conceptual Diagram of the ADS1225 and ADS1226
10
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Analog Input Measurement Without the Input
Buffer
With the buffer disabled by setting the BUFEN pin
low, the ADS1225 and ADS1226 measure the input
signal using internal capacitors that are continuously
charged and discharged. Figure 20 shows a
simplified schematic of the ADS1225/6 input circuitry,
with Figure 21 showing the on/off timings of the
switches. The S1 switches close during the input
sampling phase. With S1 closed, CA1 charges to
AINP, CA2 charges to AINN, and CB charges to (AINP
– AINN). For the discharge phase, S1 opens first and
then S2 closes. CA1 and CA2 discharge to
approximately VDD/2 and CB discharges to 0V. The
constant charging of the input capacitors presents a
load on the inputs that can be represented by
effective impedances. Figure 22 shows the input
circuitry with the capacitors and switches of Figure 20
by their effective impedances.
ESD Protection
AVDD/2
ZeffA = tSAMPLE/CA1 = 4MW
AINPx
ZeffB = tSAMPLE/CB = 2MW
AINNx
ZeffA = tSAMPLE/CA2 = 4MW
AVDD/2
Figure 22. Effective Analog Input Impedances
with the Buffer Off
ESD diodes protect the inputs. To keep these diodes
from turning on, make sure the voltages on the input
pins do not go below GND by more than 100mV, and
likewise do not exceed VDD by 100mV. This
limitation is shown in Equation 1:
AVDD/2
AVDD
CA1
3pF
S2
AINP S1
AINPx
AINN S1
AINNx
(1)
Analog Input Measurement with the Input Buffer
CB
6pF
MUX
GND * 100mV t (AINP, AINN) t VDD ) 100mV
S2
CA2
3pF
AVDD
AVDD/2
Figure 20. Simplified Input Structure with the
Buffer Turned Off
When the buffer is enabled by setting the BUFEN pin
high, a low-drift, chopper-stabilized input buffer is
used to achieve very high input impedance. The
buffer charges the input sampling capacitors, thus
removing the load from the measurement. Because
the input buffer is chopper-stabilized, the charging of
parasitic capacitances causes the charge to be
carried away, as if by resistance. The input
impedance can be modeled by a single resistor, as
shown in Figure 23. Note that when START is low,
the buffer must be disabled to prevent loading of the
inputs.
tSAMPLE = 12ms
AINP
ON
S1
1GW
OFF
AINN
ON
S2
OFF
Figure 21. S1 and S2 Switch Timing for Figure 20
Figure 23. Effective Analog Input Impedances
with the Buffer On
Note also that the analog inputs (listed in the
Electrical Characteristics table as Absolute Input
Range) must remain between GND + 0.05V to AVDD
– 1.5V. Exceeding this range degrades linearity and
results in performance outside the specified limits.
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ADS1226
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TEMPERATURE SENSOR
Internal
diodes
provide
temperature-sensing
capability. By setting the TEMPEN pin high, the
selected analog inputs are disconnected and the
inputs to the A/D converter are connected to the
anodes of two diodes scaled to 1x and 64x in current
and size inside the MUX, as shown in Figure 24. By
measuring the difference in voltage of these diodes,
temperature changes can be inferred from a baseline
temperature. Typically, the difference in diode
voltages is 106mV at +25°C, with a temperature
coefficient of 360µV/°C. A similar structure is used in
the MSC1210 for temperature measurement. For
more information, see TI application report SBAA100,
Using the MSC121x as a High-Precision Intelligent
Temperature Sensor, available for download at
www.ti.com.
VOLTAGE REFERENCE INPUTS
(VREFP, VREFN)
The voltage reference used by the modulator is
generated from the voltage difference between
VREFP and VREFN: VREF = VREFP – VREFN. The
reference inputs use a structure similar to that of the
analog inputs. A simplified diagram of the circuitry on
the reference inputs is shown in Figure 25. The
switches and capacitors can be modeled with an
effective impedance of 1.5MΩ.
VREFP
VREFN
AVDD
AVDD
ESD
Protection
TEMPEN
AVDD
8I
16pF
Zeff = 1.5MW
1I
AINP
AINN
1X
8X
Figure 25. Simplified Reference Input Circuitry
ESD diodes protect the reference inputs. To prevent
these diodes from turning on, make sure the voltages
on the reference pins do not go below GND by more
than 100mV, and likewise, do not exceed VDD by
100mV. This limitation is shown in Equation 2:
AINP1
AINN1
AINP2
GND * 100mV t (VREFP, VREFN) t VDD ) 100mV
AINN2
(2)
MUX
Figure 24. Measurement of the Temperature
Sensor in the Input
12
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For best performance, bypass the voltage reference
inputs with a 0.1µF capacitor between VREFP and
VREFN. Place the capacitor as close as possible to
the pins.
The differential voltage reference inputs and the wide
range of operation (VREF can support up to AVDD)
make ratiometric measurements easy to implement.
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS1225 ADS1226
ADS1225
ADS1226
www.ti.com ....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
INTERNAL OSCILLATOR
MODE
The ADS1225 and ADS1226 have an internal
oscillator and run without an external crystal or
oscillator.
The ADS1225 and ADS1226 have two modes of
operation,
allowing
for
High-Speed
or
High-Resolution. By taking the MODE pin high, the
data rate is approximately 100Hz with an rms noise of
15µV. When the MODE pin is low, the ADS1225 and
ADS1226 average multiple samples to increase the
noise performance to 4µV of rms noise with a data
rate of 16Hz. Table 2 shows the MODE pin operation.
DATA READY/DATA OUTPUT (DRDY/DOUT)
This digital output pin serves two purposes. First, it
indicates when new data is ready by going LOW.
Afterwards, on the first rising edge of SCLK, the
DRDY/DOUT pin changes function and begins to
output the conversion data, most significant bit (MSB)
first. Data is shifted out on each subsequent SCLK
rising edge. After all 24 bits have been retrieved, the
pin can be forced high with an additional SCLK. It
then stays high until new data is ready. This
configuration is useful when polling on the status of
DRDY/DOUT to determine when to begin data
retrieval.
SERIAL CLOCK INPUT (SCLK)
This digital input shifts serial data out with each rising
edge. There is hysteresis built into this input, but care
should still be taken to ensure a clean signal. Glitches
or slow-rising signals can cause unwanted additional
shifting. For this reason, it is best to make sure the
rise-and-fall times of SCLK are less than 50ns.
Table 2. MODE Pin Operation for the ADS1225
and ADS1226
MODE PIN
MODE
DATA RATE
NOISE
0
High-Resolution
16SPS
4µVrms
1
High-Speed
100SPS
15µVrms
START
The START pin provides easy and precise control of
conversions. Pulse the START pin high to begin a
conversion as shown in Figure 26 and Table 3. The
completion of the conversion is indicated by the
DRDY/DOUT pin going low. Once the conversion
completes, the ADS1225 and ADS1226 automatically
shut down to save power. They stay shut down until
START is once again taken high to begin a new
conversion.
tSTART
START
Conversion Data
tCONV
DRDY/DOUT
SCLK
ADS1225/6
Status
Converting
Shutdown
Figure 26. Controlling Conversion with the START Pin
Table 3. START Pin Conversion Times for Figure 26
SYMBOL
DESCRIPTION
MIN
MAX
UNITS
µs
tSTART
Minimum START pulse to initiate a conversion
17
tCONV
Conversion time High-Speed mode
8.0
13.3
ms
Conversion time High-Resolution mode
45.5
83.3
ms
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS1225 ADS1226
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ADS1225
ADS1226
SBAS346C – MAY 2006 – REVISED JANUARY 2009 ....................................................................................................................................................... www.ti.com
Table 4. Ideal Output Code vs Input Signal
The ADS1225 and ADS1226 can be configured to
continuously convert by holding the START pin high
as shown in Figure 27. With START held high, a new
conversion starts immediately after the previous
conversion completes. This configuration continues
until the START pin is taken low. During calibration,
the START pin must be kept high. Refer to the
Self-Calibration section for details. Note that when
START is low, the buffer must be disabled to prevent
loading of the inputs.
Input Signal VIN
(AINP – AINN)
≥ +VREF
7FFFFFh
)V REF
2 23 * 1
000001h
0
000000h
*V REF
2 23 * 1
FFFFFFh
ǒ2 2* 1Ǔ
800000h
DATA FORMAT
The ADS1225 and ADS1226 output 24 bits of data in
binary twos complement format. The least significant
bit (LSB) has a weight of (VREF)/(223 – 1). The
positive full-scale input produces an output code of
7FFFFFh and the negative full-scale input produces
an output code of 800000h. The output clips at these
codes for signals exceeding full-scale. Table 4
summarizes the ideal output codes for different input
signals.
START
Data Ready
v *VREF
(1)
IDEAL OUTPUT CODE( (1))
23
23
Excludes effects of noise, INL, offset, and gain errors.
Data Ready
DRDY/DOUT
ADS1225/6
Status
Converting
Converting
Converting
Converting
SCLK held low in this example.
Figure 27. Conversion with the START Pin High
14
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Product Folder Link(s): ADS1225 ADS1226
ADS1225
ADS1226
www.ti.com ....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
DATA RETRIEVAL
Avoid data retrieval during the update period.
DRDY/DOUT remain at the state of the last bit shifted
out until it is taken high (see t6), indicating that new
data is being updated. To avoid having DRDY/DOUT
remain in the state of the last bit, shift a 25th SCLK to
force DRDY/DOUT high (refer to Figure 29). This
technique is useful when a host controlling the
ADS1225 and ADS1226 is polling DRDY/DOUT to
determine when data is ready.
With the START pin high, the ADS1225 and
ADS1226 continuously convert the analog input
signal. To retrieve data, wait until DRDY/DOUT goes
low, as illustrated in Figure 28 and Table 5. After this
occurs, begin shifting out the data by applying
SCLKs. Data is shifted out MSB first. It is not required
to shift out all 24 bits of data, but the data must be
retrieved before the new data is updated (see t2) or
else it will be overwritten.
Data
Data Ready
New Data Ready
MSB
DRDY/DOUT
23
LSB
22
21
0
tPD
tHD
tDS
tSCLK
tUP
1
SCLK
24
tSCLK
tCONV
START Tied High
Figure 28. Data Retrieval Timing
Table 5. Data Retrieval Times for Figure 28
SYMBOL
tDS
DESCRIPTION
MIN
DRDY/DOUT low to first SCLK rising edge
tSCLK
MAX
0
SCLK positive or negative pulse width
UNITS
ns
100
ns
tPD
SCLK rising edge to new data bit valid: propagation delay
tHD
SCLK rising edge to old data bit valid: hold time
tUP
Data updating: no readback allowed
29.5
49.2
µs
Conversion time (1/data rate), High-Speed mode
8.0
13.3
ms
Conversion time (1/data rate), High-Resolution mode
45.5
83.3
ms
tCONV
50
0
ns
ns
Data
Data Ready
New Data Ready
DRDY/DOUT
23
1
SCLK
22
21
0
24
25
25th SCLK to Force DRDY/DOUT High
Figure 29. Data Retrieval with DRDY/DOUT Forced High Afterwards
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS1225 ADS1226
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ADS1225
ADS1226
SBAS346C – MAY 2006 – REVISED JANUARY 2009 ....................................................................................................................................................... www.ti.com
SELF-CALIBRATION
When the calibration is complete, DRDY/DOUT goes
low, indicating that new data is ready. There is no
need to alter the analog input signal applied to the
ADS1225 and ADS1226 during calibration; the input
pins are disconnected within the A/D converter and
the appropriate signals are applied internally and
automatically. The first conversion after a calibration
is fully settled and valid for use. The time required for
a calibration depends on two independent signals:
the falling edge of SCLK and an internal clock derived
from CLK. Variations in the internal calibration values
change the time required for calibration (tCAL) within
the range given by the min/max specs.
Self-calibration can be initiated at any time by
applying two additional SCLKs after retrieving 24 bits
of data; however, the START pin must be kept high
prior to data conversion and remain high until the
calibration completes. Figure 30 and Table 6 illustrate
the timing pattern. The 25th SCLK will send
DRDY/DOUT high. The falling edge of the 26th SCLK
will begin the calibration cycle. Additional SCLK
pulses may be sent after the 26th SCLK; however,
activity on SCLK should be minimized during
calibration for best results.
High
START
Data Ready After Calibration
DRDY/DOUT
23
22
21
0
23
Calibration Begins
SCLK
1
24
25
26
tCAL
Figure 30. Self-Calibration Timing
Table 6. Self-Calibration Time for Figure 30
SYMBOL
tCAL
16
DESCRIPTION
MIN
MAX
UNITS
First data ready after calibration
187
313
ms
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Product Folder Link(s): ADS1225 ADS1226
ADS1225
ADS1226
www.ti.com ....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
APPLICATION INFORMATION
EXPOSED THERMAL PAD
ADS1226 GND pin and bypass capacitors directly to
it. Avoid ringing on the digital inputs. Small resistors
(≈100Ω) in series with the digital pins can help by
controlling the trace impedance. Place these resistors
at the source end.
The exposed thermal pads of the ADS1225 and
ADS1226 are internally connected to GND. To protect
the package from board stress, solder the exposed
thermal pad to the printed circuit board (PCB) and
leave it floating electrically. For further information,
see Application Report SLAU271, QFN/SON PCB
Attachment, available for download from www.ti.com.
Pay special attention to the reference and analog
inputs. These inputs are critical to performance.
Bypass the voltage reference using similar
techniques to the supply voltages. The quality of the
reference directly affects the overall accuracy of the
device. Make sure to use a low noise and low drift
reference such as the REF1004. Often, only a simple
RC filter is needed on the inputs. The circuit limits the
higher frequency noise. Avoid low-grade dielectrics
for the capacitors and place them as close as
possible to the input pins. Keep the traces to the
input pins short, and carefully watch how they are
routed on the PCB.
GENERAL RECOMMENDATIONS
The ADS1225 and ADS1226 are high-resolution A/D
converters. Achieving optimal device performance
requires careful attention to the support circuitry and
PCB design. Figure 31 shows the basic connections
for the ADS1225 and ADS1226. As with any
precision circuit, be sure to use good supply
bypassing capacitor techniques. A smaller value
ceramic capacitor in parallel with a larger value
tantalum capacitor works well. Place the capacitors,
in particular the ceramic ones, close to the supply
pins. Use a ground plane and tie the ADS1225 and
After the power supplies and reference voltage have
stabilized, issue a self-calibration command to
minimize offset and gain errors.
+5V
10mF
0.1mF
0.1mF
REF1004
10mF
+3V
16
0.1mF
13
VREFN
2
14
VREFP
100W
1
AVDD
DVDD
100W
15
START
GND
SCLK
AINN1
12
ADS1226
100W
100W
3
4
AINP1
BUFEN
AINN2
6
7
301W
10
0.1mF
301W
220pF
9
AINP2
5
MODE
MUX
100W
TEMPEN
DRDY/DOUT
220pF
11
8
Same as shown
for AINP1 and AINN1.
100W
100W
Figure 31. Basic Connections
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Product Folder Link(s): ADS1225 ADS1226
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ADS1225
ADS1226
SBAS346C – MAY 2006 – REVISED JANUARY 2009 ....................................................................................................................................................... www.ti.com
SMALL INPUT SIGNALS
measurement of approximately 1V while keeping the
noise contribution of the OPA2333 low. The noise is
low enough compared to full-scale to create a
several-thousand count weigh scale, even in
High-Speed mode. For better accuracy, this noise
could be lowered through either additional filtering or
using the High-Resolution mode.
Figure 32 shows the schematic of the ADS1225 for
measuring small output signals such as the output of
a bridge sensor or load cell. In this application, the
load cell is combined with the ADS1225 and an
MSP430 microcontroller. An OPA2333 is used to
buffer the inputs and to provide the gain of the load
cell signal. A 5V source is used as the reference and
the excitation, although any clean source can create
a proper ratiometric signal for the reference.
It is important to make sure that the reference and
inputs are clean from clocks or other periodic signals
to prevent coupling. Isolate the analog from the digital
supplies and grounds whenever possible.
A typical load cell with a bridge sensitivity of 2mV/V
using a 5V source would have a full-scale output of
10mV. The recommended gain of the OPA2333, for
this load cell using low-drift resistors, would be 1 +
2RF/RG = 100.8V/V. This value gives a full-scale
+5V
10mF
+3V
0.1mF
+5V
0.1mF
AVDD
DVDD
VREFP
Load Cell
START
+5V
MSP430xxx
or mC
SCLK
0.1mF
1/2
OPA2333
VREFN
DRDY/DOUT
GND
RF
4.99kW
ADS1225
AINP1
RG
100W
RF
4.99kW
1kW
0.22mF
MODE
0.1mF
BUFEN
AINN1
G=1+
+3V
1kW
TEMPEN
0.1mF
2RF
RG
GND
1/2
OPA2333
Use low-drift resistors
for RF and RG
Figure 32. Using the OPA2333 as a Gain Stage in Front of the ADS1225
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ADS1225
ADS1226
www.ti.com ....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
LARGE INPUT SIGNALS
Many industrial applications require measurement of
signals that go beyond 5V. The ADS1225 can be
used to measure large input signals with the help of
an INA159. The precision, level translation differential
amplifier converts a ±10V input to a 5V input scale.
This design allows systems to be run from a single
5V supply without the need for higher voltage
supplies for signal conditioning.
Figure 33 shows a basic schematic. The negative
input of the INA159 is grounded while the positive
input is allowed to swing from –10V to +10V.
Similarly, the negative input of the ADS1225 is
grounded while the positive input swings from 0.5V to
+4.5V given the useful VOUT swing of the INA159.
The larger signal is easily measured without the need
for extra ±10V supplies. See the INA159 data sheet
for additional details.
+5V
10mF
+3V
0.1mF
+5V
0.1mF
AVDD
DVDD
VREFP
V+
-IN
100kW
START
20kW
VREFN
SENSE
DRDY/DOUT
GND
ADS1225
OUT
+IN
100kW
40kW
+3V
1kW
AINP1
MODE
1 mF
VIN
±10V
MSP430xxx
or mC
SCLK
0.1mF
BUFEN
AINN1
TEMPEN
REF 2
GND
40kW
REF 1
INA159
V-
Figure 33. With the Help of an INA159, the ADS1225 Measures ±10V Signals
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ADS1225
ADS1226
SBAS346C – MAY 2006 – REVISED JANUARY 2009 ....................................................................................................................................................... www.ti.com
DRDY/DOUT
23
22
21
0
MSB
LSB
1
SCLK
24
START Tied High
(a) Data Retrieval
DRDY/DOUT
23
SCLK
22
21
0
1
24
25
START Tied High
(b) Data Retrieval with DRDY/DOUT Forced High Afterwards
Data Ready
After Calibration
DRDY/DOUT
23
22
21
1
SCLK
0
24
START Tied High
Begin Calibration
25
26
(c) Self-Calibration
START
23
DRDY/DOUT
22
21
20
1
SCLK
(d) Single Conversions with START Pulse
Figure 34. Summary of Serial Interface Waveforms
Table 7. Digital Pin Operations
INPUT
20
DIGITAL PIN
PIN NO.
0
1
START
1
Shutdown Mode
Start Conversion
BUFEN
4
Buffer Off
Buffer On
MUX (ADS1226 only)
5
AINP1 – AINN1 Input
AINP2 – AINN2 Input
TEMPEN
6
Temperature Sensor Off
Temperature Sensor On
MODE
7
High-Resolution Mode
High-Speed Mode
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Product Folder Link(s): ADS1225 ADS1226
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ADS1226
www.ti.com ....................................................................................................................................................... SBAS346C – MAY 2006 – REVISED JANUARY 2009
Revision History
Changes from Revision B (August 2007) to Revision C ................................................................................................ Page
•
•
Added last sentence to first paragraph of Analog Input Measurement with the Input Buffer section describing the
START mode ....................................................................................................................................................................... 11
Added last sentence to second paragraph of Start section describing the START mode .................................................. 14
Changes from Revision A (April 2007) to Revision B .................................................................................................... Page
•
•
•
•
•
•
Changed effective impedance from 250kΩ to 1.5MΩ in last sentence of Voltage Reference Inputs section .....................
Changed Figure 25 .............................................................................................................................................................
Added text to end of START section regarding keeping the START pin high during calibration ........................................
Changed Figure 27 title .......................................................................................................................................................
Changed text in first paragraph of Self-Calibration section .................................................................................................
Changed Figure 30 .............................................................................................................................................................
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12
14
14
16
16
21
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
ADS1225IRGVR
ACTIVE
VQFN
RGV
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 105
ADS
1225
ADS1225IRGVT
ACTIVE
VQFN
RGV
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 105
ADS
1225
ADS1226IRGVR
ACTIVE
VQFN
RGV
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 105
ADS
1226
ADS1226IRGVRG4
ACTIVE
VQFN
RGV
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 105
ADS
1226
ADS1226IRGVT
ACTIVE
VQFN
RGV
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 105
ADS
1226
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
ADS1225IRGVR
VQFN
RGV
16
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
2500
330.0
12.4
4.25
4.25
1.15
8.0
12.0
Q2
ADS1225IRGVT
VQFN
RGV
16
250
180.0
12.4
4.25
4.25
1.15
8.0
12.0
Q2
ADS1226IRGVR
VQFN
RGV
16
2500
330.0
12.4
4.25
4.25
1.15
8.0
12.0
Q2
ADS1226IRGVT
VQFN
RGV
16
250
180.0
12.4
4.25
4.25
1.15
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
ADS1225IRGVR
VQFN
RGV
16
2500
367.0
367.0
35.0
ADS1225IRGVT
VQFN
RGV
16
250
210.0
185.0
35.0
ADS1226IRGVR
VQFN
RGV
16
2500
367.0
367.0
35.0
ADS1226IRGVT
VQFN
RGV
16
250
210.0
185.0
35.0
Pack Materials-Page 2
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