Texas Instruments | Reducing effects of external RC filter circuit on gain and drift error (Rev. A) | Application notes | Texas Instruments Reducing effects of external RC filter circuit on gain and drift error (Rev. A) Application notes

Texas Instruments Reducing effects of external RC filter circuit on gain and drift error (Rev. A) Application notes
Analog Engineer's Circuit: Data
Converters
SBAA239A – January 2018 – Revised January 2019
Reducing effects of external RC filter circuit on gain and
drift error for integrated analog front ends (AFEs): ±10V
Cynthia Sosa
Input
ADC Input
Digital Output
VinMin = –10V
AIN-xP = –10V, AIN-xGND = 0V
–3276810, 8000H
VinMax = 10V
AIN-xP = 10V AIN-xGND = 0V
3276710, 7FFFH
Power Supplies
AVDD
DVDD
5V
5V
Design Description
This cookbook design describes how to select filter component values and how to minimize the gain error
and drift introduced by this filter on a fully-integrated analog front end (AFE) SAR ADC. The design uses
the input impedance drift at the full scale range of ±10V of the ADS8588S. This external RC filter
minimizes external noise and provides protection from electrical overstress. Minimizing gain error and drift
are important to end equipment such as: Multi-Function Relays, AC Analog Input Modules, and Terminal
Units. This design describes two correction methods, a no-calibration correction factor and a 2-point
calibration. Implementing calibration can minimize both the gain error introduced by the external resistor
and the internal device gain error to negligible levels.
Vin
REXT
REXT
AIN_xP
RIN
1MŸ
CEXT
PGA
3rd
2nd
Order
Order
Low-Pass
1MŸ
AIN_xGND
16-B
16-Bit SAR
SAR
CHx_OUT
RIN
SBAA239A – January 2018 – Revised January 2019
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Specifications
Specification
Introduced Gain Error (25°C)
Introduced Gain Error (125°C)
Introduced Gain Error Drift
Calculated
Measured
0.9901%
0.9894%
0.995%
–1.1388%
0.49ppm/°C
–0.8031ppm/°C
Design Notes
1. Use low drift REXT resistors to maintain low drift and minimize gain error. This design uses resistors with
a temperature coefficient of 25ppm/°C and ±0.1% tolerance.
2. The internal programmable gain amplifier (PGA) presents a constant resistive impedance of 1MΩ
3. The REXT value introduced is directly proportional to its introduced error
4. Calibration can also be used to eliminate system offset gain error
5. The TI Precision Labs – ADCs training video series covers methods for calculating gain and offset
error and eliminating these errors through calibration, see Understanding and Calibrating the Offset
and Gain for ADC Systems. Using SPICE Monte Carlo Tool for Statistical Error Analysis explains how
to use Monte Carlo Analysis for statistical error analysis.
Component Selection
External anti-aliasing RC filters reduce noise and protect from electrical overstress; if a large resistor value
is used, this will further limit the input current. A large external resistive value will also provide a low cutoff
frequency, which is desired for relay protection applications as the input frequencies are usually 50 or 60
Hz. Furthermore, a balanced RC filter configuration is required for better common-mode noise rejection;
matching external resistors are present on both the negative and positive input paths. To minimize the
introduced drift error, the external resistors should be low drift; 25ppm/°C resistors.
1. Choose a high-value REXT based on the desired cutoff frequency. A cutoff frequency of 320Hz was
used to eliminate harmonics from a 50- or 60-Hz input signal.
REXT = 10kΩ
2. Choose CEXT
1
1
24 . 8 nF
C EXT
2 ˜ S ˜ f C ˜ 2 ˜ R EXT
2 ˜ S ˜ 320 Hz ˜ 2 ˜ 10 k :
Nearest standard capacitor value available, CEXT = 24nF
Calculate Gain Error Drift
This section demonstrates how to calculate the introduced gain error drift. The additional drift from the
external filter resistor is small compared to the internal device drift.
1. Calculate effective internal impedance due to maximum negative drift (–25ppm/°C)
R IN (
25 ppm / q C )
R IN ˜ [Drift ( ppm / q C ) ˜ G T ( q C )
1]
R IN (
25 ppm / q C )
1M : ˜ [ 25 ppm / q C ˜ (125 q C
25 q C )
R IN (
25 ppm / q C )
0 . 9975 M :
1]
2. Calculate effective external resistance due to maximum positive drift (25ppm/°C)
R EXT ( 25 ppm / q C ) R EXT ˜ [Drift ( ppm / q C ) ˜ G T ( q C ) 1]
2
R EXT
( 25 ppm / q C )
1 0 k : ˜ [ 25 ppm / q C ˜ (125 q C
R EXT
( 25 ppm / q C )
10 . 025 k :
Reducing effects of external RC filter circuit on gain and drift error for
integrated analog front ends (AFEs): ±10V
25 q C )
1]
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3. Calculate nominal gain error introduced by the external resistor at room temperature
1
GainError (R EXT ) RoomTemp
R IN
1
R EXT
1
GainError (R EXT ) RoomTemp
1M :
1
10 k :
GainError (R EXT ) RoomTemp 0 .009901 or 0 .9901 %
4. Calculate nominal gain error introduced by the external resistor at highest rated temperature
1
GainError (R EXT ) 125 qC
0.9975 M :
1
10 .025 k :
GainError (R EXT ) 125 qC 0.009950 or 0 .995 %
5. Calculate gain error drift introduced by the external resistor
GainError (REXT ) RoomT emp GainError (REXT ) 125qC
˜ 10 6
GainError _ Drift (REXT )
GT
0.009901 0.00950
GainError _ Drift (REXT )
˜ 10 6
(125qC 25qC)
GainError _ Drift (REXT )
0.49ppm / qC
The maximum gain error temperature drift of the ADS8588S is ±14ppm/°C, which is orders of magnitude
larger than the calculated drift error introduced, making the introduced error negligible. The minimal drift
error introduced by the external resistors has greatly to do with the low drift coefficient of the input
impedance (±25ppm/⁰C).
To measure the introduced gain error drift, two test signals are sampled and applied at 0.5V from the full
scale input range within the linear range of the ADC. The signals are applied and sampled with and
without the external RC filter present. These measurements are performed at both temperatures, 25°C
and 125°C. The percent gain errors are solved for by finding the percent error of the ideal slope and the
measured slope for each of the four distinctive test conditions, resulting in four distinct percent gain error
measurements. The drift (ppm/°C) with and without the RC present is then calculated by converting the
percent gain errors to decimal format then following step 5 shown above. The introduced gain error drift is
then solved for by subtracting the drift of the RC and no RC present.
SBAA239A – January 2018 – Revised January 2019
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Reducing effects of external RC filter circuit on gain and drift error for
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Uncalibrated Correction
An uncalibrated correction targets to solve the input voltage before any losses occur due to the RC filter
by working backwards from the ADC measured samples using a voltage divider.
1. Apply known test signal and measure equivalent code
Vin
Measured Code
Equivalent Measured Input
9.5V
30841
9.412
2. Calculate the input voltage before RC losses
R
RIN
VIN _ NoLoss VIN _ Equivalent ˜ EXT
RIN
1M: 10 k:
VIN _ NoLoss 9.412 ˜
1M:
VIN _ NoLoss 9.50612 V
Uncalibrated Correction Measurements
Using a voltage correction can be beneficial, but not the most comprehensive. The correction factor can
have a worst-case error of 0.2456% at room temperature due to change in internal impedance.
Room Temperature (25°C) Measurements
4
Vin
Code
Reading
Correction
Error %
9.5
30841
9.412
9.506120
0.0644
8.5
27594
8.421
8.505210
0.0613
5
16232
4.954
5.003540
0.0708
0
1
0
0.000000
–
–5
–16230
–4.953
–5.002530
0.0506
–8.5
–27593
–8.421
–8.505210
0.0613
–9.5
–30839
–9.411
–9.505110
0.0538
Reducing effects of external RC filter circuit on gain and drift error for
integrated analog front ends (AFEs): ±10V
SBAA239A – January 2018 – Revised January 2019
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2-Point Calibration Method
A two point calibration applies and samples two test signals at 0.5V from the full scale input range within
the linear range of the ADC. These sample measurements are then used to calculate the slope and offset
of the linear transfer function. Calibration will eliminate both the gain error introduced by the external
resistor and the internal device gain error.
1. Apply test signal at 2.5% of input linear range
Vmin
Measured Code
–9.5V
–30839
2. Apply test signal at 97.5% of input linear range
Vmax
Measured Code
9.5V
30841
3. Calculate slope and offset calibration coefficients
m
Code max
Vmax
Code
Vmin
min
b
30841 ( 30839 )
9 .5 ( 9 .5 )
Codemin m ˜ Vmin
b
( 30839 ) 3246 .3 ˜ ( 9.5 V ) 1.0001
m
3246 . 3158
4. Apply calibration coefficient to all subsequent measurements
VinCalibrate
VinCalibrate
Code b
m
30841 1.0001
9.5000
3246.3158
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2-Point Calibration Method Measurements
Calibration Coefficients
m = 3246.3158; b = 1.0001
At room temperature without calibration, a gain error is present. Once calibration is applied to the
measured results from the ADC, the gain error is minimized to nearly zero.
Room Temperature (25°C) Measurements
VIN
Code
Uncalibrated VIN
Calibrated VIN
Voltage Error Without
Calibration %
Voltage Error With
Calibration %
9.5
30841
9.412
9.500000
–0.926316
–0.000001
8.5
27594
8.421
8.499789
–0.929412
–0.002480
5
16232
16232
4.999822
–0.920000
–0.003568
0
1
0
0.000000
–
–
–5
–16230
–4.953
–4.999822
–0.0940000
–0.003567
–8.5
–27593
–8.421
–8.500097
–0.929412
0.001144
–9.5
–30839
–9.411
–9.500000
–0.936842
0.000000
When exposed to high temperatures, the gain error increases, as expected. Once calibration is applied,
the voltage error is decreased but not eliminated; the error still present is the drift error.
High Temperature (125°C) Measurements
VIN
Code
Uncalibrated VIN
Calibrated VIN
Relative Voltage Error
Without Calibration %
Relative Voltage Error
With Calibration %
9.5
30826
9.407
9.495379
–0.978947
–0.048639
8.5
27582
8.417
8.496093
–0.976471
–0.045968
5
16224
4.951
4.997357
–0.980000
–0.052854
0
0
0
–0.000308
0
–
–5
–16224
–4.951
–4.997973
–0.980000
–0.040531
–8.5
–27581
–8.417
–8.496401
–0.976471
–0.042344
–9.5
–30826
–9.407
–9.495995
–0.978947
–0.042153
Design References
See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
Design Featured Devices
Device
Key Features
Link
Similar Devices
ADS8588S
16-bit, high-speed 8-channel simultaneous-sampling ADC with bipolar
inputs on a single supply
www.ti.com/product/ADS8588S
www.ti.com/adcs
Revision History
6
Revision
Date
A
January 2019
Change
Downscale title, updated header on first page.
Reducing effects of external RC filter circuit on gain and drift error for
integrated analog front ends (AFEs): ±10V
SBAA239A – January 2018 – Revised January 2019
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Copyright © 2018–2019, Texas Instruments Incorporated
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