Texas Instruments | Designing a modern power supply for RF sampling converters | Application notes | Texas Instruments Designing a modern power supply for RF sampling converters Application notes

Texas Instruments Designing a modern power supply for RF sampling converters Application notes
Analog Applications Journal
Communications
Designing a modern power supply for
RF sampling converters
By Thomas Neu
System Engineer, High-Speed Products
Introduction
Figure 1. Power-rail noise coupling
inside the high-speed ADC
Recently introduced high-performance converters for
direct-radio-frequency (RF) sampling can operate without
one entire RF down-conversion stage. This results in a
simpler signal chain that uses a printed-circuit board
(PCB) with a much smaller footprint. While RF sampling
converters can help designers create a truly modern
receiver, other system components such as the analog-todigital (ADC) power supply need upgrading as well.
Using low-dropout regulators (LDOs) for post-regulation
to reduce power-supply noise seem to be a quick, low-risk
design implementation, but at the expense of 15 to 50%
additional power consumption. Instead, system designers
could spend time optimizing the design of the RF ADC
power supply by using a high-efficiency switch-mode DC/DC
regulator to achieve receiver noise performance similar to
when using a low-noise LDO.
ADC Power Supply
Clock
Input
Clock
Buffer
Direct
Coupling
Mixing
Path
Signal
Input
ADC
(a) Noise coupling paths
Understanding the ADC PSRR
The ADC power-supply rejection ratio (PSRR) gives information about the attenuation of noise on the power-supply
inputs before the noise finds its way into the output spectrum. Power-supply noise from the DC/DC regulator is
typically illustrated as voltage ripple riding on top of a DC
voltage. It can be quantified as an AC signal with amplitude (voltage ripple) and frequency (the switching
frequency of the regulator, fDC/DC).
There are two different paths inside the ADC where
noise on the power rail couples into the converter as
­illustrated in Figure 1:
• Direct coupling into the analog input path. The
switching regulator spur shows up at fDC/DC in the
­spectrum.
• Mixing products when the spurs couple into the
clock path. Two spurs in the spectrum are input-­
frequency dependent and located at fIN ±fDC/DC. These
spurs can be problematic in applications that have
unwanted in-band interferers, such as radar systems.
Because of the mixing operation, unwanted spurs from
the power-­supply noise can directly overlap with weak
wanted ­signals and thus significantly impact receiversensitivity performance. Furthermore, the mixing spurs
scale in amplitude with 20 log(fIN/fS); they increase in
amplitude as the input frequency increases.
Texas Instruments
fIN
Mixing Spurs
fIN ± fDC/DC
Direct
Coupling
fDC/DC
fS/2
(b) Mixing spurs in the output spectrum
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Communications
Figure 2. Power-supply chain in a traditional low-noise design
DC/DC Regulator
0.47 µH
TPS62085
DC/DC
Extra Bypass
Capacitors
C1
C2
2.2 µF 1 µF
LDO
LDO
Power-Supply Filter
Ferrite
Bead
C3
10 µF
Bypass Capacitors
at ADC Pins
C4
C5
C6
33 µF 10 µF 1 µF
Cbyp Cbyp Cbyp
0.1 µF 0.1 µF 0.1 µF
To ADC
22 µF
DC/DC Output Noise
1/f Noise
HD2DC/DC
fDC/DC
LDO PSRR
Bypass Filter
Attenuation
Power-Supply Filter
Attenuation
0.1-µF Bypass Capacitors
Attenuation
Gain (dB)
A conventional power-supply design for a high-speed
With a basic understanding of the bypass capacitor and
data converter with low noise performance may contain
some design effort, filter performance can be optimized to
up to five sections and look similar to Figure 2 (also implethe DC/DC converter switching frequency (~1.8 to 2.6 MHz
mented on the ADC32RF45 evaluation module).
for the TPS62085, depending on load current) while
The LDO reduces the noise contribution of the DC/DC
reducing capacitor count.
regulator, which consists of the switching spurs and the
The capacitor array (33/10/1-µF) exhibits better broadflicker noise. Low-noise LDOs provide very good PSRR at
band rejection compared to a single 10-µF capacitor.
low frequencies, but their PSRR decreases for higher
When taking package parasitics into consideration,
frequencies. Certain applications require optimal flickerhowever, simulation results in Figure 3 show that three
noise performance and the LDO may be indispensable.
parallel 10-µF capacitors show a 6-dB deeper notch
Bypass or decoupling capacitors provide a local path to
around 2 MHz, instead of a shallow notch around 1 MHz
ground for noise created by a circuit, decoupling one
from a single 30-µF capacitor. Depending on the amount
component or electrical circuit from another. Figure 2
of rejection needed, additional bypass capacitors can be
shows bypass capacitors close to the switching regulator
added in parallel.
as well as the high-speed ADC. The 0.1-µF
bypass capacitors located close to the dataFigure 3. Frequency response of different
bypass-capacitor configurations
converter pins have a resonant frequency
beyond 10 MHz. They are not intended for
0
filtering power-supply noise and spurs, but
10 µF
provide localized high-frequency bypassing for
30 µF
switching currents generated from the ADC.
Modern DC/DC regulators use switching
–5
frequencies beyond 1 MHz to reduce inductor
33/10/1 µF
size. At these frequencies, the LDO PSRR may
only be 20 to 30 dB. Designers can attain a
–10
similar level of attenuation with an optimized
3x 10 µF
power-supply filter design that eliminates the
need for the LDO.
–15
Optimizing the power-supply chain
The shotgun approach is a popular design
method for a passive power-supply filter. This
is where a ferrite bead is followed by a capacitor array with a wide range of different values
(for example, from 33 µF to 0.1 µF) in an
attempt to cover any possible spur frequencies.
Texas Instruments
–20
100 k
1M
10 M
Frequency (Hz)
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Analog Applications Journal
Communications
When selecting actual components for the filter design,
there are three important considerations:
• Physical size: Physically smaller capacitors save space
(1206 vs. 0805); they also have less parasitics such as
series resistance and inductance, which reduce the
effectiveness of the notch filter.
• The ferrite bead: To be effective against switching
noise, the ferrite bead needs to have a high impedance
at very low frequencies (~1 MHz). Most ferrite beads
have high impedance around 100 MHz but very little
impedance at low frequencies. Thus, many ferrite beads
are little help in attenuating switching spurs. A much
more effective component is an electromagnetic interference (EMI) ­filter such as the NFM31PC276B0J3. It is
inherently designed to have a notch filter around 2 MHz
for use with modern switching regulators and can
­provide approximately 15 to 25 dB of rejection.
• Capacitor material: The material (X7R, X5R, Y5V)
impacts capacitor performance in regards to aging
(capacitance vs. time), DC voltage rating, temperature
and tolerance.
expense of a (possibly) slightly bigger PCB footprint.
Changing the output inductor is an option for further spur
improvement.
The amplitude of the mixing spurs can be estimated
with the following equations and component parameters:
• AMixing_Spurs = ADC/DC + PSRRLDO+PSRRFilter + PSRRADC
+ Frequency_Adjust
• ADC32RF45 with fS = 3 GSPS and fIN = 1 GHz, clock
amplitude = 1.5 VPP.
• TPS62085 DC/DC regulator with 10-mVPP ripple.
• The spur amplitude of the DC/DC regulator calculates to
ADC/DC = 20 log(ASpur/AClk) ≈ –43 dBc.
• TPS74201 LDO with PSRR ≈ 25 dB at 2 MHz.
The estimated and measured results for various supply
configurations are shown in Table 1.
Table 1. Estimated vs. measured spur amplitude for different
­configurations of the power-supply chain
Filter performance and spur improvement
When removing the low-noise LDO from the power-supply
chain, the power-supply filter needs to provide about 20 to
30 dB of rejection at the switching frequency in order to
make up for the missing LDO PSRR. As Figure 4 shows,
the power-supply filter was tuned for that goal so that the
overall spur performance would be comparable to using a
low-noise LDO.
The switching regulator typically requires an inductorcapacitor (LC) filter at its output that is tuned with the
internal compensation; however, some optimization is
possible with this filter as well. In the TPS62085 data
sheet, TI recommends the 0.47-µH inductor for an optimal
transient response. During normal operation, the highspeed data converter presents a constant load and the
transient response is not a factor. A larger inductor
reduces output ripple (a 1-µH versus a 0.47-µH inductor
cuts the ripple in half), which reduces the spurs at the
Optimized
filter design
No LDO
without
LDO
Configuration
With LDO
Spur amplitude
ADC/DC
–43 dBc
–43 dBc
–43 dBc
PSRR LDO at
2 MHz
~–25 dB
—
—
Power-supply
filter at 2 MHz
~–15 dB
~–15 dB
~–35 dB
PSRR ADC
~–25 dB
~–25 dB
~–25 dB
Input signal =
1 GHz, –1 dBFS
–9 dB
–9 dB
–9 dB
Estimated spur
amplitude
–117 dBc
–92 dBc
–112 dBc
Comment
EMI filter +
3 x 10 µF
20 log (1G/3G)
Measured spur
Noise
Noise
~–97 dBc
amplitude
(<­–105 dBc)
(<­–105 dBc)
This guideline is to get an estimate for the power-supply
spur. There may be additional coupling paths—both inside
the ADC as well as on the PCB itself—that can degrade
rejection performance.
Figure 4. Optimized power-supply network with low-noise LDO removed
DC/DC Regulator
0.47 µH
TPS62085
DC/DC
Power-Supply Filter
EMI
Filter
C1
C2
C3
10 µF 10 µF 10 µF
Bypass Capacitors
at ADC Pins
Cbyp Cbyp Cbyp
0.1 µF 0.1 µF 0.1 µF
To ADC
22 µF
Texas Instruments
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Analog Applications Journal
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Figure 5. FFT comparison showing power-supply spurs close to DC and around the input signal
524k FFT, fS = 3 Gsps, fIN = 1 GHz (AIN = 1 –dBFS)
0
–90
–90
–95
–95
Amplitude (dBFS)
Amplitude (dBFS)
–20
Amplitude (dBFS)
–100
–100
–105
–40
–105
–110
–60
–110
–115
–115
–120
–120
1
10
Frequency (MHz)
1
10
Frequency (MHz)
Legend
–80
0 Ω + 33/10/1 µF
EMI Filter + 10 µF
–100
EMI Filter + 3 x 10 µF
LDO + All capacitors
–120
0
250
500
750
Frequency (MHz)
1000
1250
1500
Related Web sites
Even with a 524,000-point fast Fourier transform (FFT)
and 20× averaging, the power-supply spurs are difficult to
detect when employing the LDO or a tuned filter network,
as shown in Figure 5. The switching regulator operates at
fDC/DC ≈ 2.3 MHz; thus the spurs are located at
fSpur ≈ 2.3 MHz and fIN ±fDC/DC = 1 GHz ±2.3 MHz. The
spurs are in noise well below –100 dBFS, which attests to
the effectiveness of the tuned filter network.
Product tools:
ADC32R45 evaluation module
Product information;
TPS62085
ADC32RF45
TPS74201
Conclusion
To address system power consumption, designers of
modern high-bandwidth receivers have adopted a new
architecture for direct-RF sampling that simplifies the
receiver signal chain and results in reduced system power.
Also, it is possible to save a lot of additional power
consumption by optimizing the power supply for the data
converter itself. Rather than using a low-noise LDO to
improve power-supply noise, an optimized passive power
filter can achieve similar noise rejection without the 15 to
35% additional power expense.
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