Texas Instruments | The IBIS model, Part 2: Determining the total quality of an IBIS model | Application notes | Texas Instruments The IBIS model, Part 2: Determining the total quality of an IBIS model Application notes

Texas Instruments The IBIS model, Part 2: Determining the total quality of an IBIS model Application notes
Data Acquisition
Texas Instruments Incorporated
The IBIS model, Part 2: Determining the
total quality of an IBIS model
By Bonnie C. Baker
Senior Applications Engineer
This article is Part 2 of a three-part series. Part 1 (see
Reference 1) discussed the fundamental elements of digital
input/output buffer information specification (IBIS) simulation models and how they are generated in the SPICE
environment. This article, Part 2, investigates IBIS-model
validation. Part 3, which will appear in a future issue of the
Analog Applications Journal, will show how IBIS users
investigate signal-integrity issues and problems during the
development phase of a printed circuit board (PCB).
IBIS models can be generated from the SPICE deck of
an integrated circuit (IC) or in the lab. In both cases, the
modeling engineer collects DC data to generate the powerclamp, ground-clamp, pull-up, and/or pull-down data for
the various digital buffers on the chip. Following this, data
is collected on the output buffer’s transient or on the AC
rise and fall times. See Reference 1 for more information
on these data-collection processes. The IBIS model’s transient data replicates the time behavior of output buffers.
The modeling engineer acquires the model data with an
array of power-supply conditions and junction temperatures. Further enhancements include the addition of the
IC’s package characteristics, buffer-input chip capacitance,
and surrounding documentation. Once the IBIS model
exists, the engineer reviews it to verify several quality
stages and then produces a validation report that correlates the IBIS model to SPICE simulations or bench data.
Historically, IBIS models have had a reputation of poor
quality because many IBIS users have received incorrect
models from vendors. The errors range from simple format
errors to the model not really portraying the behavior of
the buffers in the IC at all. Texas Instruments (TI) is committed to generating quality, reliable IBIS models for customers’ signal-integrity investigations.
The IBIS Open Forum’s Quality Task Group and Model
Review Task Group have formulated a quality-control (QC)
process using four QC stages, which are described in the
“IBIS Quality Specification,” Version 2.0 (Reference 2).
The IBIS task groups are subcommittees of TechAmerica’s
Systems, Standards & Technology Council. Other model
users and model makers across the industry have also contributed to this QC process. The four QC stages are:
• Stage 0: An automated quality check using an IBIS parser
• Stage 1: A manual and visual quality check of the model
• Stage 2: Correlation to SPICE or hardware test data
• Stage 3: Correlation to both SPICE and hardware test
data
TI performs stages 0, 1, and 2 for its IBIS models,
correlating them with SPICE for stage 2. This article will
describe the nuances of performing stages 0, 1, and 2
(with SPICE correlation only).
Stage 0: IBIS parsers
The first stage of QC for an IBIS model begins with an IBIS
parser program. This computer program provides an
essential first-stage model check, inspecting the IBIS file
for the validity of the IBIS model data and for syntax
errors. This type of program can create “Error,” “Warning,”
and/or “Note” messages in relation to the IBIS model
under test, but creating an IBIS model that is free of these
messages is possible.
For instance, the parser program IBISCHK4 looks for
illegal text types, verifies model types, insures that all
proper variables are available for each model, validates
end points of data, and performs other housekeeping
checks. An example of the results of running an IBISCHK4
program with an IBIS model is shown in the sidebar below.
The “Error,” “Warning,” and “Note” messages from the
parser check provide an opportunity for the IBIS-model
designer to identify errors and easily correct them.
Running a parser with an IBIS model is essential at the
beginning of the quality check; however, the parser does
not provide an exhaustive list of IBIS-model errors and
does not necessarily guarantee a good model.
Example IBISCHK4 results
ERROR (line 137) - Invalid Model_type (“InputX”)
WARNING (line 154) - Vinl should not be specified for model type (null)
WARNING (line 155) - Vinh should not be specified for model type (null)
ERROR - Model ‘sdi_3p3’: Ramp Not Defined
Errors : 2
Warnings: 2
File Failed
5
Analog Applications Journal
1Q 2011
www.ti.com/aaj
High-Performance Analog Products
Data Acquisition
Texas Instruments Incorporated
Figure 1. Pull-down I-V test circuit for three-state buffer
VDD
Logic
Low
IN
ESD Clamp
Current
Pad
Logic
Low
SweptVoltage
Source
ESD Clamp
EN
Parser freeware programs are available for dos32,
hp_111, Linux®, and Sun® platforms at the IBIS Open
Forum’s Web site (http://www.eda.org/ibis). To date there
are four parsers available: IBISCHK2, IBISCHK3, IBISCHK4,
and IBISCHK5. The level number of each parser program
corresponds respectively to the version number of the
documented IBIS specification. For example, the most
recent parser program, IBISCHK5, corresponds to Version
5.0 of the IBIS specification (Reference 3). TI uses
IBISCHK4 and IBISCHK5 to validate its IBIS models.
Stage 1: Visual check
A visual QC check of an IBIS model consists of a manual
review of its text and waveforms. During this visual review,
the modeling engineer verifies that the header section of
the IBIS model contains accurate information. For instance,
the header must have the proper products within the
product families listed and must have appropriate modeling comments and notes. Following the header, the model
must have reasonable package parasitics and well-defined
selector entries and must map directly to parameters in
the product data sheet, including buffer types, load conditions, input-buffer thresholds, and operating or specified
temperature range.
Additionally, the DC and transient waveforms must comply with IBIS standards. The measurement voltage span of
the DC waveforms ranges from –VDD to +2 × VDD (where
VDD is the power-supply voltage to the buffer). Across this
range, the input and output current must not exceed 2 A.
Notes in the comments section in the IBIS model header
explain the reason for any excessive currents beyond 2 A.
Figure 1 shows the pull-down test configuration for an
output buffer, and Figure 2 shows a sample of a pull-down
curve from an IBIS model.
Figure 2. Pull-down IBIS graph for DAC7718 output buffer
120
100
Maximum
Output-Buffer Current (mA)
80
Typical
60
40
Minimum
20
0
�2 0
�4 0
�6 0
Maximum: VDD = 5.5 V, TJ = 40°C, strong process
Typical: VDD = 5 V, TJ = 33°C, typical process
Minimum: VDD = 4.5 V, TJ = 113°C, weak process
�8 0
�100
�120
�140
�5
�4
�3
�2
�1
0
1 2
3
4
5
Swept-Voltage Source (V)
6
7
8
9
10
6
High-Performance Analog Products
www.ti.com/aaj
1Q 2011
Analog Applications Journal
Data Acquisition
Texas Instruments Incorporated
Figure 3. Falling-edge V-t test circuit for an output buffer
VDD
IN
ESD Clamp
Pad
Logic
Low
ESD Clamp
EN
Figure 3 shows the proper test-circuit configuration for
the transient falling edge of an output buffer. The resistor
following the pad is usually 50 W; however, it can be a different value depending on the IC’s requirements as stated
in the product data sheet.
Figure 4 shows typical falling-edge data for an IBIS
model. In this graph, the initial output voltage remains
constant for at least two points in time. The data completes its migration to the final value within approximately
two-thirds of the total x-axis time.
The text and graphics checks of the IBIS model can be
found in Reference 2, where they are described in detail.
Stage 2: Correlation to SPICE or hardware
test data
A primary use for IBIS models is to simulate timing and
signal integrity, including over/undershoot or crosstalk
behavior on an IC’s PCB. For stage 2 QC, the modeling
engineer compares the performance of an IBIS model in
this environment to the device’s IC SPICE simulation or
test data. The engineer selects appropriate models for a
typical board’s transmission lines for the specific product
under test and compares the test results graphically and
with a figure of merit.
Figure 4. DAC7718 input-buffer fall-time analysis
5.6
5.2
Maximum: VDD = 5.5 V, TJ = 40°C, strong process
Typical: VDD = 5 V, TJ = 33°C, typical process
Minimum: VDD = 4.5 V, TJ = 113°C, weak process
4.8
Output Voltage (V)
4.4
4
3.6
3.2
2.8
2.4
2
1.6
1.2
Typical
0.8
0.4 Maximum
0
0
0.25 0.5 0.75
Minimum
1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 3.25 3.5
Time (ns)
7
Analog Applications Journal
1Q 2011
www.ti.com/aaj
High-Performance Analog Products
Data Acquisition
Texas Instruments Incorporated
Figure 5 shows an example of a validation test circuit for a SPICE-deck output
buffer. This circuit includes the resistive,
inductive, and capacitive package parasitics (R_pkg, L_pkg, and C_pkg, respectively) at the output of the SPICE buffer.
Following these parasitics is a model of a
PCB transmission line, T1. The SPICE simulation collects data at the far end of the
transmission line, V(SPICE).
Figure 6 shows an example of an outputbuffer IBIS circuit. Notice that the package
parasitics do not appear in the circuit, as
they are embedded in the IBIS model. This
IBIS simulation circuit has the same model
of a PCB transmission line (T1) as that in
the SPICE-deck simulation circuit.
Figure 7 provides a simulation rise-time
comparison between the SPICE and IBIS
models based on TI’s ADS8319. The outputs were compared at the V(SPICE) node in
Figure 5 and the V(IBIS) node in Figure 6.
Simulated model conditions were based on
a nominal or 1.8-V power supply, a junction
temperature of 27°C, and a typical process
corner.
Figure 5. Example circuit for SPICE test of an output buffer
VDD
V(SPICE)
SPICE Deck
R_pkg
Z 0 = 50 , 1 ns
L_pkg
T1
C_pkg
GND
5 pF
GND
Figure 6. Example circuit for IBIS-model test of an output buffer
VDD
V(IBIS)
IBIS Model
Z0 = 50 , 1 ns
T1
5 pF
GND
Figure 7. Comparison of output rise times for SPICE and
IBIS models
5
SPICE
Volts (V)
4
IBIS
3
2
1
0
45
50
Time (ns)
55
60
8
High-Performance Analog Products
www.ti.com/aaj
1Q 2011
Analog Applications Journal
Data Acquisition
Texas Instruments Incorporated
Figure 8. Comparison of output fall times for SPICE and
IBIS models
5
Volts (V)
4
3
2
1
IBIS
SPICE
0
55
60
Figure 8 shows a similar fall-time comparison between
the SPICE and IBIS models, also based on the ADS8319.
Simulated model conditions were based on a 5-V power
supply, a junction temperature of 25°C, and a typical
process corner.
It is common to calculate a figure of merit (FOM) when
curves like those in Figures 7 and 8 are compared. The
FOM calculation is
 ∑N

f =1 X i (golden) − X i (DUT)
,
FOM = 100 × 1 −
DX × N


where Xi(golden) is a time sample of the SPICE-deck
curve, Xi(DUT) is the matching time sample of the IBISmodel curve, DX is the range of data points, and N is the
number of samples. The FOM formula compares the two
waveforms by summing the absolute value of the x-axis
differences between two data points. This sum is divided
by the range of the data points as well as by the number of
data points. A preliminary numerical task must map each
set of data points to a common x-y grid by interpolation.
The FOM for the curves in Figures 7 and 8 combined is
0.68%.
Conclusion
In the past, IBIS models have been known to be of poor
quality. This lack of quality can be rectified by using the
IBIS Open Forum’s QC process. At stage 0 in this process,
an IBIS parser software finds errors in syntax and in the
IBIS model’s format. Stage 1 IBIS QC is implemented with
a visual inspection of the text and graphics. At stage 2, the
IBIS model is mapped back to the product’s data sheet.
Finally, as the modeling engineer generates IBIS models
for SPICE decks, it is important to complete the loop by
validating that the IBIS model does match the SPICE-deck
performance in a PCB environment. Using stages 0, 1, and
Time (ns)
65
70
2 to validate the IBIS model insures reliable simulations
with signal integrity.
References
For more information related to this article, you can down­
load an Acrobat® Reader® file at www.ti.com/lit/litnumber
and replace “litnumber” with the TI Lit. # for the
materials listed below.
Document Title
TI Lit. #
1. Bonnie Baker, “The IBIS model: A conduit
into signal-integrity analysis, Part 1,” Analog
Applications Journal (4Q 2010) . . . . . . . . . . . . slyt390
2. The IBIS Open Forum. (2009, Oct. 30). “IBIS
Quality Specification,” Version 2.0 [Online].
Available: http://www.eda.org/ibis/
quality_ver2.0
—
3. The IBIS Open Forum. (2008, Aug. 29). “IBIS
(I/O Buffer Information Specification),”
Version 5.0 [Online]. Available:
—
http://www.eda.org/ibis/ver5.0
4. The IBIS Open Forum. (2000, Apr. 20). “I/O
Buffer Accuracy Handbook,” Rev. 2.0 [Online].
Available: http://www.eda.org/ibis/accuracy/
handbook.pdf
—
5. The IBIS Open Forum. (2000, Sept. 11). “I/O
Buffer Accuracy Report,” Rev. 2.1 [Online].
Available: http://www.eda.org/ibis/accuracy/
report.pdf
—
Related Web sites
dataconverter.ti.com
www.ti.com/sc/device/ADS8319
www.ti.com/sc/device/DAC7718
www.eda.org/ibis
9
Analog Applications Journal
1Q 2011
www.ti.com/aaj
High-Performance Analog Products
TI Worldwide Technical Support
Internet
TI Semiconductor Product Information Center
Home Page
support.ti.com
TI E2E™ Community Home Page
e2e.ti.com
Product Information Centers
Americas Phone
+1(972) 644-5580
Brazil
Phone
0800-891-2616
Mexico
Phone
0800-670-7544
Fax
Internet/Email
+1(972) 927-6377
support.ti.com/sc/pic/americas.htm
Europe, Middle East, and Africa
Phone
European Free Call
International
Russian Support
00800-ASK-TEXAS
(00800 275 83927)
+49 (0) 8161 80 2121
+7 (4) 95 98 10 701
Note: The European Free Call (Toll Free) number is not active
in all countries. If you have technical difficulty calling the free
call number, please use the international number above.
Fax
Internet
Direct Email
+(49) (0) 8161 80 2045
support.ti.com/sc/pic/euro.htm
asktexas@ti.com
Japan
Phone
Fax
Domestic
International
Domestic
0120-92-3326
+81-3-3344-5317
0120-81-0036
Internet/Email
International
Domestic
support.ti.com/sc/pic/japan.htm
www.tij.co.jp/pic
Asia
Phone
International
+91-80-41381665
Domestic
Toll-Free Number
Note: Toll-free numbers do not support
mobile and IP phones.
Australia
1-800-999-084
China
800-820-8682
Hong Kong
800-96-5941
India
1-800-425-7888
Indonesia
001-803-8861-1006
Korea
080-551-2804
Malaysia
1-800-80-3973
New Zealand
0800-446-934
Philippines
1-800-765-7404
Singapore
800-886-1028
Taiwan
0800-006800
Thailand
001-800-886-0010
Fax
+8621-23073686
Emailtiasia@ti.com or ti-china@ti.com
Internet
support.ti.com/sc/pic/asia.htm
Important Notice: The products and services of Texas Instruments Incorporated and
its subsidiaries described herein are sold subject to TI’s standard terms and conditions
of sale. Customers are advised to obtain the most current and complete information
about TI products and services before placing orders. TI assumes no liability for
applications assistance, customer’s applications or product designs, software
performance, or infringement of patents. The publication of information regarding any
other company’s products or services does not constitute TI’s approval, warranty or
endorsement thereof.
A122010
E2E is a trademark of Texas Instruments. Acrobat and Reader are registered trademarks of
Adobe Systems Incorporated. Linux is a registered trademark of Linus Torvalds. Sun is a
registered trademark of Sun Microsystems Inc. All other trademarks are the property of their
respective owners.
© 2011 Texas Instruments Incorporated
SLYT400
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
www.ti.com/audio
Communications and Telecom www.ti.com/communications
Amplifiers
amplifier.ti.com
Computers and Peripherals
www.ti.com/computers
Data Converters
dataconverter.ti.com
Consumer Electronics
www.ti.com/consumer-apps
DLP® Products
www.dlp.com
Energy and Lighting
www.ti.com/energy
DSP
dsp.ti.com
Industrial
www.ti.com/industrial
Clocks and Timers
www.ti.com/clocks
Medical
www.ti.com/medical
Interface
interface.ti.com
Security
www.ti.com/security
Logic
logic.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Power Mgmt
power.ti.com
Transportation and
Automotive
www.ti.com/automotive
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
Wireless
www.ti.com/wireless-apps
RF/IF and ZigBee® Solutions
www.ti.com/lprf
TI E2E Community Home Page
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising