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Texas Instruments ADS54J20EVM User guides
User's Guide
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ADS54J20EVM
This user's guide describes the function and use of the ADS54J20 evaluation module. Included in this
document are a quick-start guide, instructions for optimizing evaluation results, software description,
alternate hardware configurations, and jumper, connector, and LED descriptions.
Contents
Overview ...................................................................................................................... 2
1.1
Required Hardware ................................................................................................. 2
1.2
Required Software .................................................................................................. 2
1.3
Evaluation Board Feature Identification Summary ............................................................. 3
1.4
References .......................................................................................................... 3
2
Quick Start Guide ............................................................................................................ 4
2.1
Software Installation ................................................................................................ 4
2.2
Hardware Setup Procedure ....................................................................................... 5
2.3
Software Setup Procedure......................................................................................... 6
2.4
Quick Start Trouble Shooting .................................................................................... 10
3
Optimizing Evaluation Results ............................................................................................ 11
3.1
Clocking Optimization ............................................................................................. 11
3.2
Coherent Input Source............................................................................................ 11
3.3
HSDC Pro Settings................................................................................................ 11
4
Software Description ....................................................................................................... 12
4.1
ADS54J20 EVM GUI .............................................................................................. 12
4.2
Low Level View .................................................................................................... 13
5
Alternate Hardware Configurations ...................................................................................... 14
5.1
Clocking Options .................................................................................................. 14
5.2
Analog Input Options ............................................................................................. 15
Appendix A
Jumper, Connector, and LED Descriptions .................................................................... 16
1
List of Figures
1
EVM Feature Locations ..................................................................................................... 3
2
Quick Start Test Setup ...................................................................................................... 5
3
ADS54Jxx GUI Low Level View Tab ...................................................................................... 7
4
HSDC Pro GUI Main Panel ................................................................................................. 7
5
Channel 1 Data Capture Results from Quick Start Procedure......................................................... 9
6
ADS54Jxx GUI.............................................................................................................. 12
7
Low Level View Tab
8
9
.......................................................................................................
GUI CMOS Selection ......................................................................................................
LMK04828 Clock Outputs Tab ...........................................................................................
13
14
15
List of Tables
1
Quick Start Performance Measurements ................................................................................. 9
2
Troubleshooting Tips....................................................................................................... 10
3
HSDC Pro Settings to Optimize Results ................................................................................ 11
4
ADS54J20 GUI Tab Descriptions ........................................................................................ 12
5
Low Level View Controls .................................................................................................. 13
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Overview
1
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6
Jumper Descriptions and Default Settings .............................................................................. 16
7
Connector Descriptions .................................................................................................... 16
8
LED Descriptions ........................................................................................................... 17
Overview
The ADS54J20EVM is an evaluation module (EVM) designed to evaluate the ADS54J20 high-speed,
JESD204B interface ADCs. The EVM includes an onboard clocking solution (LMK04828), transformer
coupled inputs, full power solution, and easy-to-use software GUI and USB interface.
The following features apply to this EVM:
• Transformer-coupled signal input network allowing a single-ended signal source from 0.4 MHz to 800
MHz
• LMK04828 system clock generator that generates field-programmable gate array (FPGA) reference
clocks for the high-speed serial interface and may be used to generate the ADC sampling clock
(default setting)
• Transformer-coupled clock input network to test the ADC performance with a very low-noise clock
source
• High-speed serial data output over a standard FPGA Mezzanine Card (FMC) interface connector
The ADS54J20EVM is designed to work seamlessly with the TSW14J56EVM, Texas Instruments’
JESD204B data capture/ pattern generator card, through the High Speed Data Converter Pro (HSDC Pro)
software tool for high-speed data converter evaluation. The ADS54J20EVM was also designed to work
with many of the development kits from leading FPGA vendors that contain an FMC connector.
1.1
Required Hardware
The following equipment is included in the EVM evaluation kit:
• ADS54J20 Evaluation Board (EVM)
• Power supply cable
• Mini-USB cable
The following list of equipment are items that are not included in the EVM evaluation kit but are items
required for evaluation of this product in order to achieve the best performance:
• TSW14J56EVM Data Capture Board, two +5-V power supplies and Mini-USB cable
• Computer running Microsoft® Windows® 8, Windows 7, or Windows XP
• One Low-Noise Signal Generator. Recommendations:
– RF generator, > +17 dBm, < –40 dBc harmonics, < 500 fs jitter 20 kHz–20 MHz, 10-MHz to 2-GHz
frequency range
– Examples: TSW2170EVM, HP HP8644B, Rohde & Schwarz SMA100A
• Bandpass filter for desired analog input. Recommendations:
– Bandpass filter, ≥ 60-dB harmonic attenuation, ≤ 5% bandwidth, > +18-dBm power, < 5-dB insertion
loss
– Examples: Trilithic 5VH-series Tunable BPF, K&L BT-series Tunable BPF, TTE KC6 or KC7-series
Fixed BPF
• Signal path cables, SMA and/or BNC with BNC-to-SMA adapters
1.2
Required Software
The following software is required to operate the ADS54J20EVM and available online. See References,
Section 1.4 for links.
• ADS54Jxx_EVM_GUI (Rev x)
The following software is required to operate the TSW14J56EVM and available online. See References,
Section 1.4 for links.
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Overview
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•
1.3
High Speed Data Converter Pro software
Evaluation Board Feature Identification Summary
The EVM features are labeled in Figure 1.
LMK04828
Reference
Input
+5-V Input Power
Connector
USB Connector
(Backside)
Channel B
Analog Input
ADS54J20
External
ADC Clock
Input
FMC
Connector
(Backside)
ADC
Channel A
Analog Input
ADC Reset Switch
Figure 1. EVM Feature Locations
1.4
References
•
•
•
•
•
ADS54J20EVM software, available at: www.ti.com/tool/ADS54J20EVM
ADS54J20 datasheet (SBAS766), available at www.ti.com/product/ADS54J20
LMK04828 datasheet (SNAS605), available at www.ti.com/product/lmk04828
TSW14J56EVM User’s Guide (SLWU086), available at www.ti.com/tool/TSW14J56EVM
High Speed Data Converter Pro software (SLWC107) and User's Guide (SLWU087), available at
www.ti.com/tool/dataconverterpro-sw
NOTE: Schematics, layout, and BOM are available on the ADS54J20EVM product page on
www.ti.com.
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Quick Start Guide
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Quick Start Guide
This section guides the user through the EVM test procedure to obtain a valid data capture from the
ADS54J20EVM using the TSW14J56EVM capture card. This should be the starting point for all
evaluations.
2.1
Software Installation
The proper software must be installed before beginning evaluation. See Section 1.2 for a list of the
required software. The References section of this document contains links to find the software on the TI
website.
Important: The software must be installed before connecting the ADS54J20EVM and TSW14J56 to the
computer for the first time.
2.1.1
ADS54Jxx EVM GUI Installation
The ADS54Jxx EVM GUI is used to control the ADS54J20EVM. It must be used to properly configure the
devices on the EVM.
1. Download the ADS54Jxx EVM GUI from the TI website. The References section of this document
contains links to find the software on the TI website.
2. Extract the files from the zip file.
3. Run setup.exe and follow the installation prompts.
2.1.2
High Speed Data Converter Pro GUI Installation
High Speed Data Converter Pro (HSDC Pro) is used to control the TSW14J56EVM and analyze the
captured data. Please see the HSDC Pro user’s guide (SLWU087) for more information.
1. Download HSDC Pro from the TI website. The References section of this document contains the link to
find the software on the TI website.
2. Extract the files from the zip file.
3. Run setup.exe and follow the installation prompts.
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2.2
Hardware Setup Procedure
A typical test setup using the ADS54J20EVM and TSW14J56EVM is shown in Figure 2. This is the test
setup used for the quick start procedure. The rest of this section describes the hardware setup steps.
Low-Noise
Power Supply
5 VDC @ 3 A
5-VDC Power Supply Cable
Analog Input
Low-Noise
Signal Generator
Mini-USB Cable
USB 3.0 Cable
BINP
Power
Switch
170 MHz, +15 dBm
AINP
170-MHz
Bandpass
Filter
ADS54J20
EVM
TSW14J56EVM
Low-Noise
Power Supply
5 VDC @ 3 A
PC Running
HSDC Pro
Figure 2. Quick Start Test Setup
2.2.1
TSW14J56EVM Setup
First, setup the TSW14J56EVM using the following steps:
1. Connect the ADS54J20EVM to the TSW14J56EVM using the FMC connectors.
2. Connect the included power supply cable to connector J11 (+5V IN) and the other end to a +5 VDC
±0.3 VDC 3-A power supply.
3. Connect the included mini-USB cable to the USB connector (J9).
4. turn on the power supply. Flip the power switch (SW6) to the ON position. The board should draw
around 0.5 A after power up. This will increase to around 1.7 A when loaded with firmware.
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ADS54J20EVM Setup
Next, setup the ADS54J20EVM using the following:
1. Connect the included 5-V power supply cable to connector J9 of the EVM. Connect the red wire to +5
VDC ±0.1 VDC of a power supply rated for at least 3 A. Connect the black wire to GND of the power
supply.
2. Connect the included mini-USB cable to the USB connector J8.
3. Turn on the power supply. The power draw should be around 0.66 A. When the board is configured, it
will draw approximately 1.35 A.
4. Set the analog input signal generator for 170 MHz, and about +15 dBm of power.
5. Place a narrow pass-band band-pass filter at the output of the analog signal generator to remove noise
and harmonics from the signal generator.
6. Connect the analog input signal generator to the EVM though SMA connector AINP (J2).
2.3
Software Setup Procedure
The software can be opened and configured once the hardware is properly setup.
2.3.1
ADS54J20 GUI Configuration
1. Open the ADS54Jxx EVM GUI by going to Start Menu → All Programs → Texas Instruments ADCs →
ADS54Jxx EVM GUI.
2. Verify that the green USB Status indicator is lit in the top right corner of the GUI. If it is not lit, click the
Reconnect USB button and check the USB Status indicator again. If it is still not lit, then verify the EVM
is connected to the computer through the included mini-USB cable.
3. Click on the Low Level View tab then click the Load Config button.
4. Navigate to C:\Program Files(86)\Texas Instruments\ADS54Jxx EVM GUI\Configuration Files, select
the file called LMK_Config_Onboard_983p04_MSPS.cfg, then click OK. This programs the LMK04828
to provide a 983.04 MHz clock to the ADC.
5. Verify that the LMK04828 phase lock loop (PLL) is locked by checking that the PLL2 LOCKED LED
(D3) is lit.
6. Once the LMK04828 PLL is locked, press SW1 (ADC RESET) to provide a hardware reset to the ADC.
This switch is located in the middle of the EVM.
7. In the Low Level View tab, click Load Config. Select the file called ADS54J20_LMF_8224.cfg and click
OK. The ADS54J20EVM is now configured for no decimation and 8 JESD204B lanes.
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Low Level View Tab
USB Status
Load Config
Figure 3. ADS54Jxx GUI Low Level View Tab
2.3.2
HSDC Pro GUI Configuration
1. Open High Speed Data Converter Pro by going to Start Menu → All Programs → Texas Instruments →
High Speed Data Converter Pro. The GUI main page looks as shown in Figure 4.
Figure 4. HSDC Pro GUI Main Panel
2. When prompted to select the capture board, select the TSW14J56 whose serial number corresponds
to the serial number on the TSW14J56EVM and click OK. This popup can be accessed through the
Instrument Options menu.
3. If no firmware is currently loaded, there is a message indicating this. Click on OK.
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4. Verify the ADC tab at the top of the GUI is selected.
5. Use the Select ADC drop-down menu at the top left corner to select ADS54J20_LMF_8224.
6. When prompted to update the firmware for the ADC, click Yes and wait for the firmware to download to
the TSW14J56. This takes about 30-40 seconds.
7. Enter “983.04M” into the ADC Output Data Rate field at the bottom left corner then click outside this
box or press return on the PC keyboard.
8. The GUI displays the new lane rate of the SerDes interface based off of the sample rate and other
parameters from the loaded configuration files. Click OK.
9. Click the Instrument Options menu at the top of HSDC Pro and select Reset Board.
10. Click Capture in HSDC Pro to capture data from the ADC.
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11. The results from the captured data of Channel 1 should look like Figure 5 and the performance should
be similar to Table 1. If this result is not achieved, then see the Quick Start Troubleshooting section of
this document.
Figure 5. Channel 1 Data Capture Results from Quick Start Procedure
Table 1. Quick Start Performance Measurements
Result
Measured Value
Units
SNR
69.25
dBFS
SFDR
85.31
dBFS
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Quick Start Trouble Shooting
Use Table 2 to assist with problems that may have occurred during the quick start procedure.
Table 2. Troubleshooting Tips
Issue
Troubleshooting Tips
General Problems
Verify the test setup shown in Figure 2 and repeat the setup procedure as described in this
document.
Check power supplies to the EVM's. Verify that the power switches are in the ON position
and supplies are drawing appropriate current.
Check signal and clock connections to the EVM.
Check that all boards are properly connected together.
Try pressing the CPU_RESET button on the TSW14J56EVM.
Try power-cycling the external power supply to the EVM and reprogram the LMK and ADC
devices.
TSW14J56 LEDs are not correct:
D1, D5 – N/A
D2, D4 – Blinking
D3, D6, D7 – OFF
D8, D28 – ON
Verify the settings of the configuration switches on the TSW14J56EVM.
Verify that the EVM configuration GUI is communicating with the USB and that the
configuration procedure has been followed.
(LEDs Not Blinking) Reprogram the LMK device.
Try pressing the CPU_RESET button on the TSW14J56EVM.
Try capturing data in HSDC Pro to force an LED status update.
Device GUI is not working properly
Verify that the USB cable is plugged into the EVM and the PC.
Check the computer’s Device Manager and verify that a USB Serial Device is recognized
when the EVM is connected to the PC.
Verify that the green USB Status LED light in the top right corner of the GUI is lit. If it is not
lit, press Reconnect FTDI button.
Try restarting the configuration GUI.
Check default jumper connections as shown in Appendix A.
HSDC Pro Software is not
capturing good data or analysis
results are incorrect.
Verify that the TSW14J56EVM is properly connected to the PC with a mini-USB cable and
that the board serial number is properly identified by the HSDC Pro software.
Check that the proper ADC device is selected. In default conditions, ADS54J20_LMF_8224
should be selected.
Check that the analysis parameters are properly configured.
Check that the fundamental power is no larger than -1 dBFs.
HSDC Pro Software gives a TimeOut error when capturing data
Try to reprogram the LMK device and reset the JESD204 link.
Sub-Optimal Measured
Performance
Make sure an ADC hardware reset was issued after loading the LMK but before loading the
ADC configuration file.
Verify that the ADC sampling rate is correct in the HSDC Pro software.
Check that the spectral analysis parameters are properly configured.
Verify that bandpass filters are used in the clock and input signal paths and that low-noise
signal sources are used.
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Optimizing Evaluation Results
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3
Optimizing Evaluation Results
This section assists the user in optimizing the performance during evaluation of the product.
3.1
Clocking Optimization
The sampling clock provided to the ADC needs to have very low phase noise to achieve optimal results.
The default EVM configuration uses the LMK04828 clocking device to generate the sampling clock. There
are two options to improve the clock noise performance.
1. To achieve the best performance, the LMK04828 can be bypassed in favor of an externally provided
clock that is transformer coupled to the ADC. The clock must have very low noise and must use an
external narrow pass-band filter to achieve optimal noise performance. The clock amplitude must be
within the datasheet limits. See Section 5 for more information regarding this setup.
2. The LMK04828 can be used as a clock distributor by using an external clock as the input to the
LMK04828. Filters should still be used on the clock to optimize the noise performance. See Section 5.2
for more information regarding this setup.
3.2
Coherent Input Source
A Rectangular window function can be applied to the captured data when the sample rate and the input
frequency are set precisely to capture an integer number of cycles of the input frequency (sometimes
called coherent frequency). This may yield better SNR results. The clock and analog inputs must be
frequency locked (such as through 10-MHz references) in order to achieve coherency.
3.3
HSDC Pro Settings
HSDC Pro has some settings that can help improve the performance measurements. These are
highlighted in Table 3.
Table 3. HSDC Pro Settings to Optimize Results
HSDC Pro Feature
Description
Analysis Window (samples)
Selects the number of samples to include in the selected test analysis. Collect more data to
improve frequency resolution of Fast-Fourier Transform (FFT) analysis. If more than 65,536
samples are required, the setting in the Data Capture Options needs to be increased to match this
value.
Data Windowing Function
Select the desired windowing function applied to the data for FFT analysis. Select Blackman when
sampling a non-coherent input signal or Rectangle when sampling a coherent input signal.
Test Options → Notch
Frequency Bins
Select bins to be removed from the spectrum and back-filled with the average noise level. May
also customize which Harmonics/Spurs are considered in SNR and THD calculations and select
the method for calculating spur power.
Test Options → Bandwidth
Integration Markers
Enable markers to narrow the Single-Tone FFT test analysis to a specific bandwidth.
Data Capture Options →
Capture Options
Configure the number of contiguous samples per capture (capture depth). May also enable
Continuous Capture and FFT Averaging.
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Software Description
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4
Software Description
4.1
ADS54J20 EVM GUI
Figure 6 shows the front page of the ADS54Jxx EVM GUI as it should be seen upon opening the GUI.
Descriptions for each of the tabs of the GUI are shown in Table 4.
Figure 6. ADS54Jxx GUI
Table 4. ADS54J20 GUI Tab Descriptions
12
Tab
Description
ADS54Jxx
Enables control of the ADS54Jxx features. None of these controls need to be touched for basic operation.
Instead, use the Low Level View tab to load configuration files.
LMK04828
Enables control of many of the LMK04828 features. Configuration files can be used to setup the
LMK04828 in known working configurations, however this tab can be used to setup more advanced
clocking schemes.
Low Level View
Allows write and read access to all device registers. Also allows loading and saving of configuration files.
The device configurations can be saved from this tab for use in the user’s system. See Section 4.2 for
more information.
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4.2
Low Level View
The Low Level View tab, shown in Figure 7, allows configuration of the devices at the bit and field level. At
any time, the controls described in Table 5 may be used to configure or read from the device.
Figure 7. Low Level View Tab
Table 5. Low Level View Controls
Control
Description
Register Map
Displays the devices on the EVM, registers for those devices, and the states of the registers.
• Selecting a register field allows bit manipulation in the Register Data section.
• The Value column shows the value of the register at the time the GUI was last updated due
to a read or write event.
Write Register button
Write to the register highlighted in the Register Map with the value in the Write Data field. This
button must be clicked after changing bits in the register data section.
Write All button
Update all registers shown in the Register Map with the values shown in the Register Map log.
The log can be viewed by double left clicking in the bottom left status bar of this page.
Read Register button
Read from the register highlighted in the Register Map and display the results in the Value
column.
Read All button
Read from all registers in the Register Map and display the current state of hardware. Also
updates the controls in the other tabs.
Load Config button
Load a configuration file from disk and write the registers in the file.
Save Config button
Save a configuration file to disk that contains the current register configuration.
Register Data Cluster
Manipulate individual accessible bits of the register highlighted in the Register Map.
Generic Read/Write Register
buttons
Perform a generic read or write command to the device shown in the Block drop-down box using
the Address and Write Data information
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Alternate Hardware Configurations
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Alternate Hardware Configurations
This section describes alternate hardware configurations in order to achieve better results or to more
closely mimic the system configuration.
5.1
Clocking Options
The default clocking mode uses the LMK04828 to generate the ADC sampling clock and FPGA clocks.
There are three additional clocking options that the EVM supports. These options are described in the
following sections.
5.1.1
External ADC Sampling Clock
An external clock can be used as the sampling clock for the ADC. This clock can be provided through a
transformer using the EXT_ADC_CLK connector (J5). For this option, C65 and C73 need to be uninstalled
and installed at C64 and C72. The LMK04828 must still be used to provide the device clock to the
TSW14J56 and the SYSREF signals to both boards. This option provides the best performance, as long
as the clock source has better phase-noise performance than the LMK04828. The source of the EXT ADC
clock must be synchronized with the LMK04828. To accomplish this, send the 10-MHz reference output
from the signal generator and connect it to J6 (CLKIN) of the ADS54J20EVM. This causes LED D1 to
illuminate indicating the LMK VCXO source is locked to the external reference clock. The provided LMK
configuration files will work in this mode as well. If D1 does not illuminate, the signal from the outside
source may be to low. To correct for this, click on the LMK04828 tab at the top of the GUI. When the
LMK04828 page opens, click on the "PLL1 Configuration" tab. On the left middle side of the GUI, change
the Buffer Type of CLKin1 from "Bipolar" to "CMOS" as shown in Figure 8.
Figure 8. GUI CMOS Selection
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To turn off the ADC clock provided by the LMK04828 to reduce switching noise, click on the LMK04828
tab, then click on Clock Outputs tab, then select Powerdown for DCLK Type under CLKout 2 and 3, as
shown in Figure 9.
Figure 9. LMK04828 Clock Outputs Tab
5.1.2
External LMK04828 Clock (Clock Distribution Mode)
The LMK04828 can be used as a clock distributor. In this case, the LMK04828 uses in input clock source
from CLKIN SMA connector (J6). SJP2 (XO_PWR) can be left open to turn off the onboard VCXO to avoid
crosstalk. To use this mode, load the configuration file named LMK_Config_External_Clock.cfg. This mode
allows generation of frequencies that are not possible with the LMK when using the on-board VCXO.
5.1.3
Clock Generator Using Onboard VCXO
The LMK04828 is used as a clock generator using the onboard 122.88 MHz VCXO. SJP2 must be shorted
to turn on the onboard VCXO. The internal PLLs of the LMK04828 can be used with the onboard VCXO to
generate the desired frequencies. To use this mode, load one of the configuration files named
LMK_Config_Onboard_xxxx_MSPS.cfg, where xxxx corresponds to the desired ADC sampling rate. A
10-MHz signal can be brought into the CLKIN input to synchronize to external instruments. This is the
board default mode of operation.
5.2
Analog Input Options
The ADS54J20EVM allows for a differential analog input configuration in addition to the default using the
single-ended transformer-coupled input. This option is described in the following section.
5.2.1
Differential Input
The analog input transformers can be bypassed in favor of a differential input source. This allows for a
wider range of input frequencies, including the possibility of DC coupling. To configure the EVM for a
differential analog input on Channel A, remove C6, C7, and R7 and install R3, R4, C1, and C3. For
channel B, remove R8, C14, and C15 and install R21, R22, C12, and C13. For a DC-coupled application,
swap the series capacitors with 0-Ω resistors. The input signal must be biased to the required ADC input
common mode voltage.
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Appendix A
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Jumper, Connector, and LED Descriptions
A.1
Jumper Descriptions
The EVM jumpers are shown in Table 6 as well as the default settings for the jumpers. Use this table to
reset the EVM in the default configuration, in case of issues.
Table 6. Jumper Descriptions and Default Settings
A.2
Jumper
Description
Default setting
SW1
ADC hardware reset (active high)
Logic low
SJP2
Power enable to VCXO oscillator Y1. Default is power on.
Shunt pins 1-2
SJP1
Selects either 3.3 V or GND for Y1 enable. Default is open
Open
SJP3
Selects either diff sync or single-ended sync from FMC. Default is diff.
Shunt pins 2-3
Connector Descriptions
The EVM connectors and their function are described in Table 7.
Table 7. Connector Descriptions
16
Connector
Description
J2
Channel A positive analog input
J1 (Not installed)
Channel A negative analog input. Used for differential input mode only.
J3
Channel B positive analog input
J4 (Not installed)
Channel B negative analog input. Used for differential input mode only.
J5
External ADC sample clock input
J6
LMK04828 reference clock input
J7
JESD204B FMC connector. Interfaces to TSW14J56EVM or FPGA evaluation boards
J8 (USB)
USB interface connector. Not used.
J9 (+5V IN)
5-V power supply input
Jumper, Connector, and LED Descriptions
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A.3
LED Descriptions
The EVM LEDs are described Table 8.
Table 8. LED Descriptions
Connector
Description
D3
Not used
D4
5 VDC power present
D2
LMK04828 locked to VCXO
D1
VCXO locked to external reference applied to J6
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Jumper, Connector, and LED Descriptions
Copyright © 2016, Texas Instruments Incorporated
17
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