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Texas Instruments ADC16DX370EVM (Rev. A) User guides
ADC16DX370EVM
User's Guide
Literature Number: SLAU529A
February 2014 – Revised December 2014
Contents
1
2
3
Introduction ......................................................................................................................... 4
Equipment ........................................................................................................................... 6
2.1
Evaluation Board Feature Identification Summary ................................................................... 6
2.2
Required Equipment ..................................................................................................... 6
Setup Procedure .................................................................................................................. 7
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
4
.....................................................
Install the Configuration GUI Software ................................................................................
Connect the EVM and TSW14J56EVM ...............................................................................
Connect the Power Supplies to the Boards (Power Off) ............................................................
Connect the Signal Generators to the EVM (RF Signal Off) .......................................................
Turn the TSW14J56EVM Power on and Connect to the PC .......................................................
Turn the EVM Power Supplies on and Connect to the PC .........................................................
Turn the Signal Generator RF Outputs on ............................................................................
Open the HSDP Software and Load the FPGA Image to the TSW14J56EVM ..................................
Program the LMK04828 Using the Configuration Tab on the HSDC Pro Software .............................
Calibrate the ADC Device on the EVM ................................................................................
Install the High Speed Data Converter Pro (HSDP) Software
7
7
8
8
8
8
8
8
9
9
3.12
Verify the TSW14J56EVM Switch Settings, Initialize the JESD204B Link (CPU_RESET), and Verify
TSW14J56EVM Status LEDs ........................................................................................... 9
3.13
Capture Data Using the HSDP Software ............................................................................ 10
3.14
Re-Verify TSW14J56EVM Status LEDs ............................................................................. 11
Device Configuration .......................................................................................................... 12
4.1
Supported JESD204B Device Features ............................................................................. 12
4.2
Using the Device Configuration GUI ................................................................................. 12
.......................................................................................................
......................................................................................................
5
Evaluation Troubleshooting .................................................................................................
6
References ........................................................................................................................
Appendix A ...............................................................................................................................
A.1
TSW14J56EVM LED Bank and Switch Configuration ............................................................
A.2
HSDC Pro Settings for Optional ADC Device Configuration ....................................................
A.2.1
Changing the Number of Serial Output Lanes (L) .....................................................
A.2.2
Changing the Number of Frames per Multi-Frame (K) ...............................................
A.3
Exercising the SYSREF Input of the ADC .........................................................................
A.4
Customizing the EVM for Optional Clocking Support ............................................................
A.4.1
LMK04828 Configuration Options .......................................................................
A.4.2
Configuring the ADC Device to Use a Device Clock and SYSREF from the LMK04828 ........
A.4.3
Providing an Alternate LMK04828 Reference Clock ..................................................
Revision History ..........................................................................................................................
2
7
4.3
Tab Organization
14
4.4
Low-Level Control
14
Table of Contents
16
16
17
17
18
18
18
18
18
18
19
19
19
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List of Figures
1
EVM Feature Locations ..................................................................................................... 6
2
EVM Test Setup.............................................................................................................. 7
3
High Speed Data Converter Pro (HSDP) GUI .......................................................................... 11
4
Configuration GUI Intro Tab
13
5
Configuration GUI ADC Core Tab
13
6
..............................................................................................
.......................................................................................
Low-Level Register Control Tab .........................................................................................
15
List of Tables
1
Default State of LEDs on the TSW14J56EVM During Typical Operation ............................................ 9
2
Default State of LEDs on the TSW14J56EVM during Typical Operation ........................................... 11
3
Supported and Non-Supported Features of the JESD204B Device ................................................. 12
4
Low-Level Controls ......................................................................................................... 14
5
Troubleshooting
6
7
............................................................................................................
Meaning of LEDs on the TSW14J56EVM...............................................................................
Required State of Switches on the TSW14J56EVM ...................................................................
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List of Figures
16
17
17
3
User's Guide
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ADC16DX370EVM User's Guide
1
Introduction
The ADC16DX370EVM is an evaluation board used to evaluate the ADC16DX370 analog-to-digital
converter (ADC) from TI. The ADC16DX370 device is a dual-channel, 16-bit ADC capable of operating at
sampling rates up to 370 Mega samples per second (MSPS). The ADC16DX370 device output data is
transmitted over a standard JESD204B high-speed serial interface.
This evaluation board also includes the following important features:
• Transformer-coupled signal input network allowing a single-ended signal source from 5 MHz to 1 GHz
• LMK04828 system clock generator that generates FPGA reference clocks for the high-speed serial
interface and may be used to generate the ADC sampling clock
• Transformer-coupled clock input network to test the ADC performance with a very low-noise clock
source
• High-speed serial data output over a standard FMC interface connector
• Device register programming via USB connector and FTDI USB-to-SPI bus translator
The digital data from the ADC16DX370EVM board can be quickly and easily captured with the
TSW14J56EVM data capture board. The TSW14J56EVM captures the high-speed serial data, decodes
the data, stores the data in memory, then uploads it to a connected PC through a USB interface for
analysis. The High Speed Data Converter Pro (HSDC Pro) software on the PC communicates with the
hardware and processes the data.
K&L Microwave is a trademark of K&L Microwave.
Rohde & Schwarz is a trademark of Rohde & Schwarz.
Trilithic is a trademark of Trilithic.
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Introduction
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With proper hardware selection in the HSDC Pro software, the TSW14J56 device is automatically
configured to support a wide range of operating speeds of the ADC16DX370EVM, but it may not cover the
full operating range of the ADC device. Serial data rates (and corresponding sampling rates) of 7.4 Gb/s
(370 MSPS) down to 1.6 Gb/s (80 MSPS) are supported.
For the rest of this document, the ADC16DX370EVM evaluation board is referred to as EVM and the
ADC16DX370 device is referred to as ADC device.
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5
Equipment
2
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Equipment
This section describes how to setup the EVM on the bench with the proper equipment to evaluate the full
performance of the ADC device.
Evaluation Board Feature Identification Summary
Ch. A Analog Input
FMC Connector
(Back-side)
2.1
ADC
Ch. B Analog Input
Input Power
Connectors
Primary (+4V)
-+
LMK
JP1
USB Register
Configuration
Connector
SYSREF Input
CLK Input
EXTREF Input
(Optional LMK04828
reference)
Figure 1. EVM Feature Locations
2.2
Required Equipment
The following equipment and documents are included in the EVM evaluation kit:
• Evaluation board (EVM)
• Mini-USB cable
The following equipment is not included in the EVM evaluation kit, but is required for evaluation of this
product.
• TSW14J56EVM data capture board plus +5-V power supply and mini-USB cable
• High Speed Data Converter Pro software
• PC computer running Windows XP, 7, or 8
• Two low-noise signal generators. TI recommends the following generators:
– RF generator, > +17 dBm, < –40 dBc harmonics, < 500 fs jitter 20 kHz to 20 MHz, 10 MHz to 2
GHz frequency range
– HP HP8644B
– Rohde & Schwarz™ SMA100A
• Bandpass filter for clock input (370MHz or desired frequency). The following filters are recommended:
– Bandpass filter, ≥ 60 dB harmonic attenuation, ≤ 5% bandwidth, > +18 dBm power, < 5 dB insertion
loss
– Trilithic™ 5VH-series tunable BPF
– K&L Microwave™ BT-series tunable BPF
– TTE KC6 or KC7-series fixed BPF
• Bandpass filter for analog input signal. Recommended filters similar to the clock path filter.
• 6-dB resistive attenuator, SMA, 50 Ω
• Signal-path and clock-path cables, SMA or BNC (or both SMA and BNC)
• +4 V, 2-A power supply and cable
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Setup Procedure
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3
Setup Procedure
Analog Input
Low Noise
Signal Generator
Mini-USB Cable
+5V Power Supply
Power
Switch
OFF ON
Bandpass
Filter
6dB, 50Ÿ
Attenuator
Low Noise
Power Supply
(+4V, 2A)
TSW14J56EVM
ADC EVM
Channel A
Channel B
Clock Input
Low-Noise
Signal Generator
PC Computer
Running HSDC Pro
+4V
CLK
+
-
Bandpass
Filter
Mini-USB Cable
Figure 2. EVM Test Setup
NOTE: The HSDP software must be installed before connecting the TSW14J56EVM to the PC for
the first time.
3.1
Install the High Speed Data Converter Pro (HSDP) Software
Download the most recent version of the HSDP software from www.ti.com/tool/dataconverterpro-sw.
Follow the installation instructions to install the software.
3.2
Install the Configuration GUI Software
1. Download the Configuration GUI software from the EVM product page at www.ti.com.
2. Extract files from the zip file.
3. Run “setup.exe” and follow the instructions.
3.3
Connect the EVM and TSW14J56EVM
With the power off, connect the EVM to the TSW14J56EVM via the FMC connector as shown in Figure 2.
Check that the standoffs provide the proper height for robust connector connections.
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Setup Procedure
3.4
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Connect the Power Supplies to the Boards (Power Off)
1. Confirm that the power switch on the TSW14J56EVM is in the off position. Connect the +5-V power
supply adapter to the TSW14J56EVM.
2. Confirm that the +4-V power supply for the EVM is turned off. Connect the +4-V power supply to the
green power connector (closest to the USB connector).
CAUTION
Do not turn on the power to any board. Powering up the boards in the incorrect
order could potentially cause damage to one of the boards.
3.5
Connect the Signal Generators to the EVM (RF Signal Off)
1. Connect a signal generator to the CLK input of the EVM through a bandpass filter. This must be a lownoise signal generator. TI recommends a Trilithic™ tunable bandpass filter to filter the signal coming
from the generator. Configure the signal generator for 370 MHz. When using an RF signal generator,
the power input to the CLK SMA connector should be +11 dBm (2.2 Vpp into 50 Ω) for best
performance and must be at least +4 dBm to function. Therefore, the signal generator should be
increased above +11 dB by an amount equal to any additional attenuation in the clock signal path,
such as the insertion loss of the bandpass filter. For example, if the filter insertion loss is 2 dB, the
signal generator should be set to +11 dBm + 2 dB = +13 dBm.
2. Connect a signal generator to the VINA+ input of the EVM through a bandpass filter and attenuator at
the SMA connector. This must be a low-noise signal generator. TI recommends a Trilithic™ tunable
bandpass filter to filter the signal from the generator. Configure the signal generator for 70 MHz, +0
dBm.
3. It is important to frequency lock the input signal generator to the clock signal generator using the 10MHz reference. This is required to achieve coherent sampling of the input signal and is recommended,
if possible. Frequency locking this signal generator is not required for non-coherent sampling.
NOTE:
3.6
Do not yet turn on the RF output of any signal generator.
Turn the TSW14J56EVM Power on and Connect to the PC
1. Turn the power switch of the TSW14J56EVM on.
2. Connect a mini-USB cable from the PC to the TSW14J56EVM.
3. If this is the first time connecting the TSW14J56EVM to the PC, then follow the on-screen instructions
to automatically install the device drivers. See the TSW14J56EVM User’s Guide for more specific
instructions.
3.7
Turn the EVM Power Supplies on and Connect to the PC
1. Turn the +4-V power supply on to power up the EVM.
2. Connect the EVM to the PC with the mini-USB cable.
3.8
Turn the Signal Generator RF Outputs on
Turn on the RF signal outputs of the signal generators connector to CLK and VINA-.
3.9
Open the HSDP Software and Load the FPGA Image to the TSW14J56EVM
1. Open the HSDP software.
2. Press OK to confirm the serial number of the TSW14J56EVM device.
3. Select the ‘ADC16DX370_LMF_222’ device from the ADC select drop-down in the top left corner and
press 'Yes' to update the firmware.
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NOTE: If the user configures the EVM with options other than the default register values, different
instructions may be required for selecting the device in HSDC Pro. See the Appendix A for
more details.
4. Enter the ADC sampling rate (Fs) as 370M or the desired sampling rate. This number should be equal
to the actual sampling rate of the device and must be updated if the sampling rate changes.
3.10 Program the LMK04828 Using the Configuration Tab on the HSDC Pro Software
1. Note that selecting the EVM in the ADC select drop-down menu made an additional tab appear in
HSDC Pro. Select the tab in the HSDC Pro software and navigate to the ‘Clock Dist’ sub-tab.
2. Press the ‘Configuration 1’ button. Verify that pressing the button changes the state of the LEDs on the
translation card, or that it changes the current draw from the +4-V power supply.
NOTE: The EVM configuration tabs in HSDC Pro may have a procedure that instructs the user to
program the LMK04828 using a 'Configuration 1' button on a different tab. The Configuration
1' button on either tab performs the same function.
3.11 Calibrate the ADC Device on the EVM
1. With the FTDI SPI GUI open on the PC, navigate to the ‘Intro’ tab.
2. Press the calibrate button to calibrate the ADC.
NOTE: This calibrate button sets the ADC in power-down mode and then returns the ADC to normal
operation which executes core calibration. Post-power-up calibration is only mandatory if the
CLKDIV value is changed or if the sampling rate is changed.
3.12 Verify the TSW14J56EVM Switch Settings, Initialize the JESD204B Link
(CPU_RESET), and Verify TSW14J56EVM Status LEDs
1. Observe the switches and jumpers on the TSW14J56EVM and verify that they are in the correct
position. The required switch settings are shown in Table 4.
2. Press the CPU_RESET button (SW7) on the TSW14J56EVM. This button is used to reset the
JESD204B receiver core in the receiving FPGA and should be pressed after power-up, after changing
the test setup, or after changing particular device configuration registers.
3. Verify the status of the D1 to D8 LEDs on the TSW14J56EVM. See the Appendix A for more
information regarding the status LEDs.
Table 1. Default State of LEDs on the TSW14J56EVM
During Typical Operation
LED
Status
D1
Blinking
D2
On
D3
Blinking
D4
On
D5
On
D6
Off
D7
Off
D8
On
FPGA_DONE
On
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Setup Procedure
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3.13 Capture Data Using the HSDP Software
1. Verify that ‘ADC16DX370_LMF_222’ is the selected device.
2. Enter the ‘ADC sampling rate (Fs)’ as the desired sampling rate. This value must be equal to the
operating sampling rate of the device.
3. It is important to check the ‘Auto Calculate Coherent Frequencies’ checkbox. Enter the frequency of
the analog input signal generator into the ‘ADC Input Target’ box and press Enter. Update the analog
input signal generator to the calculated frequency.
4. Select the test to perform.
5. Select the data view.
6. Select the channel to view.
7. Press the capture button to capture new data.
Additional tips:
• Use the ‘Notch Frequency Bins’ from the 'Test Options' file menu to remove bins around DC (eliminate
DC noise and offset) or the fundamental (eliminate phase noise from signal generators).
• Open the ‘Capture Option’ dialog from the 'Data Capture Options' file menu to change the capture
depth or to enable FFT averaging.
• For analyzing only a portion of the spectrum, use the ‘Single Tone’ test with the ‘Bandwidth Integration
Markers’ from the ‘Test Options’ file menu. The ‘Channel Power’ test may also be useful.
• For analyzing only a subset of the captured data, set the ‘Analysis Window (samples)’ setting to a
value less than the number total samples captured and move the green or red markers in the small
transient data window at the top of the screen to select the data subset of interest.
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Setup Procedure
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Select Device and
Capture Data
Choose
Test
Choose
Data
View
Choose
Channel
Check Coherent Freq. Auto‐calculate
Select Size of Data Set
Enter Sampling Rate
Enter Desired Input Frequency
Figure 3. High Speed Data Converter Pro (HSDP) GUI
3.14 Re-Verify TSW14J56EVM Status LEDs
Verify the status of the D1 to D8 LEDs on the TSW14J56EVM. See the Appendix A for more information
regarding the status LEDs.
NOTE: Note that D4 has changed to indicate that the JESD204B link is established.
Table 2. Default State of LEDs on the TSW14J56EVM
during Typical Operation
LED
Status
D1
Blinking
D2
On
D3
Blinking
D4
Off
D5
On
D6
Off
D7
Off
D8
On
FPGA_DONE
On
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Device Configuration
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Device Configuration
The ADC device is programmable via the serial programming interface (SPI) bus accessible through the
FTDI USB-to-SPI converter located on the EVM. A GUI is provided to write instructions on the bus and
program the registers of the ADC device.
See the data sheet, SNVS990, for more information about the registers in the ADC device.
4.1
Supported JESD204B Device Features
The ADC device supports some configuration of the JESD204B interface. Due to limitations in the
STW14J56EVM firmware, all JESD204B link features of the ADC device are not supported. Table 3
describes the supported and non-supported features.
Table 3. Supported and Non-Supported Features of the JESD204B Device
JESD204B Feature
4.2
Supported by ADC Device
Supported by TSW14J56EVM
Number of lanes per channel
(L)
L = 1 or 2
L = 1 supported
L= 2 supported with special instructions for configuring HSDC
Pro software
Number of frames per
multiframe (K)
K = 9 to 32
K = 32 supported
Other K values not supported at this time
Scrambling
Scrambling supported
Scrambling not supported at this time
Test patterns
PRBS7, PRBS15, PRBS23
supported
D21.5, K28.5, ILA, ramp patterns
supported
ILA and RAMP supported
PRBS7, PRBS15, PRBS23, D21.5, K28.5 not supported at this
time
Speed
Lane rates from 7.4 down to 1
Gb/s
Lane rates from 7.4 Gb/s (Fs = 370 MSPS) down to 1.6 Gb/s
(Fs = 80 MSPS)
The Fs parameter must be properly set in HSDC Pro
Using the Device Configuration GUI
The Device Configuration GUI must be installed separately from the HSDC Pro installation, but the
Configuration GUI automatically integrates into the HSDC Pro software. If HSDC Pro is opened the device
is selected corresponding to a Configuration GUI that is already installed, then the Configuration GUI
automatically loads as a selectable tab. If the Configuration GUI is opened before HSDC Pro, it opens as
a standalone GUI.
Figure 4 and Figure 5 show the GUI open to the INTRO tab and ADC CORE Tab respectively. Tabs at the
top of the panel organize the configuration into device and EVM features with user-friendly controls and a
low-level tab for directly configuring the registers. The EVM has two configurable devices, namely the
ADC16DX370 and LMK04828. The register map for each device is provided in the data sheets SNVS990
and SNAS605, respectively.
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Device Configuration
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Figure 4. Configuration GUI Intro Tab
Figure 5. Configuration GUI ADC Core Tab
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Device Configuration
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Tab Organization
Control of the ADC device features is available in the ADC Core, ADC DSP, and JESD204B tabs.
Simplified configuration controls for the LMK04828 are available in the Clock Dist tab. All features of the
ADC Device are configurable using this GUI, although the controls for the LMK04828 are simplified or
restricted to avoid unnecessary complexity.
4.4
Low-Level Control
The Low-Level tab, shown in Figure 6, allows configuration of the devices at the bit-field level. At any time,
the following controls may be used to configure or read from the device.
Table 4. Low-Level Controls
Control
14
Description
Register Map summary
Displays the devices on the EVM, registers for those devices, and the states of the registers
• Clicking on a register field allows individual bit manipulation in the Register Data Cluster
• The value column shows the value of the register at the time the GUI was last updated
• The LR column shows the value of the register at the time the register was last read
Write Register button
Write to the register highlighted in the Register Map Summary with the value in the Write Data field
Write All button
Update all registers shown in the Register Map Summary with the values shown in the Register
Map Summary
Can be used to re-synchronize the GUI with the state of the hardware
Read Register button
Read from the register highlighted in the Register Map Summary and display the results in the
Read Data field
Read All button
Read from all register in the Register Map Summary and display current state of hardware
Load Config button
Load a configuration file from disk and execute the commands in the file
Save Config button
Save a configuration file to disk that contains the current state of configuration
Register Data Cluster
Manipulate individual accessible bits of the register highlighted in the Register Map Summary
Individual Register Cluster
with Read or Write Register
buttons
Perform a generic read or write command to the device shown in the ‘Block’ drop-down box using
the address and write data information
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Figure 6. Low-Level Register Control Tab
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Evaluation Troubleshooting
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Evaluation Troubleshooting
Table 5. Troubleshooting
Issue
6
General problems
• Verify the test setup shown in Figure 2, and repeat the setup procedure as described in this
document.
• Check power supply to EVM and TSW14J56EVM. Verify that the power switches are in the on
position.
• Check signal and clock connections to EVM.
• Visually check the top and bottom layers of the board to verify that nothing looks discolored or
damaged.
• Check the connection of all boards together.
• Try pressing the CPU_RESET button on the TSW14J56EVM.
• Try power-cycling the external power supply to the EVM, and reprogram the LMK and ADC
devices.
TSW14J56 LEDs are not
correct
•
•
•
•
•
•
Configuration GUI is not
working properly
• Verify that the USB cable is plugged into the EVM and the PC.
• Check the computer device manager and verify that a ‘USB serial device’ is recognized when
the EVM is connected to the PC.
• Verify that the green ‘USB Status’ LED light in the top right corner of the GUI is lit. If it is not lit,
press ‘Reconnect FTDI’ button.
• Try restarting the configuration GUI.
Configuration GUI is not
able to connect to the EVM
• Use the free FT_PROG software from FTDI chip and verify that the on-board FTDI chip is
programmed with the product description ‘ADC16DX370EVM’.
HSDP software is not
capturing good data or
analysis results are
incorrect.
• Verify that the TSW14J56EVM is properly connected to the PC with a mini-USB cable and that
the board serial number is properly identified by the HSDP software.
• Check that the proper ADC device is selected. In default conditions, ‘ADC16DX370_LMF_222’
should be selected.
• Check that the analysis parameters are properly configured.
HSDP software gives a timeout error when capturing
data
• Try to reprogram the LMK device and reset the JESD204 link.
• Verify that the ADC sampling rate is correctly set in the HSDP software.
Sub-optimal measured
performance
• Try pressing the ‘Calibrate ADC’ button on the Intro tab of the configuration GUI to recalibrate
the ADC.
• Check that the spectral analysis parameters are properly configured.
• Verify that bandpass filters are used in the clock and input signal paths and that low-noise
signal sources are used.
Verify the settings of the configuration switches on the TSW14J56EVM.
Verify that the clock going to the CLK input is connected and the appropriate LEDs are blinking.
Verify that the ADC device internal registers are configured properly.
If LEDs are not blinking, reprogram the LMK device.
Try pressing the CPU_RESET button on the TSW14J56EVM.
Try capturing data in HSDC Pro to force an LED status update
References
•
•
•
•
•
16
Troubleshoot
ADC16DX370 data sheet, TI literature number SNVS990
TSW14J56EVM User’s Guide, TI literature number SLWU086
High Speed Data Converter Pro Software User’s Guide, also available in the help menu of the software
LMK04828 data sheet
FTD245 Driver Installation Manual
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Appendix A
A.1
TSW14J56EVM LED Bank and Switch Configuration
The LEDs on the TSW14J56EVM indicate the status of the capture board and the status of the JESD204B
link. The LEDs have the following meaning:
Table 6. Meaning of LEDs on the TSW14J56EVM
Column Head 1
FPGA_DONE
Column Head 2
FPGA Programming
On: FPGA has been programmed
Off: FPGA has not been programmed, or is being programmed
D1
TX SYNC~
On: Synchronization being requested (code group synchronization phase of link initialization)
Off: Synchronization not request (code group synchronization complete)
Note: The status of this LED is only valid after attempting a data capture in HSDC Pro
D2
TX Device Clock
Blinking: Device clock is being received from the LMK device on the EVM
Not blinking: Device clock not received
D3
SYNC~
On: Synchronization being requested (code group synchronization phase of link initialization)
Off: Synchronization not request (code group synchronization complete)
The status of this LED is only valid after attempting a data capture in HSDC Pro
D4
RX Device Clock
Blinking: Device clock is being received from the LMK device on the EVM
Not blinking: Device clock not received.
D5
No Function
D6
DDR3 Memory Calibration Done
On: Calibration not done
Off: Calibration done, typical operation
D7
DDR3 Memory Calibration Success
On: Calibration not successful
Off: Calibration successful, typical operation
D8
DDR3 Memory Calibration Fail
On: Calibration not failed, typical operation
Off: Calibration failed
Table 7. Required State of Switches on the
TSW14J56EVM
Switch
Status
SW1[1]
Off
SW1[2]
Off
SW1[3]
Off
SW1[4]
Off
SW4[1]
Off
SW4[2]
Off
SW4[3]
Off
SW4[4]
Off
SW8, MSEL0-MSEL4
All on
TDI, TDO, TCK, TMS jumpers
All should be shorting pins 1 to 2
JP1 (Y1 PWR)
Short pins 1 to 2 (HI setting)
J8 (USB PWR)
Short pins 1 to 2
JP9 (U8 ENB)
Short pins 2 to 3
SLAU529A – February 2014 – Revised December 2014
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Copyright © 2014, Texas Instruments Incorporated
17
HSDC Pro Settings for Optional ADC Device Configuration
A.2
A.2.1
www.ti.com
HSDC Pro Settings for Optional ADC Device Configuration
Changing the Number of Serial Output Lanes (L)
The ADC device outputs data on two lanes (one lane per channel) by default, but the device may also be
configured to output on four total lanes. This option is selected using the L parameter on the JESD204B
tab in the Configuration GUI. In this case, ‘ADC16DX370EVM_421’ must be selected as the device in
HSDC Pro.
A.2.2
Changing the Number of Frames per Multi-Frame (K)
Changing the number of frames per multi-frame output by the JESD204 transmitter (ADC device) is
configured using the K parameter on the JESD204B tab in the Configuration GUI. This parameter must be
matched by the receiving device, but configuration of the K parameter of the receiver is not supported at
this time.
A.3
Exercising the SYSREF Input of the ADC
The SYSREF input is used to align the phase of the internal local multi-frame clock (LMFC) of the ADC,
according to the JESD204B interface specification, but it is not required to establish a link and evaluate
the analog performance of the ADC with this EVM. Upon power-up, the ADC assumes a default alignment
for its LMFC and proceeds to synchronize with the receiving device without requiring a SYSREF input
event.
A SYSREF signal may be applied to the ADC via the SYSREF SMA connector on the EVM to validate the
response of the ADC to a SYSREF event. The SYSREF signal path is AC coupled; therefore only periodic
signals with frequencies > 5 MHz are supported.
TI does not recommend use of the SYSREF SMA input of the EVM to ensure deterministic latency across
the serial link, due to difficulties of controlling timing requirements. The on-board LMK04828 may be used
in an optional configuration to clock both the ADC and receiving device to achieve deterministic latency.
A.4
Customizing the EVM for Optional Clocking Support
By default, the LMK04828 is configured as a clock distributer and divider and only provides clock signals
to the receiving FPGA device. The EVM is configured to require an ADC device clock from an external
signal generator source through the CLK SMA connector. These default configurations are intentional as
they allow the most flexibility for ADC sampling rates and they allow the highest ADC performance
possible.
The LMK04828 may be reconfigured to exercise more features, but this EVM is not intended to be a full
evaluation platform for the LMK04828. A full evaluation platform can be found on the LMK04828 product
page.
A.4.1
LMK04828 Configuration Options
Configuring the LMK04828 is possible in a couple different ways. TI recommends to use the ‘Configuration
3’ button on the LMK tab of the Configuration GUI. By pressing this button, a text file containing register
values is accessed and the contents are written to the device registers. The text file is stored in the
Configuration GUI installation directory in the ‘\Configuration Files’ folder and is called
‘LMK04828_config3.cfg’. The register values in this file may be edited manually. The LMK04828 data
sheet and the CodeLoader 4 software may aid the design and editing process.
A second method for configuring the LMK04828 is to populate the programming header ‘LMKSPI’ with
associated passive components to enable communication over the header and disable access of the SPI
bus via the USB-to-SPI FTDI chip by placing a jumper on the JP2 header. Once the EVM is reconfigured
to support this option, the CodeLoader 4 software and associated programming cable may be used to
directly configure the LMK04828. Refer to the LMK04828 evaluation platform for proper configuration of
the LMKSPI header.
18
SLAU529A – February 2014 – Revised December 2014
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Copyright © 2014, Texas Instruments Incorporated
Customizing the EVM for Optional Clocking Support
www.ti.com
A.4.2
Configuring the ADC Device to Use a Device Clock and SYSREF from the LMK04828
The EVM may alternatively be reconfigured to route a device clock and SYSREF clock from the
LMK04828 to the ADC device. This configuration represents a more realistic system configuration, but the
data converter noise performance is affected by the noise of the clock signal from the LMK device.
To provide a device clock and SYSREF from the LMK04828 to the ADC device, the following EVM
changes must be made:
• Remove R72, R73, R78, and R79 and place 0-Ω resistors on R74, R75, R80, and R81.
• Configure the LMK04828 to output an LVPECL device clock from its DCLKout2 port and an LVPECL
SYSREF signal from its SDCLKout3 port.
A.4.3
Providing an Alternate LMK04828 Reference Clock
In the EVM default configuration, the CLK input signal is split to go to the ADC and LMK04828 to act as a
reference clock. If deviation from the default configuration is desired, providing an alternate reference
clock for the LMK04828 may be required. Possible options for providing the reference clock include:
• Using an external signal generator to provide the reference via the EXTREF SMA connector. If a
separate signal generator is also used to provide the ADC device clock, these two generators must be
frequency locked together.
• Placing a crystal oscillator module on Y1, Y2, or Y3. Additional configuration is required to provide
power to the module and connect to the signal to the appropriate LMK04828 clock input port.
Revision History
Changes from Original (February 2014) to A Revision .................................................................................................. Page
•
•
•
Changed 'ADC16DX370EVM_222' to 'ADC16DX370_LMF_222' in the Open the HSDP Software and Load the FPGA
Image to the TSW14J56EVM section................................................................................................... 8
Changed 'ADC16DX370EVM_222' to 'ADC16DX370_LMF_222' in the Capture Data Using the HSDP Software
section. .................................................................................................................................... 10
Changed 'ADC16DX370EVM_222' to 'ADC16DX370_LMF_222' in the Evaluation Troubleshooting section. .............. 16
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
SLAU529A – February 2014 – Revised December 2014
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Copyright © 2014, Texas Instruments Incorporated
Revision History
19
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan are NOT certified by
TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, User is required by Radio Law of Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】
本開発キットは技術基準適合証明を受けておりません。
本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。
日本テキサス・インスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2014, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
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No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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logic.ti.com
Security
www.ti.com/security
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power.ti.com
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www.ti.com/space-avionics-defense
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microcontroller.ti.com
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www.ti.com/video
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www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
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