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Texas Instruments TSC2005EVM and TSC2005EVM-PDK User guides
User's Guide
SLAU191 – September 2006
TSC2005EVM and TSC2005EVM-PDK
This user's guide describes the characteristics, operation, and use of the TSC2005
evaluation module (EVM), both by itself and as part of the TSC2005EVM-PDK. This
EVM is a 4-wire resistive touch screen controller evaluation module which also has
auxiliary-inputs and temperature measurement capabilities. A complete circuit
description, schematic diagram, and bill of materials are included.
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Contents
EVM Overview ...................................................................................... 2
Analog Interface .................................................................................... 2
Digital Interface ..................................................................................... 3
Power Supplies ..................................................................................... 3
EVM Operation...................................................................................... 5
Kit Operation ........................................................................................ 6
EVM Bill of Materials and Schematic ........................................................... 17
References ......................................................................................... 19
List of Figures
1
2
3
4
5
6
7
TSC2005EVM-PDK Block Diagram .............................................................. 6
Default Software GUI Screen ..................................................................... 7
Human Interface Tab ............................................................................... 9
Configuration Tab of Software GUI Screen .................................................... 11
Command Line Interface Tab ................................................................... 13
Read All Threshold Registers ................................................................... 14
Open Script File and Load to Command Buffer ............................................... 16
List of Tables
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2
3
4
5
6
7
8
9
Analog Interface Pinout ............................................................................ 2
Digital Interface Pinout ............................................................................. 3
Power Supply Pinout ............................................................................... 3
VREF Selection Options – JMP1 ................................................................. 5
List of Jumpers ...................................................................................... 5
Script Command Type ............................................................................ 14
Eligible TSC2005 Configuration Register Address (in Hexadecimal) ...................... 15
TSC2005EVM Bill of Materials .................................................................. 17
USB-MODEVM Bill of Materials ................................................................. 18
Windows is a trademark of Microsoft Corporation.
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EVM Overview
1
EVM Overview
1.1
Features
•
•
Full-featured evaluation board for the TSC2005 4-wire resistive touch screen controller (TSC)
Modular design for use with a variety of DSP and microcontroller interface boards
The TSC2005EVM-PDK is a complete evaluation kit, which includes a USB-based motherboard and
evaluation software for use with a personal computer running Microsoft Windows™ operating systems.
1.2
Introduction
The TSC2005EVM is in a Texas Instruments modular EVM form factor, which allows direct evaluation of
the TSC2005 performance and operating characteristics and eases software development and system
prototyping. This EVM is compatible with the 5-6K Interface Board (SLAU104) from Texas Instruments
and additional third-party boards such as the HPA449 demonstration board from SoftBaugh, Inc.
(www.softbaugh.com ) and the NI Speedy-33 from National Instruments. (www.ni.com).
The TSC2005EVM-PDK is a complete evaluation/demonstration kit, which includes a USB-based
motherboard called the USB-MODEVM Interface Board and evaluation software for use with a personal
computer running Microsoft Windows™ operating systems.
2
Analog Interface
For maximum flexibility, the TSC2005EVM is designed for easy interfacing to multiple analog sources.
Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin,
dual-row, header/socket combination at J1. This header/socket provides access to the analog input pins of
the TSC. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector
options.
Table 1. Analog Interface Pinout
2
Pin Number
Signal
J1.2
X+
Touch screen X+ electrode
J1.4
X–
Touch screen X- electrode
J1.6
Y+
Touch screen Y+ electrode
J1.8
Y–
Touch screen Y- electrode
J1.10
Unused
J1.12
AUX
J1.14
Unused
J1.16
Unused
Description
Auxiliary input, 0 V to VREF
J1.18
REF(–)
Tied to analog ground
J1.20
REF(+)
External reference source input
J1.1
J1.3
J1.5
J1.7
J1.15
Unused
J1.9
J1.11
J1.13
J1.17
J1.19
AGND
TSC2005EVM and TSC2005EVM-PDK
Analog ground connections
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Digital Interface
3
Digital Interface
The TSC2005EVM is designed to easily interface with multiple control platforms. Samtec part numbers
SSW-110-22-F-D-VS-K and TSM-110-01-T-DV-P provide a convenient 10-pin, dual-row, header/socket
combination at J2. This header/socket provides access to the digital control and serial data pins of the
TSC. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector
options.
Table 2. Digital Interface Pinout
4
Pin Number
Signal
J2.1
Unused
Description
J2.2
Unused
J2.3
SCLK
SPI serial clock
J2.4
DGND
Digital ground
J2.5
Unused
J2.6
Unused
J2.7
CS
J2.8
Unused
J2.9
Unused
J2.10
DGND
J2.11
SDI
J2.12
Unused
SPI chip selection, active low.
Digital ground
SPI MOSI - serial data input to TSC from host
J2.13
SDO
J2.14
RESET
SPI MISO - serial data output from TSC to host
J2.15
PINTDAV
J2.16
SCL
J2.17
Unused
Hardware reset to TSC2005
PENIRQ Pen interrupt output from TSC
I2C bus serial clock
J2.18
DGND
J2.19
Unused
Digital ground
J2.20
SDA
I2C bus serial data line
Power Supplies
J3 provides connection to the common power bus for the TSC2005EVM. Power is supplied on the pins
listed in Table 3.
Table 3. Power Supply Pinout
Signal
Pin Number
Signal
Unused
1
2
Unused
+5VA
3
4
Unused
DGND
5
6
AGND
+1.8VD
7
8
+VD1
+3.3VD
9
10
+5VD
When power is supplied to J3, JMP4 allows for one of three different DC voltages to be applied to the
digital interface and IO of the TSC; and JMP2 selects power to TSC2005' SNSVDD. See the schematic
and printed circuit board silkscreen for details.
The TSC2005EVM-PDK motherboard (the USB-MODEVM Interface Board) supplies power to J3 of the
TSC2005EVM. Power for the motherboard is supplied either through its USB connection or on terminal
blocks on the board.
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Power Supplies
4.1
TSC Power
Power for the TSC2005 SNSVDD, analog, and sense driver power supply, can be supplied either from
+1.8 V or from +3.3 V, selected by setting JMP2. When the shunt is installed on JMP2 pins 1-2, power
SNSVDD come from J3.7 (+1.8VD) through an inductor to prevent digital noise from coupling into the
analog supply. When the shunt is installed on JMP2 pins 2-3, power SNSVDD come from J3.9 (+3.3VD)
through an inductor to prevent digital noise from coupling into the analog supply. Also, the user can
remove the shunt and connect an external power supply to the pin 2 of JMP2 if other than 1.8-V or 3.3-V
power is used. By default factory setting, SNSVDD is set to +3.3VD, shunt on JMP2 pins 1-2..
Power for the TSC2005 IOVDD and digital IO power supply is selected using JMP4, either 1.8V or 3.3V or
SNSVDD. When JMP4 is in the default factory condition (shunt on pins 3-4), power to the TSC is
connected to the same power supply as SNSVDD.
4.2
Stand-Alone Operation
When used as a stand-alone EVM, the analog power can be applied to TP1 (SNSVDD) and referenced to
TP4 (GND). IOVDD can be applied to TP2 (IOVDD) and referenced to TP4.
CAUTION
Verify that all power supplies are within the safe operating limits shown on the
TSC2005 data sheet before applying power to the EVM.
4.3
USB-MODEVM Interface Power
The USB-MODEVM Interface Board can be powered from several different sources:
• USB
• 6-VDC to 10-VDC AC/DC wall supply (not included)
• Laboratory power supply
When powered from the USB connection, JMP6 should have a shunt from pins 1-2 (this is the default
factory configuration). When powered from 6-VDC to 10-VDC, either through the J8 terminal block or J9
barrel jack, JMP6 should have a shunt installed on pins 2-3. If power is applied in any of these ways,
onboard regulators generate the required supply voltages and no further power supplies are necessary.
If laboratory supplies are used to provide the individual voltages required by the USB-MODEVM Interface
Board, JMP6 should have no shunt installed. Voltages then are applied to J2 (+5VA), J3 (+5VD), J4
(+1.8VD), and J5 (+3.3VD). The +1.8VD and +3.3VD can also be generated on the board by the onboard
regulators from the +5VD supply; to enable this, the SW1 switches need to be set in the ON position
(lower position, looking at the board with text reading right-side up) to enable the regulators. If +1.8VD and
+3.3VD are supplied externally, disable the onboard regulators by placing the SW1 switches in the OFF
position.
Each power-supply voltage has an LED (D1–D7) which lights when the power supplies are active.
4.4
Reference Voltage
The reference voltage can be provided on the board from SNSVDD on TSC2005EVM. An external
reference can be supplied through J1 pin 20 referenced to analog ground (J1 pin 18 on the
TSC2005EVM), or through TP3 (VREF) referenced on TP4(GND) on the TSC2005EVM. JMP1 must be
set correspondingly, as shown in Table 4.
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EVM Operation
Table 4. VREF Selection Options – JMP1
Shunt on Pins
VREF Selection
1-2
External from J1.20
2-3
On the board from SNSVDD
Removed
External from TP3
CAUTION
Verify that the external reference voltage is within the safe operating limits
shown on the TSC2005 data sheet before applying power to the EVM.
5
EVM Operation
The following section provides information on the analog input, digital control, and general operating
conditions of the TSC2005EVM.
5.1
Analog Input
The analog input sources (touch screen and auxiliary input) can be applied directly to J1 (top or bottom
side) or through signal-conditioning modules available for the modular EVM system.
5.2
Digital Control
The digital control signals can be applied directly to J2 (top or bottom side). The modular TSC2005EVM
also can be connected directly to a DSP or microcontroller interface board, such as the HPA449, or to the
USB-MODEVM Interface Board if purchased as part of the TSC2005EVM-PDK. For a current list of
compatible interface and/or accessory boards for the EVM or the TSC2005, see the relevant product
folder on the TI Web site.
5.3
Default Jumper Locations
Table 5 provides a list of jumpers found on the EVM and their factory default conditions.
Table 5. List of Jumpers
Jumper
JMP1
Description
Default Shunt Position
Reference Voltage Selection –
2-3 (onboard or SNSVDD)
1-2: external VREF
2-3: on-board SNSVDD
JMP2
Analog Power or SNSVDD Select –
2-3 (+3.3VD)
1-2: +1.8VD
2-3: +3.3VD
JMP3
EEPROM Address Select –
Installed: firmware for the motherboard from the EEPROM onboard the
TSC2005EVM
Installed (FW from EEPROM on
TSC2005EVM board)
Removed: firmware for the motherboard from the EEPROM on
motherboard
JMP4
IOVDD Power Select –
3-4 (= SNSVDD)
2-4: IOVDD from J3.7 (+1.8VD)
3-4: IOVDD from SNSVDD
4-6: IOVDD from J3.9 (+3.3VD)
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Kit Operation
6
Kit Operation
The following section provides information on using the TSC2005EVM-PDK, including setup, program
installation, and program usage.
6.1
TSC2005EVM-PDK Block Diagram
A block diagram of the TSC2005EVM-PDK is shown in Figure 1. The evaluation kit consists of two circuit
boards connected together. The motherboard is designated as the USB-MODEVM Interface board; the
daughtercard is the TSC2005EVM.
TSC2005EVM
J1 X+
XY+
YAUX
VREF
TSC2005
SCLK
/CS
SDI
SDO
/RESET
/PINTDAV
EEPROM
J3
J2
SCL
SDA
USB-MODEVM
USB
J7
TAS1020B
J11
J12
Control Interface
(SPI, I2C)
J13
J21
J22
J23
Figure 1. TSC2005EVM-PDK Block Diagram
The USB-MODEVM Interface board is intended to be used in USB mode, where control of the installed
EVM is accomplished using the onboard USB controller device. However, provision is made for driving all
the buses (I2C and/or SPI) externally. The source of these signals is controlled by SW2 on the
USB-MODEVM. For more details, see the USB-MODEVM Interface Board schematic in Section 7.2.
6.2
Quick Start
Ensure that the TSC2005EVM is installed on the USB-MODEVM Interface Board. The TSC2005EVM
should be installed in the topmost position, using J11, J12, and J13 on the USB-MODEVM, as shown in
Figure 1 .
Place the CD-ROM into your PC's CD-ROM drive. Locate the Setup program on the disk, and execute it.
The Setup program installs the TSC2005 evaluation software on your PC. Follow the instructions and
prompts given.
When the installation completes, click Finish on the TSC2005EVM installer window. You may be prompted
to restart your computer.
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Kit Operation
When installation is complete, attach a USB cable from your PC to the USB-MODEVM Interface board. As
configured at the factory, the board is powered from the USB interface; so, the power indicator LEDs on
the USB-MODEVM should light. Once this occurs, launch the TSC2005 evaluation software on your PC.
The software should automatically find the TSC2005EVM, and a screen similar to the one in Figure 2
should appear.
Figure 2. Default Software GUI Screen
In order to use the touch screen features, a 4-wire resistive touch screen needs to be connected to J1 of
the TSC2005EVM, as described previously. That is: the 4 wires of the touch panel should be connected to
the pins 2 (X+), 4(X–), 6(Y+), and 8(Y–) of J1A on the TSC2005EVM board.
6.3
USB-MODEVM Interface Board
The simple diagram shown in Figure 1 shows only the basic features of the USB-MODEVM Interface
Board. The board is designed for a TAS1020B USB controller with an 8052-based core. It features two
positions for modular EVMs, or one double-wide serial modular EVM can be installed.
For use with the TSC2005, the TSC2005EVM is installed in the topmost EVM slot, which connects the
TSC2005 digital control interface to the SPI port of the TAS1020B. Because the TSC2005 has no audio
features, the lower EVM slot (which is connected to the TAS1020B digital audio interface) is not used.
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Kit Operation
As configured from the factory, the board is ready to use with the TSC2005EVM. However, if external SPI
control is desired, the signals may be applied to J15, as long as the SW2 is set to OFF position so that
USB SPI control is disabled. To view all the functions and configuration options available on this board,
see the USB-MODEVM Interface Board schematic in Section 7.2.
6.4
Program Description
After the TSC2005EVM-PDK software installation (described in Section 6.2), evaluation and development
with the TSC2005 can begin.
Running the TSC2005EVM-PDK software on your PC displays the interface GUI as shown in Figure 2. On
the top-left side of the GUI, a lit green LED indicates the digital serial interface type, which should be SPI
for the TSC2005EVM-PDK. The next box shows the location and reversion of the firmware.
The two LEDs on the top right corner of the GUI can be used to reset TSC2005 by software and to stop
the TSC2005's ADC operation. Note that the two LEDs reflect the corresponding bits inside the CB1.
When the SW Reset LED is lit (in blue), the bit 1 of CB1 is set to logic 1 and TSC2005 is in the software
reset mode; when the LED is OFF (in black), the bit 1 is set to logic 0 and TSC2005 is not reset and is in
normal mode. When the Stop ADC LED is lit (in red), the bit 0 of the CB1 is set to logic 1 and TSC2005's
ADC is stopped. When this LED is OFF (in black), the bit 0 is logic 0 and TSC2005 is running in normal
operating mode.
On the top-right side of the GUI, two boxes labeled CB0 and CB1 display the current/default settings of
the TSC2005 control byte mode 0 (CB0) and mode 1 (CB1), respectively. See the TSC2005 data sheet on
the control byte and its two modes.
The data in CB0 is written to TSC2005 while writing to a control register, and CB0 is the common byte.
The data in CB1 is written to TSC2005 while one of the following occurs:
• Bit 0 (STS pr Stop ADC) is set by clicking on the LED in left/top corner.
• Bit 1 (SWREST or SW Reset) is set by clicking on the SW Reset LED.
• Bit 2 (RM or Resolution) is set at the Human Interface tab.
• Bits 3 through 6 (Converter Function Select) can be set at this tab beneath the CFR1 section.
The majority evaluation can be implemented using three tabs on the TSC2005EVM GUI: Human Interface,
Configuration, and Command Line Interface. Clicking on a tab accesses the functions corresponding to
the tab. The following discussion details the three tabs.
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Kit Operation
6.4.1
Human Interface
Start TSC2005 EVM software, the Human Interface tab shows up by default. The three sections on this
tab are shown in Figure 3.
Figure 3. Human Interface Tab
6.4.1.1
Touch Screen Control Function
The touch screen box in this tab is updated when a touch is detected on the touch screen. As the touch
screen is drawn on, the motion on the touch screen is translated into pixels on this box. The software
takes X, Y, Z1, and Z2 readings which are shown to the right of the touch screen box. As the touch
pressure is increased, the pixel size increases; a lighter touch results in thinner pixel sizes.
The Z-value displayed is not totally what is described in the TSC2005 data sheet, because in the data
sheet equations, it is assumed that the resistance of the touch screen being used is known. The value
used in this program is calculated by Equation 1 of the TSC2005 data sheet, but without multiplying it by
the Rx-plate resistance. This value is shown as Z beneath the measured touch data, X, Y, Z1, and Z2; and
normally ranges from 0 to 4, with larger numbers representing a more forceful press on the screen. Using
the Maximum Z Value to Display knob, you can set a threshold so that the program does not display
lightly pressed points. This threshold setting helps to eliminate display of spurious points that may result
from touch screen mechanical bouncing.
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Kit Operation
The display in the touch screen box can be cleared by pressing the Clear Graph button on the screen.
6.4.1.2
Data Acquisition Functions
The TSC2005 provides for measuring an auxiliary-input voltage and the temperature. A data acquisition
functions on this tab displays the measured values for these parameters. Measurements are updated only
when the touch screen is not being pressed, and the Auto Reading LED is on.
Temperature is displayed using both measurement modes described in the TSC2005 data sheet. Using
the TEMP1 and TEMP2 measurements, a temperature reading with 2°C resolution and accuracy is
achieved. Using only the TEMP1 measurement, a reading with 0.3°C resolution is possible, but requires
knowing the TEMP1 value at 25°C. This normally requests a calibration that the user performs. This
program assumes that TEMP1 = 600 mV at 25°C.
By default, the software continuously reads nontouch data, AUX, TEMP1, and TEMP2 and automatically
updates them in the Non-Touch Data Acquisition section of this tab. To stop the data acquisition, click on
the green LED Auto Reading in the top-right corner.
6.4.1.3
Direct Configuration
In the TSC2005, the parameters or modes of the device can be set up or configured in two ways. One is
to set up the control registers; the other is to write directly to TSC2005 through control bytes. The majority
setups and status of the TSC2005 can be accessed through write/read TSC2005 control registers; also a
couple of parameters/modes can be accessed through the direct configuration, which include Resolution,
ADC Power-Down, ADC Stop, and SW Reset. See the data sheet for more details.
In the Human Interface tab, two direct configuration modes can be accessed: one is resolution; and
another is ADC Power-Down mode.
The TSC2005 ADC can be configured to operate in 10-bit or 12-bit resolution modes, which can be
directly configured using Control Byte Mode #1 or CB1 or by writing to the bit #13 of control register
CFR0. Clicking on the resolution option in this tab changes the resolution setting in CB1. Note that the
CB1 box on the top of the tabs is updated correspondingly while any of its control bits changes. You may
also need to change the resolution setting in CFR0 (which is discussed in the next section on the
Configuration tab) to make them consistent.
A Power-Down bit in TSC2005 Control Byte Mode#0 or CB0 can be set from this tab to power up the ADC
biasing circuitry always, or to power down the power between conversions. The box under the control
button PND0 shows the brief description.
6.4.2
Configuration Tab
On the Configuration tab, shown in Figure 4, all of the TSC2005 control registers can be accessed and
written to.
The tab has four sections, corresponding to the configuration registers CRF0, CFR1, CFR2, and the four
thresholds registers, respectively. Also, two boxes, one under the CFR1 section and the other under the
Threshold Selection section, display the current values writing to these TSC2005 control/configuration
registers.
Note that a digital box is next to each of these multiple selectors; clicking on this box sends the data to the
corresponding control registers.
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Figure 4. Configuration Tab of Software GUI Screen
6.4.2.1
ADC Configuration (CFR0)
This section controls the parameters in CFR0. Each button or selection controls one parameter.
• Pen Control Mode
The button controls if the touch data acquisition is started or initialized by host processor's command
(manually) or by a touch on the screen (automatically). Default by touching screen.
• Stop ADC
This button can stop TSC2005 ADC, or put the ADC to normal running mode. Default to normal
running mode.
• Resolution
Selects between 10- and 12-bit resolution. Note that, the bit #2 of CB1 also controls the resolution and
thus you may need to double-check the settings at both places to make sure they are consistent.
Default setting is 12-bit resolution.
• Conversion Clock
The internal clock which runs the A/D converter can run at 4, 2, or 1 MHz. Note that, when running at 4
MHz, only 10-bit resolution is possible, but 12-bit is not. Thus, you may need to check resolution
setting after selecting 4-MHz conversion clock. By default, the clock is running at 2 MHz.
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Kit Operation
•
•
•
•
•
6.4.2.2
Panel Voltage Stabilization Time
This is the time that the TSC2005 allows for the touch screen to settle after turning the drivers on.
Precharge Time
Sense Time
These two parameters are the time allowed to precharge the touch panel capacitance and then sense
to see if the screen is touched. For more details on these parameters, see the TSC2005 data sheet.
Detection of Pen Touch in Wait
This option is valid when the ADC is put into the host-controlled mode. Enabling this option puts the
pen touch detection in the background and allows the TSC2005 to pull its PINTDAV pin high if no pen
touch is detected while waiting for the host to issue a command, so that the host can decide if a
reading touch data command should or should not be issued.
Longer Sample Mode
Enabling this option adds an extra 500 ns of sampling time to the normal sampling cycle. It is disabled
by default.
Test Mode Configuration (CFR1)
TSC2005 features a touch screen test function to check if the 4-wire touch panel had been properly
connected and if there is short-circuitry. To implement the connection test, the resistance range of the
touch screen should be entered into CFR1. Select Short Circuit Panel Test to perform the short-circuitry
test function.
To perform a touch screen test, the Converter Function Selection must be set up in CB1 as X-Axis
Connection Test, Y-Axis Connection Test, or Short-Circuit Test. The multiple selector under CFR1
provides the access.
The test result returns to the STATUS register.
Another TSC2005 feature is the Batch Delay Mode, as shown in the CFR1 section. Under the
TSC-controlled ADC mode, this feature adds delay between ADC samples and thus controls the
time/interval between samples. The batch delay ranges from 0 ms to 100 ms.
6.4.2.3
MAVF Configuration (CFR2)
The preprocessing MAV filter (MAVF) inside TSC2005 reduces sampling noise. See the data sheet for
details of the MAVF.
The CFR2 section has five selection buttons that can be used to enable/disable the MAVF on touch data,
X, Y, and Z, or nontouch data, AUX and Temperature.
Clicking on the MAV Filter Control option box brings up a list of settings on M and W values. Select an
eligible option from the list (do not select the Reserved) and the corresponding digital shows up at the next
box. Clicking on the digital box writes the selected value to the CFR2 register.
6.4.2.4
Threshold Configuration
Zone detection is one of the new features the TSC2005 offers. Zone detection function was designed to
monitor the zone/range of the nontouch inputs, including AUX and TEMP1/TEMP2.
The four control registers inside TSC2005, used to set up the top and bottom thresholds of AUX and
TEMP1/TEMP2, can be accessed through the four moving slides in the Threshold Selection section. The
zone detection modes can be controlled/selected through the two option boxes at the bottom of the CFR2
section.
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Kit Operation
6.4.3
Command Line Interface Tab
Clicking on Command Line Interface tab brings up a screen as shown in Figure 5, which provides a
flexible way to read and write to the TSC2005EVM by scripting.
Figure 5. Command Line Interface Tab
The line or lines of the script are typed or loaded into the Command Buffer. Then, clicking on the Execute
Command Buffer button runs the script.
The three LEDs on this tab and the req done LED light up (green) after the script execution is finished. If a
line of the script is a reading command, the read data is shown at the Read Data section; if the line of the
script is a writing command, the written data bytes also are returned to the Read Data section.
As Figure 6 shows, three read buttons reveal the contents of the threshold, control, and status registers of
the TSC2005, displaying them in the Read Data section of the screen.
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Kit Operation
Figure 6. Read All Threshold Registers
6.4.3.1
Software Script
The TSC2005EVM-PDK software was designed to identify and decipher several scripting commands, as
shown in the Command Type list in Table 6.
Each line in a script file is a command; a line is terminated by a carriage return.
Table 6. Script Command Type
Command Type
14
Description
w
Write to TSC2005 through the SPI serial control bus
r
Read from TSC2005 through the SPI serial control bus
#
Comment line
b
Break
d
Delay
TSC2005EVM and TSC2005EVM-PDK
SLAU191 – September 2006
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Kit Operation
•
•
•
The first character of a line indicates the command type. Table 6 lists all the command types of the
TSC2005EVM-PDK software.
Following the command type w or r, the byte is the I2C device address. For TSC2005, a SPI device,
this address must be always 0x00.
No byte follows a # (comment) or a b (break) command.
The byte or bytes following a command type d is the delay time in milliseconds.
The second byte in a w or r command line is the address of the configuration register. Table 7 provides
the common use address in a w and r command line.
Table 7. Eligible TSC2005 Configuration Register Address (in Hexadecimal)
Description
w/r
Stop ADC
81
SW Reset TSC2005
82
Measure XYZ
Control Byte Mode 1
Control Byte Mode 0 And/Or
Control Registers
(1)
(2)
80 or 84
(1)
8C (1)
Measure XY
88 or
Measure AUX
A0 or A4 (1)
MeasureTEMP1
B0 or B4 (1)
MeasureTEMP2
B8 or BC (1)
X Data Register
00 or 02 (2)
Y Data Register
08 or 0A (2)
Z1 Data Register
10 or 12 (2)
Z2 Data Register
18 or 1A (2)
AUX Data Register
20 or 22 (2)
TEMP1 Data Register
28 or 2A (2)
TEMP2 Data Register
30 or 32 (2)
Status Register
38 or 3A (2)
AUX High Threshold Register
40 or 42 (2)
AUX Low Threshold Register
48 or 4A (2)
TEMP High Threshold Register
50 or 52 (2)
TEMP Low Threshold Register
58 or 5A (2)
CFR0 Register
60 or 62 (2)
CFR1 Register
68 or 6A (2)
CFR2 Register
70 or 72 (2)
Convert Function Select Status Register
78 or 7A (2)
Where the first byte is for 10 bits of resolution and the second byte is for 12 bits.
Where the two bytes reflect the different ADC bias power modes: if bit#2 =1, ADC bias power ON always; and if bit2=0, it
powered down between converter.
In an r command, the byte after the address indicates the number of registers reading from; and the next
byte is ignored. If more than one register needs to be read, the next byte is the address and is followed by
two dummy bytes that are ignored.
In a w command, the two bytes after the address (see Table 7) are the data writing to the 16-bit TSC2005
registers. If more than one registers needs to be written, the next byte is the address and followed by two
data bytes.
For writing to TSC2005's CB1, this byte includes both address and content and thus there will be no
further byte after this address byte.
Example 1: writing to CB1 and changing the resolution mode to 10 bit.
w 00 80
Example 2: writing 0xA924 to CFR0 register and writing to CB0 to set ADC bias power on always.
w 00 62 A9 24
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Kit Operation
Example 3: do the same as Example 2, but writing to CB0 to set ADC bias power OFF between
converter.
w 00 60 A9 24
Example 4: writing the four threshold registers to set up the max=0xFF0 and min=0x00F.
w 00 42 0F F0 4A 00 0F 52 0F F0 5A 00 0F
Example 5: reading the STATUS register content.
r 00 38 01 00
Example 6: reading back Y, Y, Z1, and Z2 data registers.
r 00 02 04 00 0A 00 00 12 00 00 1A 00 00
6.4.3.2
Down Load Script
To down load an existing script into the Control Buffer, first go into the File menu, and select Open
Command File..., which opens a file-select window and allows you to browse and find a script file. Then,
click on Open and the script is loaded into the command buffer. An example is shown in Figure 7.
Figure 7. Open Script File and Load to Command Buffer
16
TSC2005EVM and TSC2005EVM-PDK
SLAU191 – September 2006
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EVM Bill of Materials and Schematic
7
EVM Bill of Materials and Schematic
The following tables contain a complete bill of materials for the modular TSC2005EVM and the
USB-MODEVM Interface Board (included only in the TSC2005EVM-PDK), respectively.
Table 8. TSC2005EVM Bill of Materials
Designators
Description
Manufacturer
Mfg. Part Number
R1-R5, R7-R10
1/8W 5% Chip Resistor
Panasonic
ERJ-6GEY0R00V
R11, R12, R13
1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ272V
R6
Chip Resistor
C7, C10
25V Ceramic Chip Capacitor
±10%, X7R
TDK
C1608X7R1E104K
C8, C9, C11
16V Ceramic Chip Capacitor
±10%, X7R
TDK
C1608X7R1C105K
C6
16V Ceramic Chip Capacitor
±20%, X7R
TDK
C1608X7R1C106M
U1
Touch Screen Controller
Texas Instruments
TSC2005IYZL
U2
I2C 64KEEPROM
Microchip
24AA64-I/SN
J1A, J2A
20 Pin SMT Plug
Samtec
TSM-110-01-L-DV-P
J3A
10 Pin SMT Plug
Samtec
TSM-105-01-L-DV-P
J1B, J2B
20 Pin SMT Socket
Samtec
SSW-110-22-F-D-VS-K
J3B
10 Pin SMT Socket
Samtec
SSW-105-22-F-D-VS-K
N/A
TSC2005 EVM PWB
Texas Instruments
6476381
JMP3
Terminal Strip, 2 pin (2x1)
Samtec
TSW-102-07-G-S
JMP1, JMP2
Terminal Strip, 3 pin (3x1)
Samtec
TSW-103-07-G-S
JMP4
Header, Terminal, 3x2
Samtec
TSW-103-07-G-D
L1, L2
SMT Inductor
API Delevan
S1210-104K
TP4
Testpoint, Mini-Loop
Keystone Electronics
5000
TP1-TP3
Testpoint, Mini-Loop
Keystone Electronics
5000
N/A
Shorting Blocks
Samtec
SNT-100-BK-G-H
C1-C5
SLAU191 – September 2006
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17
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EVM Bill of Materials and Schematic
Table 9. USB-MODEVM Bill of Materials
18
Designators
Description
Manufacturer
Mfg. Part Number
R4
10Ω 1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ100V
R10, R11
27.4Ω 1/16W 1% Chip Resistor Panasonic
ERJ-3EKF27R4V
R20
75Ω 1/4W 1% Chip Resistor
Panasonic
ERJ-14NF75R0U
R19
220Ω 1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ221V
R14, R21, R22
390Ω 1/10W 5% Chip Resistor
Panasonic
ERJ-3GEYJ391V
R13
649Ω 1/16W 1% Chip Resistor
Panasonic
ERJ-3EKF6490V
R9
1.5KΩ 1/10W 5%
Chip Resistor
Panasonic
ERJ-3GEYJ152V
R1, R2, R3, R5, R6, R7, R8
2.7KΩ 1/10W 5%
Chip Resistor
Panasonic
ERJ-3GEYJ272V
R12
3.09KΩ 1/16W 1%
Chip Resistor
Panasonic
ERJ-3EKF3091V
R15, R16
10KΩ 1/10W 5%
Chip Resistor
Panasonic
ERJ-3GEYJ103V
R17, R18
100KΩ 1/10W 5%
Chip Resistor
Panasonic
ERJ-3GEYJ104V
RA1
10KΩ 1/8W Octal Isolated
Resistor Array
CTS Corporation
742C163103JTR
C18, C19
33pF 50V Ceramic
Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H330J
C13, C14
47pF 50V Ceramic
Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H470J
C20
100pF 50V Ceramic
Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H101J
C21
1000pF 50V Ceramic
Chip Capacitor, ±5%, NPO
TDK
C1608C0G1H102J
C15
0.1µF 16V Ceramic
Chip Capacitor, ±10%,X7R
TDK
C1608X7R1C104K
C16, C17
0.33µF 16V Ceramic
Chip Capacitor, +/-20%,Y5V
TDK
C1608X5R1C334K
C9, C10, C11, C12, C22, C23,
C24, C25, C26, C27, C28
1µF 6.3V Ceramic
Chip Capacitor, ±10%, X5R
TDK
C1608X5R0J105K
C1, C2, C3, C4, C5, C6, C7,
C8
10µF 6.3V Ceramic
Chip Capacitor, ±10%, X5R
TDK
C3216X5R0J106K
D1
50V, 1A, Diode MELF SMD
Micro Commercial Components DL4001
D2
Yellow Light Emitting Diode
Lumex
SML-LX0603YW-TR
D3, D4, D6, D7
Green Light Emitting Diode
Lumex
SML-LX0603GW-TR
D5
Red Light Emitting Diode
Lumex
SML-LX0603IW-TR
Q1, Q2
N-Channel MOSFET
Zetex
ZXMN6A07F
X1
6MHz Crystal SMD
Epson
MA-505 6.000M-C0
U8
USB Streaming Controller
Texas Instruments
TAS1020BPFB
U2
5V LDO Regulator
Texas Instruments
REG1117-5
U9
3.3V/1.8V Dual Output LDO
Regulator
Texas Instruments
TPS767D318PWP
U3, U4
Quad, Tri-State Buffers
Texas Instruments
SN74LVC125APW
U5, U6, U7
Single IC Buffer Driver with
Open Drain o/p
Texas Instruments
SN74LVC1G07DBVR
U10
Single Tri-State Buffer
Texas Instruments
SN74LVC1G125DBVR
U1
64K 2-Wire Serial EEPROM
I2C
Microchip
24LC64I/SN
USB-MODEVM PWB
Texas Instruments
6463995
TSC2005EVM and TSC2005EVM-PDK
SLAU191 – September 2006
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References
Table 9. USB-MODEVM Bill of Materials (continued)
7.1
Designators
Description
Manufacturer
Mfg. Part Number
TP1, TP2, TP3, TP4, TP5,
TP6, TP9, TP10, TP11
Miniature Test Point Terminal
Keystone Electronics
5000
TP7, TP8
Multipurpose Test Point
Terminal
Keystone Electronics
5011
J7
USB Type B Slave Connector
Thru-Hole
Mill-Max
897-30-004-90-000000
J1, J2, J3, J4, J5, J8
2 Position Terminal Block
On Shore Technology
ED555/2DS
J9
2.5mm Power Connector
CUI Stack
PJ-102B
J10
BNC Connector, Female,
PC Mount
AMP/Tyco
414305-1
J11A, J12A, J21A, J22A
20-pin SMT Plug
Samtec
TSM-110-01-L-DV-P
J11B, J12B, J21B, J22B
20-pin SMT Socket
Samtec
SSW-110-22-F-D-VS-K
J13A, J23A
10-pin SMT Plug
Samtec
TSM-105-01-L-DV-P
J13B, J23B
10-pin SMT Socket
Samtec
SSW-105-22-F-D-VS-K
J6
4-Pin Double Row Header
(2x2) 0.1"
Samtec
TSW-102-07-L-D
J14, J15
12-Pin Double Row Header
(2x6) 0.1"
Samtec
TSW-106-07-L-D
JMP1-JMP4
2 Position Jumper,
0.1" spacing
Samtec
TSW-102-07-L-S
JMP8-JMP14
2 Position Jumper,
0.1" spacing
Samtec
TSW-102-07-L-S
JMP5, JMP6
3 Position Jumper,
0.1" spacing
Samtec
TSW-103-07-L-S
JMP7
3 Position Dual Row Jumper,
0.1" spacing
Samtec
TSW-103-07-L-D
SW1
SMT, Half-Pitch 2 Position
Switch
C&K Division, ITT
TDA02H0SK1
SW2
SMT, Half-Pitch 8 Position
Switch
C&K Division, ITT
TDA08H0SK1
Jumper Plug
Samtec
SNT-100-BK-T
TSC2005EVM Schematic
TSC2005 EVM schematic diagram is provided as a reference.
7.2
USB-MODEVM Schematic
USB-MODEVM schematic diagram is provided as a reference.
8
References
1. TSC2005, Nano-Power Touch Screen Controller with SPI Serial Interface data sheet (SBAS379)
2. TAS1020B, USB Streaming Controller data manual (SLES025)
3. REG1117/7A, 800mA and 1A Low Dropout Positive Regulator 1.8V, 2.5V, 2.85V, 3.3V, 5V, and
Adjustable data sheet (SBVS001)
4. TPS767D3xx, Dual-Output Low-Dropour Voltage Regulators data sheet (SLVS209)
5. SN74LVC125A, Quadruple Bus Buffer Gate With 3-State Outputs data sheet (SCAS290)
6. SN74LVC1G125, Single Bus Buffer Gate With 3-State Output data sheet (SCES223)
7. SN74LVC1G07, Single Buffer/Driver With Open-Drain Output data sheet (SCES296)
SLAU191 – September 2006
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TSC2005EVM and TSC2005EVM-PDK
19
SNSVDD
IOVDD
TP1
D
TP2
IOVDD
0
F3
0
A4
0
DAUGHTER-ANALOG
C3
C2
C1
NI
NI
NI
NI
Y+
CS
Y-
SDI
VREF
TP3
PINTDAV
A1
RESET
D1
SCLx
F1
CS
R7
C1
SDI
R8
E1
SDx
B1
PENIRQ
R12
2.7k
J2
R9
1
3
5
SS
7
9
MOSI 11
MISO 13
15
17
19
0
0
0
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
SCLK
R10
0
R13
2.7k
2
4
6
8
10
12
14
16
18
20
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
DGND
SDA
DAUGHTER-SERIAL
R6
NI
IOVDD
C
J2A (TOP) = SAM_TSM-110-01-L-DV-P
J2B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
TP4
C6
on-board
1
2
3
external
SDO
NI
A5
C
C4
SCLK
AUX
B5
C5
IOVDD
X-
E5
DGND
R5
0
RESET
A2
R4
F4
TSC2005IYZL
SNSGND
AUX
X+
SUBGND
R3
0
F2
R2
D5
AGND
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REFREF+
R1
X+
XY+
Y-
F5
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
2
4
6
8
10
12
14
16
18
20
SNSVDD
U1
J1
A3
C5
J1A (TOP) = SAM_TSM-110-01-L-DV-P
J1B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
1
3
5
7
9
11
13
15
17
19
D
10u
JMP1
5
VCC
SCL
VSS
WP
1uF
4
B
7
24AA64I/SN
1
2
3
B
2.7k
J3A (TOP) = SAM_TSM-105-01-L-DV-P
J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
C11
SDA
8
A0
A1
A2
U2
IOVDD
R11
6
SNSVDD
VREF
J3
1
3
5
+1.8VD 7
+3.3VD 9
+VA
+5VA
DGND
+1.8VD
+3.3VD
2
4
6
8
10
-VA
-5VA
AGND
VD1
+5VD
2
JMP3
1
DAUGHTER-POWER
L1
IOVDD
A
L2
100u
Placed next to DUT
IOVDD
100u
6
4
2
JMP4
IOVDD
5
3
1
SNSVDD
3
2
1
JMP2
C8
C7
1u
C9
SNSVDD
TI
DATA ACQUISITION PRODUCTS
HIGH-PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
0.1u
C10
1u
SNSVDD
0.1u
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USAA
ENGINEER Arek Kacprzak
TITLE
DRAWN BY Arek Kacprzak
DOCUMENT CONTROL NO.6476382 SIZE A4
SHEET 1
OF 1
TSC2005 Evaluation Module
DATE January 10th, 2006
FILE TSC2005EVM.SCH
REV A
1
2
3
4
6
5
REVISION HISTORY
REV
IOVDD
R5
2.7K
2
5
9
12
1
USB MCK
4
10
USB I2S
13
J6
Q2
ZXMN6A07F
EXTERNAL I2C
SDA
SCL
WP
8
A0
A1
A2
U1
VCC
C9
1uF
4
1
1
3
5
7
9
11
3
2
44
43
42
41
40
39
37
38
36
35
34
32
R12
3.09K
.001uF
R10
27.4
R11
C13
47pF
C14
47pF
R7
2.7K
JMP8
1
2
P1.2
P1.1
P1.0
+3.3VD
C11
1uF
C12
1uF
C
MOSI
SS
SCLK
RESET
14
VCC
J15
1
3
5
7
9
11
3
6
8
11
1Y
2Y
3Y
4Y
7
GND
2
4
6
8
10
12
EXTERNAL SPI
USB RST
USB SPI
P3.5
JMP13
1
2
D2
+3.3VD
YELLOW
C25
R8
2.7K
P3.4
JMP14
1
2
IOVDD
P3.3
B
U6
1uF
4
2
INT
3
J8
5
B
1A
2A
3A
4A
1OE
2OE
3OE
4OE
JMP12
1
2
SML-LX0603YW-TR
MISO
SN74LVC1G07DBV
SN74LVC125APW
MRESET
649
2
U4
2
5
9
12
1
4
10
13
USB ACTIVE
R13
4
1uF
JMP11
1
2
C10
1uF
EXTERNAL AUDIO DATA
C27 IOVDD
JMP10
1
2
C24
1uF
SW DIP-8
P1.3
JMP9
1
2
SN74LVC1G07DBV
ED555/2DS
+5VD
EXT PWR IN
+1.8VD
R14
390
U9
5
6
4
1
2
3
6VDC-10VDC IN
D3
SML-LX0603GW-TR
JMP6
PWR SELECT
GREEN
3
9
U2
REG1117-5
3
C15 DL4001
0.1uF
VIN
C16
0.33uF
VOUT
GND
D1
10
11
12
2
R15
10K
C6
10uF
1
J9
R16
10K
+5VD
A
+3.3VD
+1.8VD
IOVDD
JMP7
1
2
3
4
5
6
TP6
1IN
1IN
1EN
1GND
2GND
2EN
2IN
2IN
1RESET
1OUT
1OUT
2RESET
2OUT
2OUT
TPS767D318PWP
CUI-STACK PJ102-B
2.5 MM
SW1
1
2
4
3
24
23
22
18
17
R17
100K
C7
10uF
D5
SML-LX0603IW-TR
R18
100K
R4
10
+3.3VD
RED
R19
220
!"
C8
10uF
D4
SML-LX0603GW-TR
C17
0.33uF
1.8VD ENABLE
3.3VD ENABLE
28
GREEN
DATA ACQUISITION PRODUCTS
REGULATOR ENABLE
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
TITLE
ENGINEER RICK DOWNS
USB-MODEVM INTERFACE
DRAWN BY ROBERT BENJAMIN
DOCUMENT CONTROL NO. 6463996
SHEET 1
2
A
HIGH PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
IOVDD SELECT
1
SW2
1
2
3
4
5
6
7
8
PWR_DWN
U7
31
30
29
27
26
25
24
23
8
21
33
2
16
15
14
13
12
11
10
9
2
4
6
8
10
12
1uF
TP11
+3.3VD
IOVDD
C26
3
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
DVDD
DVDD
DVDD
AVDD
9
10
11
12
13
14
15
17
18
19
20
22
27.4
XTALO
XTALI
PLLFILI
PLLFILO
MCLKI
PUR
DP
DM
DVSS
DVSS
DVSS
AVSS
MRESET
TEST
EXTEN
RSTO
P3.0
P3.1
P3.2/XINT
P3.3
P3.4
P3.5
NC
NC
7
1
2
3
1.5K
+3.3VD
U8
TAS1020BPFB
SCL
SDA
VREN
RESET
MCLKO2
MCLKO1
CSCLK
CDATO
CDATI
CSYNC
CRESET
CSCHNE
46
47
48
1
3
5
6
7
4
16
28
45
100pF
C21
R9
J14
1uF
33pF
MA-505 6.000M-C0
6.00 MHZ
J7 USB SLAVE CONN
897-30-004-90-000000
I2SDOUT
C23
U5
C19
C20
4
3
2
1
BCLK
SN74LVC1G07DBV
33pF
24LC64I/SN
GND
D+
DVCC
X1
C18
A0
A1
A2
USB I2S
USB MCK
USB SPI
USB RST
EXT MCK
LRCLK
IOVDD
4
VSS
R20
75
MCLK
7
GND
R6
2.7K
RA1
10K
I2SDIN
6
5
+3.3VD
SCL
C
SN74LVC1G125DBV
3
6
8
11
1Y
2Y
3Y
4Y
D
2
SN74LVC125APW
+3.3VD
TP10
14
VCC
+3.3VD
5
1
3
1A
2A
3A
4A
1OE
2OE
3OE
4OE
5
2
4
4
1uF
U3
APPROVED
J10
EXT MCLK
U10
3
R3
2.7K
TP9
SDA
1uF
5
C22
Q1
ZXMN6A07F
D
C28 IOVDD
IOVDD
+3.3VD
ENGINEERING CHANGE NUMBER
3
4
5
OF
2
FILE
SIZE B
REV B
DATE 28-Oct-2004
D:\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\USB Interface
6
1
2
3
4
5
6
REVISION HISTORY
REV
ENGINEERING CHANGE NUMBER
APPROVED
D
1
2
3
D
J11
J12
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REFREF+
2
4
6
8
10
12
14
16
18
20
+5VA
J13A (TOP) = SAM_TSM-105-01-L-DV-P
J13B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
DAUGHTER-ANALOG
J11A (TOP) = SAM_TSM-110-01-L-DV-P
J11B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+5VA
+5VD
JMP1
1
2
+VA
+5VA
DGND
+1.8VD
+3.3VD
-VA
-5VA
AGND
VD1
+5VD
2
4
6
8
10
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
DGND
SDA
SCLK
SS
P3.3
J12A (TOP) = SAM_TSM-110-01-L-DV-P
J12B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+5VA
TP2
10uF
C2
+5VD
TP3
10uF
C3
TP4
10uF
JMP3
PWR_DWN
INT
JMP4
MISO
+3.3VD
MOSI
R1
R21
390
J1
-5VA
R22
390
SCL
2.7K
J2
+5VA
D6
SML-LX0603GW-TR
D7
SML-LX0603GW-TR
GREEN
GREEN
J3
+5VD
TP5
+1.8VD
C
RESET
IOVDD
2
C1
P3.5
P1.0
1
-5VA
P3.4
+5VD
JMP2
1
2
TP1
JMP5
2
4
6
8
10
12
14
16
18
20
-5VA
DAUGHTER-POWER
TP7
TP8
AGND
DGND
JPR-2X1
C
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
DAUGHTER-SERIAL
J13
1
3
5
7
9
1
3
5
7
9
11
13
15
17
19
2
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
1
1
3
5
7
9
11
13
15
17
19
C4
C5
10uF
10uF
J4
+1.8VD
R2
SDA
2.7K
I2SDOUT
J5
+3.3VD
I2SDIN
LRCLK
BCLK
J21
1
3
5
7
9
11
13
15
17
19
B
A0(-)
A1(-)
A2(-)
A3(-)
AGND
AGND
AGND
VCOM
AGND
AGND
J22
A0(+)
A1(+)
A2(+)
A3(+)
A4
A5
A6
A7
REFREF+
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
+5VA
DAUGHTER-ANALOG
J21A (TOP) = SAM_TSM-110-01-L-DV-P
J21B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
+1.8VD
+VA
+5VA
DGND
+1.8VD
+3.3VD
GPIO0
DGND
GPIO1
GPIO2
DGND
GPIO3
GPIO4
SCL
DGND
SDA
2
4
6
8
10
12
14
16
18
20
P1.1
B
P1.2
P1.3
MCLK
DAUGHTER-SERIAL
J23
1
3
5
7
9
CNTL
CLKX
CLKR
FSX
FSR
DX
DR
INT
TOUT
GPIO5
-VA
-5VA
AGND
VD1
+5VD
2
4
6
8
10
-5VA
J22A (TOP) = SAM_TSM-110-01-L-DV-P
J22B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K
DAUGHTER-POWER
+3.3VD
+5VD
J23A (TOP) = SAM_TSM-105-01-L-DV-P
J23B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K
!"
A
DATA ACQUISITION PRODUCTS
A
HIGH-PERFORMANCE ANALOG DIVISION
SEMICONDUCTOR GROUP
6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA
TITLE
ENGINEER
RICK DOWNS
DRAWN BY
ROBERT BENJAMIN
USB-MODEVM INTERFACE
DOCUMENT CONTROL NO. 6463996
SHEET 2
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SIZE B
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DATE 28-Oct-2004
D:\USB-MODEVM\USB Motherboard - ModEvm.ddb - Documents\Daughtercard Interface
6
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