Texas Instruments | Very High Voltage Linear Regulator | Datasheet | Texas Instruments Very High Voltage Linear Regulator Datasheet

Texas Instruments Very High Voltage Linear Regulator Datasheet
TPS7A4001-DIE
www.ti.com
SBVS223 – FEBRUARY 2013
VERY HIGH VOLTAGE LINEAR REGULATOR
Check for Samples: TPS7A4001-DIE
FEATURES
1
•
•
•
•
2
Very High Maximum Input Voltage
CMOS Logic-Level-Compatible Enable Pin
Stable with Ceramic Capacitors
Built-In Current-Limit and Thermal Shutdown
Protection
APPLICATIONS
•
•
•
•
•
•
•
Microprocessors, Microcontrollers Powered by
Industrial Busses with High Voltage Transients
Industrial Automation
Telecom Infrastrucure
Automotive
Power over Ethernet (PoE)
LED Lighting
Bias Power Supplies
DESCRIPTION
The TPS7A4001-DIE is a very high voltage-tolerant linear regulator that is able to withstand continuous dc or
transient input voltages.
The TPS7A4001-DIE offers an enable pin (EN) compatible with standard CMOS logic to enable a low-current
shutdown mode.
The TPS7A4001-DIE has an internal thermal shutdown and current limiting to protect the system during fault
conditions.
In addition, the TPS7A4001-DIE is ideal for generating a low-voltage supply from intermediate voltage rails in
telecom and industrial applications; not only it can supply a well-regulated voltage rail, but it can also withstand
and maintain regulation during very high and fast voltage transients. These features translate to simpler and
more cost-effective electrical surge-protection circuitry for a wide range of applications, including PoE, bias
supply, and LED lighting.
ORDERING INFORMATION (1)
(1)
(2)
PRODUCT
PACKAGE
DESIGNATOR
PACKAGE
TPS7A4001
TD
Bare die in waffle pack (2)
ORDERABLE PART NUMBER
PACKAGE QUANTITY
TPS7A4001TDA1
132
TPS7A4001TDA2
10
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Processing is per the Texas Instruments commercial production baseline and is in compliance with the Texas Instruments Quality
Control System in effect at the time of manufacture. Electrical screening consists of DC parametric and functional testing at room
temperature only. Unless otherwise specified by Texas Instruments AC performance and performance over temperature is not
warranted. Visual Inspection is performed in accordance with MIL-STD-883 Test Method 2010 Condition B at 75X minimum.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
TPS7A4001-DIE
SBVS223 – FEBRUARY 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
BARE DIE INFORMATION
DIE THICKNESS
BACKSIDE FINISH
BACKSIDE
POTENTIAL
BOND PAD
METALLIZATION COMPOSITION
BOND PAD
THICKNESS
10.5 mils.
Silicon with backgrind
Floating
AlTiW
760 nm
Table 1. Bond Pad Coordinates in Microns
2
DESCRIPTION
PAD NUMBER
X MIN
Y MIN
X MAX
Y MAX
OUT
1
356.94
46.08
432
121.14
FB
2
776.97
46.08
852.03
121.14
GND
3
1293.12
46.08
1368.18
121.14
EN
4
1210.05
1285.56
1285.11
1360.62
IN
5
403.56
1285.56
478.62
1360.62
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: TPS7A4001-DIE
PACKAGE OPTION ADDENDUM
www.ti.com
15-Dec-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS7A4001TDA1
ACTIVE
0
132
TBD
Call TI
N / A for Pkg Type
-40 to 125
TPS7A4001TDA2
ACTIVE
0
10
TBD
Call TI
N / A for Pkg Type
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
15-Dec-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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