Texas Instruments | Method For Cal Output Voltage Tolerances in Adj Regs (Rev. A) | Application notes | Texas Instruments Method For Cal Output Voltage Tolerances in Adj Regs (Rev. A) Application notes

Texas Instruments Method For Cal Output Voltage Tolerances in Adj Regs (Rev. A) Application notes
Application Report
SNVA112A – July 2005 – Revised May 2013
AN-1378 Method for Calculating Output Voltage
Tolerances in Adjustable Regulators
.....................................................................................................................................................
ABSTRACT
When working with voltage regulator circuits, the designer is often confronted with the need to calculate
the tolerance of the regulated output voltage. For fixed voltage regulators, this problem is easily managed
because the required information is directly supplied on the semiconductor manufacturer’s data sheet.
1
2
3
4
5
6
7
8
9
10
11
Contents
Introduction .................................................................................................................. 2
The Commonly Encountered Circuits .................................................................................... 2
The Worst Case Approach ................................................................................................ 2
Sensitivity Analysis ......................................................................................................... 3
Review of Random Variable Mathematics ............................................................................... 4
Statistical Variation of Resistors, Semiconductors, and Systems .................................................... 4
The RSS Method ............................................................................................................ 6
Random Variable Theory vs. Worst Case Over PVT .................................................................. 6
Errors Caused by Adjust Pin Current ..................................................................................... 8
Conclusion ................................................................................................................... 9
References ................................................................................................................. 10
1
Ground Referenced ......................................................................................................... 2
2
Not Ground Referenced .................................................................................................... 2
3
Adjustable Regulators: Common Topologies
List of Figures
4
5
6
7
8
9
...........................................................................
– Sensitivity to Resistor Variations vs.Vout ...............................................................................
Typical Vref Variation ........................................................................................................
Typical Resistor Variation: 1% General Purpose 0805 SMD .........................................................
Ground Referenced .........................................................................................................
Not Ground Referenced ....................................................................................................
Adjust Pin Currents (Arrow Indicates Actual Direction of Current Flow) .............................................
2
4
5
5
8
8
9
List of Tables
1
2
3
4
5
.................................................
Gaussian Random Variable Operations .................................................................................
Partial Derivatives of Equation 1 ..........................................................................................
Equivalent Six Sigma Output Tolerance for Vout [%] for Common Vout’s (Vref = 1.275 V) ...........................
Largest Sensible Values of R2 for Various Iadj and Vout ................................................................
Values of Worst Case Error [%] for Common Vout’s (Vref = 1.275 V)
3
6
7
8
9
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AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
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1
Introduction
1
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Introduction
The tolerancing of adjustable regulators can be more complicated because of the introduction of an
external feedback resistor network, effects of adjust pin current, and the difficulties associated with
combining these terms to obtain an overall estimate of output voltage tolerance.
Traditional “worst case” analysis methods, although valid, result in unrealistic and excessively
conservative estimates of the total tolerances leading to unnecessary added circuit costs.
Reduced voltages for modern microprocessors are further increasing the demands on available voltage
tolerances. As such, a more detailed understanding of the tolerancing problem is needed.
2
The Commonly Encountered Circuits
The most commonly encountered adjustable regulator circuits are shown in Figure 2. Circuits and the
statistical effects on Vout that are caused by variations in R1, R2, and Vadj will be examined. Be aware that
regulators without ground pins (the LM317 and LM1117 for example) have the same mathematical
relationship between Vout and Vadj, however, Vref is referenced to ground in one case and to the output pin
the other. Reversing the positions of R1 and R2 makes the mathematical relationship for both circuits
identical (see Equation 1). Be aware that many data sheets are not consistent in the identification of R1
and R2, which further compounds confusion regarding the correct relationship.
For the circuits in Figure 2, Vout is related to Vref:
Vout = Vref x
R 1 + R2
R1
(1)
LM1117-ADJ
LM2941
VIN
IN
OUT
VOUT
VIN
VIN
VOUT
ADJ
GND ADJ
R2
CIN
470 nF
+ COUT
22 PF
VREF
VOUT
VREF
R1
10 PF
100 PF
R1
Figure 1. Ground Referenced
R2
Figure 2. Not Ground Referenced
Figure 3. Adjustable Regulators: Common Topologies
3
The Worst Case Approach
The overly conservative approach to this problem is to take the known relationship between reference
voltage tolerances and output voltage and calculate the worst case output voltage that can occur in the
unlikely case that all tolerances are simultaneously at their worst case extremes. Remember that exact
values for the desired R1 and R2 may not be available so an additional, but static, voltage error may have
to be tolerated.
Equation 2 and Equation 3 are commonly applied using plus and minus 1% for values of Rmin and Rmax.
The drawback of this approach is that it results in excessively conservative tolerance limits. This is
especially true since Vref, R1, and R2 are uncorrelated random variables.
Results for the worst case approach are tabulated in Table 1. The minimum and maximum deviations are
not exactly symmetric so only the worst case is tabulated. The worst case always occurs on the maximum
side. Centering of the nominal value at the actual mean can take advantage of this fact and gain a small
improvement in worst case tolerancing.
2
AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
Regulators
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Sensitivity Analysis
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R1_min + R2_max
Vout_max = Vref_max x
R1_min
(2)
R1_max + R2_min
Vout_min = Vref_min x
R1_max
(3)
Table 1. Values of Worst Case Error [%] for Common Vout’s (Vref = 1.275 V)
VOUT = 1.8 V
VOUT = 2.5 V
Resistor Tolerance
Resistor Tolerance
0.5%
1%
5%
0.5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
1%
5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
0.82
1.14
± 1.0
1.32
1.65
3.85
± 0.5
1.01
1.53
5.87
4.37
± 1.0
1.52
2.04
± 2.0
2.32
6.40
2.65
5.40
± 2.0
2.52
3.05
± 5.0
5.33
7.45
5.67
8.50
± 5.0
5.54
6.08
10.61
VOUT = 3.3 V
VOUT = 5.0 V
Resistor Tolerance
Resistor Tolerance
0.5%
1%
5%
0.5%
1%
5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
1.13
1.77
7.14
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
1.26
2.03
± 1.0
1.64
2.28
8.48
7.67
± 1.0
1.77
2.54
9.02
± 2.0
2.64
± 5.0
2.64
3.29
8.73
± 2.0
2.77
3.55
10.10
6.33
11.93
± 5.0
5.80
6.60
13.33
VOUT = 12 V
VOUT = 15 V
Resistor Tolerance
4
Resistor Tolerance
0.5%
1%
5%
0.5%
1%
5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
1.41
2.32
9.99
± 0.5
1.43
2.36
10.21
± 1.0
1.91
2.83
10.54
± 1.0
1.93
2.87
10.76
± 2.0
2.92
3.85
11.64
± 2.0
2.94
3.89
11.86
± 5.0
5.95
6.90
14.92
± 5.0
5.97
6.95
15.15
Sensitivity Analysis
So how do small changes in R1, R2, and Vout translate to the output voltage? Sensitivity analysis reveals
the underlying nature of the circuit.
Taking the partial derivatives of Equation 1 with respect to each of its variables lets us calculate the
sensitivity of Vout to small changes in each variable. This is done by dividing the partial derviatives by Vout,
then substituting Equation 1 back into the equation, and finally solving for the fractional change of Vout with
respect to the fractional change in each of the three variables:
GVout
Vout
GVout
Vout
GVout
Vout
=1
=
=
§ GVref ·
© Vref ¹
therefore:
R1 + R 2
§ GR1 ·
© R1 ¹
R2
GR2
R1 + R2
R2
- R2
S
Vout
=1
Vref
therefore:
(4)
- R2
S Vout =
R1 R1 + R2
(5)
R2
therefore:
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S
Vout
=
R2 R1 + R2
AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
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3
Review of Random Variable Mathematics
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The result from Equation 4 is obvious. That is, variation in Vref translate directly to variations in Vout.
Equation 5 and Equation 6 are a bit more interesting. These show that variations in the voltage setting
resistors R1 and R2 will translate to the output with a sensitivity ranging from zero to one. The highest
sensitivity to resistor variation occurs when output voltages are high and lowest when the output voltage
equals the reference voltage (Figure 4).
1
0.8
R2
0.6
SENSITIVITY
0.4
0.2
0
-0.2
-0.4
-0.6
Vref
R1
-0.8
-1
0
2.5
5
7.5
10 12.5 15 17.5 20
VOUT
Figure 4. – Sensitivity to Resistor Variations vs.Vout
5
Review of Random Variable Mathematics
A few glances at Table 1 and it becomes clear that, for adjustable regulators, the worst case deviations of
Vout can be quite large. For example, look at the case where Vout = 3.3 V, ΔVref = ±1%, and ΔR = ±1%. For
this case, the total output worst case error could be as high as ΔVout = ±2.28%! We can show that this
number, although conservative, is a gross exaggeration of the true variation in Vout. This is because Vref,
R1, and R2 are all independent random variables. Some argue that R1 and R2 may not be independent
random variables. This is especially true if they are fed from the same reel or supply bin. There is some
truth to this, however, R1 and R2 are rarely the same value and even if they are, their sensitivities (see
Equation 5 and Equation 6) have equal magnitudes and opposite polarities so any correlation would tend
to cancel rather than add!
6
Statistical Variation of Resistors, Semiconductors, and Systems
To calculate actual variation, you will need to make some assumptions about the statistics of Vref and the
resistors you buy. This information may be available from the vendor, however, in many cases, the vendor
may be reluctant to release this data.
For fundamental electronic components like resistors it is reasonable to assume that these are produced
under a “six sigma” paradigm and have Gaussian variation. Variations in Vref are also approximately
Gaussian (Figure 5). Distribution data for a typical linear regulator is shown in Figure 5 and has variation
against room temperature specifications on the order of ±6σ. Variation against the full temperature range
specification is even more impressive and can be as high as ±10σ (to accommodate variations with
temperature).
Because components like regulators and chip resistors are made in very high volumes, tight process
control is no less than mandatory.
4
AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
Regulators
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Statistical Variation of Resistors, Semiconductors, and Systems
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14
RELATIVE FREQUENCY (%)
12
10
8
6
4
2
0
1.24 1.25 1.26 1.27 1.28 1.29 1.30 1.31 1.32
MEASURED VREF (V)
Figure 5. Typical Vref Variation
A similar histogram supporting our assumption for 0805 general purpose surface mount resistors is shown
in Figure 6. The nominal value for a 1% resistor is shown here controlled to greater than ±6σ and is also
approximately Gaussian.
RELATIVE FREQUENCY (%)
24
20
16
12
8
4
0
130
131
132
133
134
135
136
MEASURED RESISTANCE (:)
Figure 6. Typical Resistor Variation: 1% General Purpose 0805 SMD
NOTE: Figure 5 and Figure 6 are presented to support the assumption that Vref and the voltage
setting resistors are Gaussian and have variations on the order of six sigma or better.
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5
The RSS Method
7
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The RSS Method
The RSS (root sum squares) method is only valid for the case when independent Gaussian random
variables are combined as sums. Since Equation 1 contains products, quotients and sums of random
variables, this method is not valid for Equation 1.
8
Random Variable Theory vs. Worst Case Over PVT
In the worst case method, you saw that total output voltage tolerances could be substantially larger than
expected (Table 1). Is it realistic to use these limits? Random variable theory can be used to show that
these excessive limits are not necessary. In particular, the concept of “worst case” is not exactly
appropriate when dealing with random processes where there is always a (very small) probability that a
sample could fall outside of the worst case limits.
Rather than look at worst case limits, it is more appropriate to look at the equivalent ±6σ points for the
regulator’s output voltage. For this purpose, look again at the output voltage equation.
Vout = Vref x
R 1 + R2
R1
(7)
Be reminded that Vref, R1, and R2 are all independent random variables. As such, Vout is a function of
three random variables. To complicate matters, summation, multiplication, and division are all involved.
Although summation of two Gaussian random variables produces a Gaussian result, this is not the case
for multiplication or division. As such, the true distribution of Vout could be quite complicated. Fortunately,
approximations exist for calculating the mean value and deviation for sums, products, and quotients.
These approximations are especially accurate for the case where V(x) << E(x), which is the case for linear
regulators and resistors. In particular, consider these relationships:
E(x) = mean(x)
V(x) = variance(x) = σ2
For uncorrelated Gaussian random variables, the following relationships apply:
Table 2. Gaussian Random Variable Operations
Operation
Mean and Variance
SUM
Resulting Distribution
E(x + y) = E(x) + E(y)
Gaussian
V(x + y) = V(x) + V(y)
PRODUCT
E(x• y) = E(x) • E(y)
Gaussian and Modified Bessel
V(x• y) = E(x)2 x V(y) + E(y)2 x V(x) + V(x) x V(y)
QUOTIENT
x
E y
V
x
y
E(x)
| E(y) +
|
Cauchy for zero mean x and y
E(x) x V(y)
3
E(y)
(8)
2
V(y)
E(x)
V(x)
x
+
2
E(y)
E(x)2 E(y)
(9)
Notice that the resulting distribution after these operations is not always Gaussian. It is possible to
calculate the distribution function for the resulting random variable, however, this is quite complicated and
unnecessary since you are only interested in the mean and variance of the result. Since V(x) << E(x), the
resulting distribution will somewhat resemble a Gaussian distribution so our Gaussian based SPC
(Statistical Process Control) concepts will still be valid.
Since Equation 1 involves a sum, product, and quotient, you cannot use the relationships above; instead,
you must calculate a specific approximating equation for E(Vout) and V(Vout) using these relationships.
2
E(Vout) | Vout +
V(Vout) | V[R1] x
6
2
G Vout 1
G Vout 1
G2Vout
1
x
V[V
]
x
x V[R1] x
+
x
V[R
]
x
+
ref
2
2
2
2
2
2
2
GR2
GVref
GR1
GVout
GR1
2
2
+ V[R2] x
GVout
GVout
+ V[Vref] x
GR2
GVref
(10)
2
AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
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Equation 10 and Equation 11 originate from Taylor series expansion (see Mood, Graybill, and Boes).
Notice that the expected value for Vout will be slightly different than the simple value calculated in
Equation 1. The third and fourth terms in Equation 10 are zero. However, there is a very small positive
error caused by the second term, which is not exactly zero. Since you are working with six sigma
processes, it is easy to show that this second term is virtually zero and the expected value of Vout is
essentially as calculated with Equation 1.
To evaluate Equation 10 and Equation 11, you will need the following 'Partial Derivatives of Equation 1' as
shown in Table 3.
Table 3. Partial Derivatives of Equation 1
GVout
GR1
R2
=
-
G2Vout
GR12
2
R1
GR2
(12)
2 x R2
=
GVout
x Vref
3
=
1
R1
GVout
x Vref
(13)
GR2
R1
2
R 1 + R2
=
R1
(14)
G2Vout
G2Vout
x Vref
GVref
=0
(16)
(15)
GVref2
=0
(17)
Substituting into Equation 10 and Equation 11:
E(Vout) ≊ Vout + V[R1] x R2 / R13 x Vref
V(Vout) | V[R1] x
R2
2
R1
2
x Vref + V[R2] x
(18)
Vref
R1
2
+ V[Vref] x
R1 + R2
2
R1
(19)
Using Equation 19, the six-sigma based error for common Vout’s is tabulated in Table 4. Notice that the
results using this method are far more practical than those obtained with the worst case method and a six
sigma paradigm is still assured for the resulting output voltage.
Values for E(Vout) are not tabulated because the difference from the calculated value of Vout is very small.
The worst case for this error occurs at high output voltages. For example, with VOUT = 15 V, R1 = 10 kΩ,
R2 = 107 kΩ, and VREF = 1.275 V the expected value of the output voltage will only be 40 µV higher than
predicted with Equation 1. This is an error of only 0.000254%. As such, this error predicted by Equation 18
is ignored.
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Errors Caused by Adjust Pin Current
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Table 4. Equivalent Six Sigma Output Tolerance for Vout [%] for Common Vout’s (Vref = 1.275 V)
Vout = 1.8 V
Vout = 2.5 V
Resistor Tolerance
Resistor Tolerance
0.5%
1%
5%
0.5%
1%
5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
0.54
0.65
2.12
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
0.61
0.85
± 1.0
1.02
1.08
3.50
2.29
± 1.0
1.06
1.22
3.61
± 2.0
2.01
± 5.0
5.00
2.04
2.87
± 2.0
2.03
2.12
4.00
5.02
5.41
± 5.0
5.01
5.05
6.08
VOUT = 3.3 V
VOUT = 5.0 V
Resistor Tolerance
Resistor Tolerance
0.5%
1%
5%
0.5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
1%
5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
0.66
1.00
4.37
± 0.5
0.73
1.17
5.29
± 1.0
1.09
± 2.0
2.05
1.32
4.45
± 1.0
1.13
1.45
5.36
2.18
4.78
± 2.0
2.07
2.26
± 5.0
5.02
5.63
5.07
6.62
± 5.0
5.03
5.11
7.26
VOUT = 12 V
VoutOUT = 15 V
Resistor Tolerance
9
Resistor Tolerance
0.5%
1%
5%
0.5%
1%
5%
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
0.81
1.36
6.34
ΔVref [%]
ΔVout [%]
ΔVout [%]
ΔVout [%]
± 0.5
0.82
1.39
± 1.0
1.18
1.61
6.49
6.40
± 1.0
1.19
1.64
± 2.0
2.10
6.55
2.37
6.63
± 2.0
2.10
2.38
6.77
± 5.0
5.04
5.16
8.06
± 5.0
5.04
5.16
8.18
Errors Caused by Adjust Pin Current
For all adjustable regulators, there is always a small amount of current that flows at the adjust pin. Ideally,
this current would be zero. For many parts, this current is very low and is not specified. For a bipolar part
like the LM1117-ADJ, the adjust pin current is typically 60 µA. For the LM2941 it is about 5 µA. For CMOS
regulators, the adjust pin current is much less of a concern and is usually 100 nA or less.
Equation 1 can be modified to include the effects of the unwanted adjust pin current.
Vout = Vref x
R 1 + R2
R1
+ Iadj x R2
(20)
Equation 20 applies to both circuits. For both circuits, the polarity of Iadj is positive, however, the direction
of flow is as defined in Figure 8. Again be reminded that the location of R1, R2 and the Vref is different for
the two circuits, however, the resulting Equation 20 is the same. For both circuits, the adjust pin current
will cause positive errors in Vout. If the polarity of the adjust pin current is in question, some data sheets
contain a transistor level “equivalent circuit diagram.” The actual bias current polarity can usually be
determined from the equivalent circuit diagram by examining the polarity of the transistor junction at the
adjust pin. Depending upon how much adjust pin current error is tolerable, it is possible to calculate the
largest sensible value for R2 (Equation 21 and Table 5).
R2_MAX =
% Error Vout
x
Iadj
100
(21)
For most circuits, a small value for R2 is not a problem. For battery powered circuits, the wasted current
flowing through feedback resistors R1 and R2 may become an issue. If this is the case then it will be
desirable to select the largest reasonable value for R2.
8
AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
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LM2941
VIN
IN
LM1117-ADJ
OUT
VIN
VOUT
VIN
VOUT
ADJ
GND ADJ
R2
IADJ
CIN
470 nF
+ COUT
VOUT
VREF
R1
10 PF
22 PF
100 PF
IADJ
VREF
R1
R2
Figure 7. Ground Referenced
Figure 8. Not Ground Referenced
Figure 9. Adjust Pin Currents (Arrow Indicates Actual Direction of Current Flow)
Table 5. Largest Sensible Values of R2 for Various Iadj and Vout
For No More Than 0.1% Additional Error Select R2 Less Than:
VOUT
Iadj (µA)
1.8 V
2.5 V
3.3 V
5.0 V
0.01
180 kΩ
250 kΩ
330 kΩ
500 kΩ
12.0 V
1.2 MΩ
15.0 V
(1)
1.5 MΩ
(1)
0.1
18 kΩ
25 kΩ
33 kΩ
50 kΩ
120 kΩ
1
1.8 kΩ
2.5 kΩ
3.3 kΩ
5 kΩ
12 kΩ
150 kΩ
15 kΩ
10
180 Ω
250 Ω
330 Ω
500 Ω
1.2 kΩ
1.5 kΩ
12.0 V
15.0 V
For No More Than 0.5% Additional Error Select R2 Less Than:
VOUT
Iadj (µA)
1.8 V
2.5 V
3.3 V
1.25 MΩ
(1)
5.0 V
1.65 MΩ
(1)
2.5 MΩ
6.0 MΩ
(1)
7.5 MΩ
(1)
0.01
900 kΩ
0.1
90 kΩ
125 kΩ
165 kΩ
250 kΩ
600 kΩ
1
9 kΩ
12.5 kΩ
16.5 kΩ
25 kΩ
60 kΩ
75 kΩ
10
900 Ω
1.25 kΩ
1.65 kΩ
2.5 kΩ
6 kΩ
7.5 kΩ
750 kΩ
For No More Than 1% Additional Error Select R2 Less Than:
VOUT
Iadj (µA)
0.01
(1)
10
1.8 V
1.8 MΩ
2.5 V
(1)
2.5 MΩ
3.3 V
(1)
3.3 MΩ
5.0 V
(1)
5.0 MΩ
12.0 V
(1)
15.0 MΩ (1)
(1)
1.5 MΩ
12.0 MΩ
1.2 MΩ
15.0 V
(1)
(1)
0.1
180 kΩ
250 kΩ
330 kΩ
500 kΩ
1
18 kΩ
25 kΩ
33 kΩ
50 kΩ
120 kΩ
150 kΩ
10
1.8 kΩ
2.5 kΩ
3.3 kΩ
5 kΩ
12 kΩ
15 kΩ
Values of R2 greater than 1 MΩ may be inappropriate because of the difficultly associated with maintaining high impedances with surface
mount resistors. In particular, ionic PC board contaminants may limit the highest attainable on-board resistance figures that can be
reliably maintained.
Conclusion
The presented method for calculating voltage tolerances in adjustable regulators results in substantial
improvements in the available output voltage tolerance while maintaining tight process control and a six
sigma paradigm.
Complete understanding of the commonly used methods for combining tolerances and sources of error is
the only way to get the most from any design.
SNVA112A – July 2005 – Revised May 2013
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AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
Regulators
Copyright © 2005–2013, Texas Instruments Incorporated
9
References
11
References
•
•
•
•
10
www.ti.com
Mood, Alexander McFarlane, Franklin A. Graybill, and Duane C. Boes, Introduction to the Theory of
Statistics. n.p.: McGraw-Hill, 1974.
Mathword, Continuous Distributions, 2005,
http://mathworld.wolfram.com/topics/ContinuousDistributions.html.
Cooper, George R. and Clare D. McGillem, Probabilistic Methods of Signal and System Analysis. New
York: Holt, Rinehart and Winston, Inc., 1971.
Papoulis, Athanasios. Probability, Random Variables, and Stochastic Processes. New York: McGrawHill, Inc., 1991.
AN-1378 Method for Calculating Output Voltage Tolerances in Adjustable
Regulators
Copyright © 2005–2013, Texas Instruments Incorporated
SNVA112A – July 2005 – Revised May 2013
Submit Documentation Feedback
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