Texas Instruments | TVS1801 18-V Bidirectional Flat-Clamp Surge Protection Device (Rev. A) | Datasheet | Texas Instruments TVS1801 18-V Bidirectional Flat-Clamp Surge Protection Device (Rev. A) Datasheet

Texas Instruments TVS1801 18-V Bidirectional Flat-Clamp Surge Protection Device (Rev. A) Datasheet
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TVS1801
SLVSEQ3A – SEPTEMBER 2018 – REVISED DECEMBER 2018
TVS1801 18-V Bidirectional Flat-Clamp Surge Protection Device
1 Features
3 Description
•
The TVS1801 device shunts up to 30 A of IEC
61000-4-5 fault current to protect systems from highpower transients or lightning strikes. The device
survives the common industrial signal line EMC
requirement of 1-kV IEC 61000-4-5 open circuit
voltage coupled through a 42-Ω impedance. The
TVS1801 uses a feedback mechanism to ensure
precise flat clamping during a fault, keeping system
exposure lower than traditional TVS diodes. The tight
voltage regulation allows designers to confidently
select system components with a lower voltage
tolerance, lowering system costs and complexity
without sacrificing robustness. The TVS1801 has a
±18-V operating range to enable operation in systems
that require protection against reverse wiring
conditions.
1
•
•
•
•
•
•
•
•
•
Protection Against 1-kV, 42-Ω IEC 61000-4-5
Surge Test for Industrial Signal Lines
Bidirectional Polarity Enables Protection Against
Bipolar Signaling or Miswiring Conditions
Clamping Voltage of 27.4 V at 30 A of 8/20-µs
Surge Current
Standoff Voltage: ±18 V
Small 3-mm x 3-mm SON Footprint
Survives Over 5,000 Repetitive Strikes of 30-A
8/20-µs Surge Current at 125°C
Robust Surge Protection
– IEC61000-4-5 (8/20 µs): 30 A
– IEC61643-321 (10/1000 µs): 4.5 A
Low Leakage Current
– 0.4-nA Typical at 27°C
– 280-nA Maximum at 85°C
Low Capacitance: 65 pF
Integrated Level 4 IEC 61000-4-2 ESD Protection
2 Applications
•
•
•
•
•
•
Industrial Sensor I/O
PLC I/O Modules
Solid-State Drives
Appliances
Medical Equipment
12-V Power Lines
In addition, the TVS1801 is available in a small SON
footprint designed for space constrained applications,
offering a significant size reduction compared to
standard SMA and SMB packages. Low device
leakage and capacitance ensure a minimal effect on
the protected line. To ensure robust protection over
the lifetime of the product, TI tests the TVS1801
against 5000 repetitive surge strikes at 125°C with no
shift in device performance.
The TVS1801 is part of TI's Flat-Clamp family of
surge devices. For a deeper look at the Flat-Clamp
family, refer to the Flat-Clamp Surge Protection
Technology for Efficient System Protection white
paper.
Device Information(1)
PART NUMBER
TVS1801
PACKAGE
SON (8)
BODY SIZE (NOM)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
Voltage
Voltage Clamp Response to 8/20 µs Surge Event
10
20
30
Time ( s)
Traditional TVS
TI Flat-Clamp
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TVS1801
SLVSEQ3A – SEPTEMBER 2018 – REVISED DECEMBER 2018
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Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
7.7
5
5
5
5
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings - JEDEC ..............................................
ESD Ratings - IEC ....................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
8.3 Feature Description................................................... 8
8.4 Device Functional Modes ......................................... 8
9
Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application ................................................. 10
10 Power Supply Recommendations ..................... 11
11 Layout................................................................... 12
11.1 Layout Guidelines ................................................. 12
11.2 Layout Example .................................................... 12
12 Device and Documentation Support ................. 13
12.1
12.2
12.3
12.4
12.5
12.6
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
13
13
13
13
13
13
13 Mechanical, Packaging, and Orderable
Information ........................................................... 13
4 Revision History
Changes from Original (September 2018) to Revision A
•
2
Page
Changed from Advance Information to Production Data ....................................................................................................... 1
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5 Device Comparison Table
DEVICE
Vrwm
Vclamp at Ipp
Ipp (8/20 µs)
Leakage @
Vrwm
POLARITY
Package
TVS0500
5
9.2 V
43 A
0.07 nA
Unidirectional
DRV (SON-6)
TVS0701
7
11 V
30 A
0.25 nA
Bidirectional
DRB (SON-8)
TVS1400
14
18.6 V
43 A
2 nA
Unidirectional
DRV (SON-6)
TVS1401
14
20.5 V
30 A
1.1 nA
Bidirectional
DRB (SON-8)
TVS1800
18
22.8 V
40 A
0.3 nA
Unidirectional
DRV (SON-6)
TVS1801
18
27.4 V
30 A
0.4 nA
Bidirectional
DRB (SON-8)
TVS2200
22
27.7 V
40 A
3.2 nA
Unidirectional
DRV (SON-6)
TVS2201
22
29.6 V
30 A
2 nA
Bidirectional
DRB (SON-8)
TVS2700
27
32.5 V
40 A
1.7 nA
Unidirectional
DRV (SON-6)
TVS2701
27
34 V
27 A
0.8 nA
Bidirectional
DRB (SON-8)
TVS3300
33
38 V
35 A
19 nA
Unidirectional
DRV (SON-6), YZF
(WCSP)
TVS3301
33
40 V
27 A
2.5 nA
Bidirectional
DRB (SON-8)
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6 Pin Configuration and Functions
DRB Package
8-Pin SON
Top View
Pin Functions
PIN
NAME
DRB
TYPE
IN
1, 2, 3, 4
IN
GND
5, 6, 7, 8
GND
Exposed Thermal Pad
NC
FLOAT
4
DESCRIPTION
Surge Protected Channel
Ground
Exposed Thermal Pad Must Be Floating
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7 Specifications
7.1 Absolute Maximum Ratings
TA = 27°C (unless otherwise noted) (1)
MIN
MAX
UNIT
±30
A
IEC 61000-4-5 Power (8/20 µs)
825
W
IEC 61643-321 Current (10/1000 µs)
±4.5
A
IEC 61643-321 Power (10/1000 µs)
120
W
IEC 61000-4-5 Current (8/20 µs), TA < 125°C
Maximum Surge
EFT
IEC 61000-4-4 EFT Protection
80
A
IBR
DC Current
33
mA
TA
Ambient Operating Temperature
-40
125
°C
Tstg
Storage Temperature
-65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings - JEDEC
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged device model (CDM), per JEDEC
specificationJESD22-C101, all pins (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 ESD Ratings - IEC
VALUE
V(ESD)
Electrostatic discharge
IEC 61000-4-2 contact discharge
±8
IEC 61000-4-2 air-gap discharge
±15
UNIT
kV
7.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VRWM
NOM
Reverse Stand-Off Voltage
MAX
UNIT
±18
V
7.5 Thermal Information
TVS1801
THERMAL METRIC (1)
DRB (SON)
UNIT
8 PINS
RqJA
Junction-to-ambient thermal resistance
52
°C/W
RqJC(top)
Junction-to-case (top) thermal resistance
56.1
°C/W
RqJB
Junction-to-board thermal resistance
24.9
°C/W
YJT
Junction-to-top characterization parameter
2.1
°C/W
YJB
Junction-to-board characterization parameter
24.8
°C/W
RqJC(bot)
Junction-to-case (bottom) thermal resistance
9.8
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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7.6 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
ILEAK
Leakage Current
VBR
Break-down Voltage
VCLAMP
Clamp Voltage
TEST CONDITIONS
MIN
Measured at VIN = ±VRWM, TA = 27°C
TYP
0.4
Measured at VIN = ±VRWM, TA = 85°C
IIN = ±1mA
±Ipp IEC 61000-4-5 Surge (8/20 µs), VIN
= 0 V before surge, TA = 27°C
MAX
25
290
23.35
24.4
27.4
UNIT
nA
V
28.8
V
±IPP IEC 61000-4-5 Surge (8/20 µs), VIN
=±VRWM before surge, TA = 125°C
30.4
RDYN
8/20 µs surge dynamic resistance
Calculated from VCLAMP at .5*IPP and IPP
surge current, TA = 25°C
50
mΩ
CIN
Input pin capacitance
VIN = VRWM, f = 1 MHz, 30 mVpp, IO to
GND
65
pF
0-±VRWM rising edge, sweep rise time
and measure slew rate when IPEAK = 1
mA, TA = 27°C
2.5
0-±VRWM rising edge, sweep rise time
and measure slew rate when IPEAK = 1
mA, TA = 85°C
1
SR
6
Maximum Slew Rate
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7.7 Typical Characteristics
25
48
Voltage (V)
Current (A) 40
28.5
20
32
28
15
24
10
16
5
8
0
0
-5
0
2E-5
4E-5
6E-5
Time (s)
Temperature (qC)
29
Current (A)
Voltage (V)
30
27
26.5
26
-8
0.0001
8E-5
27.5
25.5
-40
-25
-10
5
20
tvs1
Figure 1. 8/20-µs Surge Response at 30 A
35 50 65
VCLAMP (V)
80
95
110 125
tvs1
Figure 2. 8/20-µs Surge Clamping Response at 30 A
75
120
105
55
75
ILEAK (nA)
Capacitance (pF)
90
60
45
35
15
30
15
-5
-40
0
0
3
6
9
VIN (V)
12
15
18
-25
-10
tvs1
5
20 35 50 65
Temperature (qC)
80
95
110 125
tvs1
f = 1 MHz, 30 mVpp, IO to GND
Figure 3. Capacitance vs Voltage Bias
Figure 4. Leakage Current vs Temperature at 18 V
Dynamic Leakage (mA)
25
VBR (V)
24.75
24.5
24.25
24
-40
-25
-10
5
20 35 50 65
Temperature (qC)
80
95
110 125
8
7.5
7
6.5
6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-40qC
25qC
85qC
105qC
125qC
0
tvs1
Figure 5. Breakdown Voltage (1 mA) vs Temperature
0.5
1
1.5
2
Slew Rate (V/Ps)
2.5
3
D009
Figure 6. Dynamic Leakage vs Signal Slew Rate Across
Temperature
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8 Detailed Description
8.1 Overview
The TVS1801 is a bidirectional precision clamp with two integrated FETs driven by a feedback loop to tightly
regulate the input voltage during an overvoltage event. This feedback loop leads to a very low dynamic
resistance, giving a flat clamping voltage during transient overvoltage events like a surge.
8.2 Functional Block Diagram
8.3 Feature Description
The TVS1801 is a precision clamp that handles 30 A of IEC 61000-4-5 8/20-µs surge pulse. The flat clamping
feature helps keep the clamping voltage very low to keep the downstream circuits from being stressed. The flat
clamping feature can also help end-equipment designers save cost by opening up the possibility to use lowercost, lower voltage tolerant downstream ICs. This device provides a bidirectional operating range, with a
symmetrical VRWM of ±18 V, designed for applications that have bipolar input signals or that must withstand
reverse wiring conditions. The TVS1801 has minimal leakage at VRWM, designed for applications where low
leakage and power dissipation is a necessity. Built in IEC 61000-4-2 and IEC 61000-4-4 ratings make it a robust
protection solution for ESD and EFT events and the TVS1801 wide ambient temperature range of –40°C to
+125°C enables usage in harsh industrial environments.
8.4 Device Functional Modes
8.4.1 Protection Specifications
The TVS1801 is specified according to both the IEC 61000-4-5 and IEC 61643-321 standards. This enables
usage in systems regardless of which standard is required by relevant product standards or best matches
measured fault conditions. The IEC 61000-4-5 standard requires protection against a pulse with a rise time of 8
µs and a half-length of 20 µs, while the IEC 61643-321 standard requires protection against a much longer pulse
with a rise time of 10 µs and a half-length of 1000 µs.
8
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Device Functional Modes (continued)
The positive and negative surges are imposed to the TVS1801 by a combination wave generator (CWG) with a
2-Ω coupling resistor at different peak voltage levels. For powered-on transient tests that need power supply
bias, inductances are used to decouple the transient stress and protect the power supply. The TVS1801 is posttested by assuring that there is no shift in device breakdown or leakage at VRWM.
In addition, the TVS1801 has been tested according to IEC 61000-4-5 to pass a ±1-kV surge test through a 42-Ω
coupling resistor and a 0.5-µF capacitor. This test is a common test requirement for industrial signal I/O lines and
the TVS1801 precision clamp can be used in applicationos that have that requirement.
The TVS1801 integrates IEC 61000-4-2 level 4 ESD Protection and 80 A of IEC 61000-4-4 EFT Protection.
These combine to ensure that the device can protect against most common transient test requirements.
For more information on TI's test methods for Surge, ESD, and EFT testing, refer to the TI's IEC 61000-4-x Tests
for TI's Protection Devices application report.
8.4.2 Reliability Testing
To ensure device reliability, the TVS1801 is characterized against 5000 repetitive pulses of 25-A IEC 61000-4-5
8/20-µs surge pulses at 125°C. The test is performed with less than 10 seconds between each pulse at high
temperature to simulate worst-case scenarios for fault regulation. After each surge pulse, the TVS1801 clamping
voltage, breakdown voltage, and leakage are recorded to ensure that there is no variation or performance
degradation. By ensuring robust, reliable, high temperature protection, the TVS1801 enables fault protection in
applications that must withstand years of continuous operation with no performance change.
8.4.3 Zero Derating
Unlike traditional diodes, the TVS1801 has zero derating of maximum power dissipation and ensures robust
performance up to 125°C. Traditional TVS diodes lose up to 50% of their current carrying capability when at high
temperatures, so a surge pulse above 85°C ambient can cause failures that are not seen at room temperature.
The TVS1801 prevents this so the designer can see the surge protection regardless of temperature. Because of
this, Flat-Clamp devices can provide robust protection against surge pulses that occur at high ambient
temperatures, as shown in TI's TVS Surge Protection in High-Temperature Environments application report.
8.4.4 Bidirectional Operation
The TVS1801 is a bidirectional TVS with a symmetrical operating region. This allows for operation with positive
and negative voltages, rather than just positive voltages like the unidirectional TVS1800. This allows for single
chip protection for applications where the signal is expected to operate below 0 V or where there is a need to
withstand a large common-mode voltage. In addition, in many cases, there is a system requirement to be able to
withstand reverse wiring conditions, in many cases where a high voltage signal is accidentally applied to the
system ground and a ground is accidentally applied to the input terminal. This causes a large reverse voltage on
the TVS diode that it must be able to withstand. The TVS1801 is designed to not break down or see failures
under reverse wiring conditions, for applications that must withstand these miswiring issues.
NOTE
If the applied signal is not expected to go below 0 V, a unidirectional device will clamp
much lower in the reverse direction and should be used. In this case, the recommended
device would be the TVS1800.
8.4.5 Transient Performance
During large transient swings, the TVS1801 will begin clamping the input signal to protect downstream
conditions. While this prevents damage during fault conditions, it can cause leakage when the intended input
signal has a fast slew rate. To keep power dissipation low and remove the chance of signal distortion, TI
recommends that the designer keep the slew rate of any input signal on the TVS1801 below 2.5 V/µs at room
temperature and below 0.7 V/µs at 125°C shown in Figure 6. Faster slew rates will cause the device to clamp the
input signal and draw current through the device for a few microseconds, increasing the rise time of the signal.
This will not cause any harm to the system or to the device, however it can cause device overheating if the fast
input voltage swings occur regularly.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TVS1801 can be used to protect any power, analog, or digital signal from transient fault conditions caused
by the environment or other electrical components.
9.2 Typical Application
Figure 7. TVS1801 Application Schematic
9.2.1 Design Requirements
A typical operation for the TVS1801 would be protecting a 12-V input voltage line with a wide variance requiring
extra standoff from the nominal voltage, up to 18 V, as shown in Figure 7. In this example, a TVS1801 is
protecting the input to a LM2734, a buck converter with an input voltage range of 20 V and an absolute
maximum input voltage of 24 V. This input must be protected against transient voltage surge events, and must
have protection for reverse applied voltage in case of cable shorts or in case of operator wiring error. Without any
input protection, this input voltage will rise to hundreds of volts for multiple microseconds, and violate the
absolute maximum input voltage and harm the device if a surge event is caused by lightning, coupling, ringing, or
any other fault condition. TI's Flat-Clamp technology provides surge protection diodes that can maximize the
useable voltage range and clamp at a safe level for the system.
9.2.2 Detailed Design Procedure
If the TVS1801 is in place to protect the device, the voltage will rise to the breakdown of the diode at 24.4 V
during a surge event. The TVS1801 will then turn on to shunt the surge current to ground. With the low dynamic
resistance of the TVS1801, even large amounts of surge current will have minimal impact on the clamping
voltage. The dynamic resistance of the TVS1801 is around 50 mΩ, which means a 25-A surge current will cause
a voltage raise of 25 A × 50 mΩ = 1.25 V. Because the device turns on at 24.4 V, this means the module input
will be exposed to a maximum of 24.4 V + 1.25 V = 26.9 V during surge pulses, close to the LM2734 absolute
maximum. Because this is a transient pulse, this will likely be safe for the system.
In addition, the TVS1801 provides protection against reverse voltage application that could accidentally be
caused by shorts between pins. If –12 V is applied to the VBUS pin, the LM2734 will not be harmed because the
series diode will prevent the voltage from being applied to the input, and the TVS1801 will not shunt current
because the reverse working voltage is –18 V. If the TVS1800 or a unidirectional device is used in this case, a
–12-V short would cause the device to shunt current until it fails.
10
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Typical Application (continued)
Finally, the small size of the device also improves fault protection by lowering the effect of fault current coupling
onto neighboring traces. The small form factor of the TVS1801 allows the device to be placed extremely close to
the input connector, which lowers the length of the path fault current going through the system compared to
larger protection solutions.
9.2.3 Application Curves
Voltage (V)
30
25
48
Voltage (V)
Current (A) 40
20
32
15
24
10
16
5
8
0
0
-5
0
2E-5
4E-5
6E-5
Time (s)
8E-5
Current (A)
When a surge is applied to a system with the TVS1801, the device will clamp the overvoltage as shown in
Figure 8.
-8
0.0001
tvs1
Figure 8. Surge Waveform at 30 A
10 Power Supply Recommendations
The TVS1801 is a clamping device so there is no need to power it. To ensure the device functions properly, do
not violate the recommended VIN voltage range (–18 V to 18 V) .
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11 Layout
11.1 Layout Guidelines
The optimum placement is close to the connector. EMI during an ESD event can couple from the tested trace to
other nearby unprotected traces, which could result in system failures. The PCB designer must minimize the
possibility of EMI coupling by keeping all unprotected traces away from protected traces between the TVS and
the connector. Route the protected traces straight. Use rounded corners with the largest radii possible to
eliminate any sharp corners on the protected traces between the TVS1801 and the connector. Electric fields tend
to build up on corners, which could increase EMI coupling.
Ensure that the thermal pad on the layout is floating rather than grounded. Grounding the thermal pad will
impede the operating range of the TVS1801, and can cause failures when the applied voltage is negative. A
floating thermal pad allows the maximum operating range without sacrificing any transient performance.
11.2 Layout Example
Figure 9. TVS1801 Layout
12
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12 Device and Documentation Support
12.1 Documentation Support
•
•
•
Flat-Clamp Surge Protection Technology for Efficient System Protection
TI's IEC 61000-4-x Tests for TI's Protection Devices
TVS Surge Protection in High-Temperature Environments
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
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Copyright © 2018, Texas Instruments Incorporated
Product Folder Links: TVS1801
13
PACKAGE OPTION ADDENDUM
www.ti.com
22-Dec-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
TVS1801DRBR
ACTIVE
Package Type Package Pins Package
Drawing
Qty
SON
DRB
8
3000
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Op Temp (°C)
Device Marking
(4/5)
-40 to 125
1PUP
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Dec-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TVS1801DRBR
Package Package Pins
Type Drawing
SON
DRB
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
3000
330.0
12.4
Pack Materials-Page 1
3.3
B0
(mm)
K0
(mm)
P1
(mm)
3.3
1.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q2
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Dec-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TVS1801DRBR
SON
DRB
8
3000
338.0
355.0
50.0
Pack Materials-Page 2
PACKAGE OUTLINE
DRB0008A
VSON - 1 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE - NO LEAD
3.1
2.9
A
B
PIN 1 INDEX AREA
3.1
2.9
C
1 MAX
SEATING PLANE
0.05
0.00
0.08 C
1.5 0.1
DIM A
OPT 1
OPT 2
(0.1)
(0.2)
4X (0.23)
EXPOSED
THERMAL PAD
(DIM A) TYP
4
5
2X
1.95
1.75 0.1
8
1
6X 0.65
8X
PIN 1 ID
(OPTIONAL)
(0.65)
8X
0.37
0.25
0.1
0.05
C A B
C
0.5
0.3
4218875/A 01/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRB0008A
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(1.5)
(0.65)
SYMM
8X (0.6)
(0.825)
8
8X (0.31) 1
SYMM
(1.75)
(0.625)
6X (0.65)
4
5
(R0.05) TYP
( 0.2) VIA
TYP
(0.23)
(0.5)
(2.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
EXPOSED
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4218875/A 01/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DRB0008A
VSON - 1 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.65)
4X (0.23)
SYMM
METAL
TYP
8X (0.6)
8X (0.31)
4X
(0.725)
8
1
(2.674)
SYMM
(1.55)
6X (0.65)
4
5
(R0.05) TYP
(1.34)
(2.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
84% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
4218875/A 01/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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