Texas Instruments | TPD13S523 13-Channel ESD Protection Solution With Current-Limit Load Switch For HDMI Transmitter Ports (Rev. D) | Datasheet | Texas Instruments TPD13S523 13-Channel ESD Protection Solution With Current-Limit Load Switch For HDMI Transmitter Ports (Rev. D) Datasheet

Texas Instruments TPD13S523 13-Channel ESD Protection Solution With Current-Limit Load Switch For HDMI Transmitter Ports (Rev. D) Datasheet
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TPD13S523
SLVSBC5D – MARCH 2012 – REVISED OCTOBER 2015
TPD13S523 13-Channel ESD Protection Solution With Current-Limit Load Switch For
HDMI Transmitter Ports
1 Features
3 Description
•
The TPD13S523 device is a single-chip integrated
IEC 61000-4-2 ESD protection solution for HDMI 1.4
or HDMI 1.3 interfaces. This device offers 13
channels of TVS diodes with flow-through pin
mapping that matches HDMI connector high-speed
lines. While providing ESD protection, the
TPD13S523 adds little to no additional distortion to
the high-speed differential signals. The monolithic
integrated circuit technology ensures that there is
excellent matching between the two-signal pair of the
differential line (< 0.05-pF differential matching
between TMDS lines). This offers an advantage over
discrete ESD solutions where variations between two
different ESD protection circuits may significantly
degrade the differential signal quality.
1
•
•
•
•
•
•
•
•
IEC 61000-4-2 Level 4 Contact ESD Protection
– ±12-kV Contact Discharge on External Lines
Single-Chip ESD Solution for HDMI 1.4 and HDMI
1.3 Interface
On-Chip 5-V Load Switch With Current Limit and
Reverse Current Protection
Supports UTILITY Line Protection for HDMI 1.4
Audio Return Line
<0.05-pF Differential Capacitance Between the
TMDS Signal Pair
Industry Standard 16-TSSOP and Space-Saving
16-RSV Package
Supports Data Rates in Excess of 3.4 Gbps
RDYN = 0.5 Ω (Typical)
Commercial Temperature Range: –40°C to 85°C
2 Applications
•
•
End Equipment
– Set Top Boxes
– E-Books
– Tablets
– Smart Phones
– Camcorders
Interfaces
– HDMI
The TPD13S523 incorporates an on-chip current
limited load switch that is compliant with HDMI 5-V
out electrical specifications. The short-circuit
protection at 5V_OUT ensures that the device is not
damaged in case there is an accidental short to GND.
The load switch also incorporates a reverse-current
blocking feature which ensures that the HDMI driver
side is not erroneously turned on when two HDMI
drivers are connected together.
Typical applications for the TPD13S523 include set
top boxes (STB), e-books, tablets, smart phones, and
camcorders.
Device Information(1)
PART NUMBER
TPD13S523
PACKAGE
BODY SIZE (NOM)
TSSOP (16)
5.00 mm × 4.40 mm
UQFN (16)
2.60 mm × 1.80 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Schematic for HDMI Transmitter Port
Block Diagram
5V
5V_SUPPLY
5V_SUPPLY
5V_OUT
HDMI
Transmitter
TMDS LINES
TMDS LINES
TPD13S523
HDMI
Connector
HPD
CEC
CONTROL LINES
CONTROL LINES
D3-
D3+
D2-
D2+
D1-
D1+
DCLK
DDAT
5V
0.1 μF
D0-
D0+
UTILITY
55 mA
Current
Switch
0.1 μF
CTRL1
CTRL2
CTRL3
CTRL4
CTRL5
5V OUT
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPD13S523
SLVSBC5D – MARCH 2012 – REVISED OCTOBER 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
7.1 Overview ................................................................... 8
7.2 Functional Block Diagram ......................................... 8
7.3 Feature Description................................................... 8
7.4 Device Functional Modes.......................................... 9
8
Application and Implementation ........................ 10
8.1 Application Information............................................ 10
8.2 Typical Application .................................................. 10
9 Power Supply Recommendations...................... 11
10 Layout................................................................... 11
10.1 Layout Guidelines ................................................. 11
10.2 Layout Examples................................................... 12
11 Device and Documentation Support ................. 14
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
14
14
14
14
12 Mechanical, Packaging, and Orderable
Information ........................................................... 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (June 2015) to Revision D
Page
•
Added table note to Absolute Maximum Ratings .................................................................................................................. 4
•
Added test condition frequency to capacitance ..................................................................................................................... 5
Changes from Revision B (December 2012) to Revision C
•
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
Changes from Revision A (May 2012) to Revision B
Page
•
Added RSV package to ORDERING INFORMATION table................................................................................................... 1
•
Removed PREVIEW status from RSV package..................................................................................................................... 3
2
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5 Pin Configuration and Functions
D0+
PW Package
16-Pin TSSOP
Top View
D0-
CTRL2
CTRL1
RSV Package
16-Pin UQFN
Top View
1
16
D0+
CTRL2
2
15
D0-
CTRL3
3
14
D1+
CTRL4
4
13
D1-
5V_SUPPLY
5
12
D2+
5V_OUT
6
11
D2-
CTRL5
7
10
D3+
GND
8
9
D3-
CTRL1
16 15 14 13
CTRL3
12
1
D1+
CTRL4 2
11
D1-
5V_SUPPLY
3
10
D2+
5V_OUT
4
9
D2-
D3-
8
D3+
7
6
GND
CTRL5
5
All the CTRLx pins have the same ESD
circuit and are interchangeable.
All the CTRLx pins have the same ESD
circuit and are interchangeable.
Pin Functions
PIN
I/O
DESCRIPTION
1
I/O
ESD Clamp for Control Lines: provides ESD protection to HDMI control lines:
CEC, SCL, SDA, HPD, and UTILITY. All the control pins have the same ESD
circuit and are interchangeable. (1)
16
2
I/O
ESD Clamp for Control Lines: provides ESD protection to HDMI control lines:
CEC, SCL, SDA, HPD, and UTILITY. All the control pins have the same ESD
circuit and are interchangeable. (1)
CTRL3
1
3
I/O
ESD Clamp for Control Lines: provides ESD protection to HDMI control lines:
CEC, SCL, SDA, HPD, and UTILITY. All the control pins have the same ESD
circuit and are interchangeable. (1)
CTRL4
2
4
I/O
ESD Clamp for Control Lines: provides ESD protection to HDMI control lines:
CEC, SCL, SDA, HPD, and UTILITY. All the control pins have the same ESD
circuit and are interchangeable. (1)
CTRL5
5
7
I/O
ESD Clamp for Control Lines: provides ESD protection to HDMI control lines:
CEC, SCL, SDA, HPD, and UTILITY. All the control pins have the same ESD
circuit and are interchangeable. (1)
5V_SUPPLY
3
5
I
Supply Pin for HDMI 5V_OUT 5 V, connects to internal VCC plane on the PCB
board; connect a 0.1 to 1-µF capacitor shunt to ground.
5V_OUT
4
6
O
Current Limited HDMI 5V_OUT: connect to HDMI 5V_OUT; offers IEC61000-42 ESD protection; connect a 0.1 to 1-µF capacitor shunt to ground.
NAME
UQFN
TSSOP
CTRL1
15
CTRL2
GND
6
8
G
Ground
D0+
14
16
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
D0–
13
15
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
D1+
12
14
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
D1–
11
13
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
D2+
10
12
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
D2–
9
11
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
D3+
8
10
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
D3–
7
9
I/O
High-speed ESD Clamp: provides ESD protection for TMDS lines. (1)
(1)
Connector pins are Dx+, Dx–, CTRLx, and 5V_OUT
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6 Specifications
6.1 Absolute Maximum Ratings
TA = –40°C to 85°C
(1)
VCC voltage tolerance
5V_SUPPLY
(2)
MIN
MAX
UNIT
–0.3
6
V
–0.3
6
V
IO voltage tolerance
Connector pins
IEC 61000-4-5 peak current (8/20 µs)
Connector pins (2)
3
A
IEC 61000-4-5 peak power (8/20 µs)
Connector pins (2)
30
W
125
°C
Storage temperature, Tstg
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Connector pins are Dx+, Dx–, CTRLx, and 5V_OUT
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
IEC 61000-4-2 Contact Discharge
±12000
IEC 61000-4-2 Air-gap Discharge
±14000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
TA = –40°C to 85°C
MIN
MAX
VCC Voltage
5V_SUPPLY
4.5
5.5
V
IO voltage at external signal pins
Signal Pins (1)
–0.3
5.5
V
–40
85
°C
Operating free-air temperature
(1)
UNIT
External Signal pins are Dx+, Dx–, CTRLx, and 5V_OUT
6.4 Thermal Information
TPD13S523
THERMAL METRIC (1)
PW [TSSOP]
RSV [UQFN]
UNIT
16 PINS
16 PINS
RθJA
Junction-to-ambient thermal resistance
119.9
153.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
54.5
70.9
°C/W
RθJB
Junction-to-board thermal resistance
65.0
74.7
°C/W
ψJT
Junction-to-top characterization parameter
9.7
2.9
°C/W
ψJB
Junction-to-board characterization parameter
n/a
74.7
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
n/a
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LOAD SWITCH
ICC
Supply current at 5V_SUPPLY
5V_SUPPLY =5V, 5V OUT = Open
6.5
7
10
µA
ISC
Short-circuit current at 5V_OUT
5V_SUPPLY =5V, 5V_OUT = GND
100
116
147
mA
IBACKDRIVE
Reverse leakage current at 5VOUT
5V_SUPPLY =0V, 5V_OUT = 5 V
0.01
0.69
µA
VDROP
5V_OUT output voltage drop
5V_SUPPLY =5V, I5V_OUT = 55 mA
170
205
mV
5.5
V
CONNECTOR PINS
VRWM
Reverse stand-off voltage
(1)
13
Ipp = 3 A, 8/20 μs (1)
15
Ipp = 1 A, 8/20 μs
VCLAMP
Clamp voltage with ESD strike
IIO
Leakage current through external signal pins (2)
IOFF
Current from IO Port to supply pins when powered
5V_SUPPLY = 0 V, VIO = 2.5 V
down through signal pins (3)
VF
Diode forward voltage through external signal
pins (2); lower clamp diode
ID = 8 mA
RDYN
Dynamic resistance of ESD clamps external
pins (3)
Pin to ground (2)
CIO_TMDS
IO capacitance Dx+, Dx– pins to GND
ΔCIO_TMDS
CIO_CONTRO
(1)
(2)
(3)
2
7
65
nA
1
5
44
nA
0.7
0.85
0.95
V
0.5
Ω
5V_SUPPLY = 5 V, VIO = 2.5 V;
ƒ = 1 MHz
1
pF
Differential capacitance for the Dx+, Dx– lines
5V_SUPPLY = 5 V, VIO = 2.5 V;
ƒ = 1 MHz
0.05
pF
CTRLx pin capacitance
5V_SUPPLY = 5 V, VIO = 2.5 V;
ƒ = 1 MHz
1
pF
Break-down voltage through signal pins (3)
IIO = 1 mA
L
VBR
5V_SUPPLY =5V, VIO = 5 V
V
6
V
Non-repetitive current pulse of an 8/20 µs exponentially decaying waveform according to IEC 61000-4-5.
Extraction of RDYN using least squares fit of TLP characteristics between I=1A AND I=10A.
Signal pins are Dx+, Dx–, and CTRLx.
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6.6 Typical Characteristics
1.98
3.6
36
3.2
32
2.8
28
2.4
24
0.98
2
20
Current
16
1.6
1.2
0.48
0
0.5
1
1.5
2
2.5
VBIAS - V
3
3.5
4
4.5
8
0.4
4
0
0
5
10
15
20
25
30
Time - mS
35
40
0
50
45
Figure 2. IEC 61000-4-5 (Surge) IPP and PPP Waveform
200
60
180
40
160
20
140
0
120
-20
100
80
60
-40
-60
-80
40
-100
20
-120
0
-140
-20
-160
-40
-180
-60
-15
15
45
75
105 135
Time - nS
165
195
-200
-15
225
Figure 3. IEC Positive Clamping Waveform Using 8-kV
Contact
15
45
75
105 135
Time - nS
165
195
225
Figure 4. IEC Negative Clamping Waveform Using –8-kV
Contact
1
10
RD ~ 0.5 W
9
0.8
8
0.6
7
0.4
6
Current - mA
Current - A
5
Voltage - V
Voltage - V
Figure 1. Pin Capacitance
5
4
0.2
0
-0.2
3
-0.4
2
-0.6
1
-0.8
0
0
1
2
3
4
5
6
7
8
Voltage - V
9
10
11
12
13
14
-1
-1
0
Figure 5. TLP Plot On Connector Pins
6
12
Power
0.8
-0.02
Power - W
Current - A
Capacitance - pF
1.48
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1
2
3
4
5
Voltage - V
6
7
8
9
10
Figure 6. IV Curve On Signal Pins
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Typical Characteristics (continued)
10
7.5
7
9
6.5
6
V5VS
8
5.5
7
Current - mA
Voltage - V
5
4.5
4
3.5
3
2.5
V5VO
6
5
4
2
3
1.5
1
2
0.5
0
-0.5
0
1
10
20
CIN = 1 µF
30
40
50
60
Time - mS
70
COUT = 1µF
TA = 25°C
80
90
100
ISWITCH = 55 mA
0
-40
-15
10
35
Temperature - °C
5V_SUPPLY = 5 V
Figure 7. Load Switch Start-Up Transient Waveform
60
85
5V_OUT = Open
Figure 8. Load Switch Supply Current
3
2.7
2.4
Resistance - W
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
-40
-15
10
35
Temperature - °C
60
85
Figure 9. Load Switch Resistance vs Temperature
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7 Detailed Description
7.1 Overview
The TPD13S523 device is a single-chip ESD solution for the HDMI transmitter port. By providing system-level
ESD protection for a full HDMI port, the TPD13S523 can protect the core IC from ESD strikes and absorb the
associated energy.
While providing the ESD protection, the TPD13S523 adds little-to-no signal distortion to the high-speed
differential signals. In addition, the monolithic integrated circuit technology ensures that there is excellent
matching between the two-signal pair of the differential line.
The TPD13S523 also provides an on-chip regulator with current output ratings of 55 mA at pin 38. This current
enables HDMI receiver detection even when the receiver device is powered off.
7.2 Functional Block Diagram
5V_SUPPLY
D3-
D3+
D2-
D2+
D1-
D1+
D0-
D0+
55 mA
Current
Switch
CTRL1
CTRL2
CTRL3
CTRL4
CTRL5
5V OUT
Figure 10. Electrical Equivalent Circuit Diagrams
7.3 Feature Description
7.3.1 IEC 61000-4-2 Protection
The connector-facing I/O pins can withstand ESD events up to ±12-kV contact and ±14-kV air. An ESD clamp
diverts the current to ground.
7.3.2 Single-Chip ESD Solution
The TPD13S523 provides a complete ESD protection scheme for an HDMI 1.4 compliant port. No additional
components are required for ESD protection and current-limiting besides this device.
8
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Feature Description (continued)
7.3.3 On-Chip 5-V Load Switch
The TPD13S523 provides an on-chip regulator with a current output rating of 55-mA. This regulator also prevents
reverse current flow from occurring, in compliance with the HDMI 5-V supply specification.
7.3.4 Supports UTILITY Line Protection
This device provides protection for all control lines in HDMI, including the UTILITY pin.
7.3.5 < 0.05-pF Differential Capacitance Between TMDS Pairs
The TPD13S523 has a very low capacitance variation (< 0.05 pF) between different TMDS ESD clamps. This
provides excellent matching and does not degrade differential signal quality.
7.3.6 Industry Standard Package and Space-Saving Package
The TPD13S523 is offered in 2 different packages. A 16-pin industry standard TSSOP package is provided for
ease of routing and easy layout. A 16-pin UQFN (RSV) is provided where small size is needed in the application.
7.3.7 Supports Data Rates in Excess of 3.4 Gbps
The TMDS ESD clamps have a very low capacitance that is capable of supporting HDMI data rates exceeding
3.4 Gbps.
7.3.8 RDYN = 0.5 Ω
The TMDS ESD clamps have a very low RDYN of 0.5Ω (typ) which provides excellent ESD protection clamping
characteristics for the upstream core transmitter.
7.3.9 Commercial Temperature Range
The TPD13S523 is rated to operate from -40°C to 85°C.
7.4 Device Functional Modes
TPD13S523 is active with the conditions in the Recommended Operating Conditions met. Each connector side
pin has an ESD clamp that triggers when voltages are greater than VBR or less than the lower diode's Vf. During
ESD events, voltages as high as ±12-kV contact ESD can be directed to ground through the internal diode
network. Once the voltages on the protected line fall below these trigger levels (usually within 10's of nanoseconds), these pins revert to a nonconductive state.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPD13S523 provides IEC 61000-4-2 Level 4 Contact ESD protection for an HDMI 1.4 transmitter port. An
integrated current limit switch ensures compliance with the HDMI 5-V power supply requirements. This section
presents a simplified discussion of the design process for this protection device.
8.2 Typical Application
A typical application schematic for an HDMI 1.4 transmitter port protected by the TPD13S523 is shown in
Figure 11. The eight TMDS lines and five control lines are connected to their respective pins for ESD protection.
The 5-V power path is connected through the 55-mA current limit switch.
5V
5V_SUPPLY
5V_OUT
HDMI
Transmitter
TMDS LINES
TMDS LINES
HDMI
Connector
TPD13S523
HPD
CEC
CONTROL LINES
CONTROL LINES
UTILITY
DCLK
DDAT
5V
0.1 μF
0.1 μF
Figure 11. TPD13S523 Configured With an HDMI 1.4 Transmitter Port
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as input parameters.
Table 1. Design Parameters
PARAMETER
Voltage on 5V_SUPPLY
HDMI Data Rate
EXAMPLE VALUE
4.8 V - 5.3 V
3.4 Gbps
8.2.2 Detailed Design Procedure
To begin the design process, the designer must know the following parameters:
• 5V_SUPPLY voltage range
• Maximum HDMI data rate
10
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8.2.2.1 5V_SUPPLY Voltage Range
The TPD13S523 is capable of operating the 5V_SUPPLY up to 5.5 V, with recommended voltage from 4.5 V to
5.5 V. In this example, the supply range is 4.8 V to 5.3 V, which satisfies this requirement.
8.2.2.2 Maximum HDMI Data Rate
The TPD13S523 is capable of operating at HDMI data rates in excess of 3.4 Gbps, compliant to the HDMI 1.4
maximum data rate. In this example, the maximum HDMI 1.4 data rate of 3.4 Gbps has been chosen.
8.2.3 Application Curves
Figure 12. Eye Diagram Using EVM Without TPD13S523 for
the TMDS Lines
at 1080p, 340-MHz Pixel Clock, 3.4 Gbps
Figure 13. Eye Diagram Using EVM With TPD13S523 for
the TMDS Lines
at 1080p, 340-MHz Pixel Clock, 3.4 Gbps
9 Power Supply Recommendations
The designer must consider the requirement for the 5V_OUT voltage level. To ensure the voltage is within
tolerance under load, set 5V_SUPPLY to at least 4.8 V + VDROP (205 mV). Otherwise, TPD13S523 is a passive
ESD protection device and there is no need to power it.
10 Layout
10.1 Layout Guidelines
The TPD13S523 device offers little or no signal distortion during normal operation due to low I/O capacitance
and ultra-low leakage current specifications. In the event of an ESD stress, this device ensures that the core
circuitry is protected and the system is functioning properly. For proper operation, the following layout and design
guidelines should be followed:
1. Place the TPD13S523 as close to the connector as possible. This allows the TPD13S523 to remove the
energy associated with ESD strike before it reaches the internal circuitry of the system board.
2. Place two 0.1-μF capacitors very close to the 5V_SUPPLY and 5V_OUT pins. These capacitors will help limit
the noise at the 5V_OUT power line, and also help with system level ESD protection.
3. Ensure that there is enough metallization for the GND pad. During normal operation, the TPD13S523 ESD
pins consume ultra-low leakage current. During the ESD event, GND pin will see multiple amps of current. A
sufficient current path enables safe discharge of all the energy associated with the ESD strike.
4. The critical routing paths for HDMI interface are the high-speed TMDS lines. With the PW package, all the
TMDS lines (pin Dxx) can be routed in a single signal plane and still maintain the differential coupling and
trace symmetry. This helps reduce the overall board manufacturing cost. The slow speed control lines can be
routed in another signal layer through vias.
5. If the UTILITY or any other pin is not utilizied, tie the pin to a ground rather than leave floating. Use a 75-Ω
resistor to protect against shorts to ground.
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Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPD13S523
11
TPD13S523
SLVSBC5D – MARCH 2012 – REVISED OCTOBER 2015
www.ti.com
10.2 Layout Examples
HDMI
Connector
Legend
VIA to GND Plane
VIA to 5V Plane
Pin to GND
Top Layer
Bottom Layer
TPD13S523
Figure 14. TPD13S523PWR Layout Example 13-Line HDMI Protection
12
Submit Documentation Feedback
Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPD13S523
TPD13S523
www.ti.com
SLVSBC5D – MARCH 2012 – REVISED OCTOBER 2015
Layout Examples (continued)
HDMI
Connector
Legend
VIA to GND Plane
VIA to 5V Plane
Signal Via
Pin to GND
Top Layer
Mid Layer
Bottom Layer
TPD13S523
Figure 15. TPD13S523RSVR Layout Example 13-Line HDMI Protection
Submit Documentation Feedback
Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPD13S523
13
TPD13S523
SLVSBC5D – MARCH 2012 – REVISED OCTOBER 2015
www.ti.com
11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
14
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Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPD13S523
PACKAGE OPTION ADDENDUM
www.ti.com
21-Feb-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPD13S523PWR
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
RA523
TPD13S523RSVR
ACTIVE
UQFN
RSV
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
ZTT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
21-Feb-2017
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPD13S523PWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
TPD13S523RSVR
UQFN
RSV
16
3000
330.0
12.4
2.1
2.9
0.75
4.0
12.0
Q1
TPD13S523RSVR
UQFN
RSV
16
3000
178.0
13.5
2.1
2.9
0.75
4.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPD13S523PWR
TSSOP
PW
16
2000
367.0
367.0
35.0
TPD13S523RSVR
UQFN
RSV
16
3000
184.0
184.0
19.0
TPD13S523RSVR
UQFN
RSV
16
3000
189.0
185.0
36.0
Pack Materials-Page 2
PACKAGE OUTLINE
PW0016A
TSSOP - 1.2 mm max height
SCALE 2.500
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
TYP
6.2
A
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1
2X
5.1
4.9
NOTE 3
4.55
8
9
B
0.30
0.19
0.1
C A B
16X
4.5
4.3
NOTE 4
1.2 MAX
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0 -8
0.75
0.50
DETAIL A
A 20
TYPICAL
4220204/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
16X (1.5)
(R0.05) TYP
1
16
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4220204/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
16X (1.5)
SYMM
(R0.05) TYP
1
16X (0.45)
16
SYMM
14X (0.65)
8
9
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220204/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
RSV0016A
UQFN - 0.55 mm max height
SCALE 5.000
ULTRA THIN QUAD FLATPACK - NO LEAD
1.85
1.75
B
A
PIN 1 INDEX AREA
2.65
2.55
C
0.55
0.45
SEATING PLANE
0.05 C
0.05
0.00
2X 1.2
SYMM
5
(0.13) TYP
8
15X
4
0.45
0.35
9
SYMM
2X 1.2
12X 0.4
1
12
16
0.55
0.45
16X
0.25
0.15
0.07
0.05
C A B
13
PIN 1 ID
(45 X 0.1)
4220314/B 05/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
RSV0016A
UQFN - 0.55 mm max height
ULTRA THIN QUAD FLATPACK - NO LEAD
SYMM
(0.7)
16
SEE SOLDER MASK
DETAIL
13
12
1
16X (0.2)
SYMM
12X (0.4)
(R0.05) TYP
(2.4)
9
4
15X (0.6)
8
5
(1.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 25X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK DEFINED
SOLDER MASK DETAILS
4220314/B 05/2019
NOTES: (continued)
3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
RSV0016A
UQFN - 0.55 mm max height
ULTRA THIN QUAD FLATPACK - NO LEAD
(0.7)
13
16
16X (0.2)
12
1
SYMM
12X (0.4)
(2.4)
(R0.05) TYP
4
9
15X (0.6)
5
8
SYMM
(1.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 25X
4220314/B 05/2019
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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