Texas Instruments | MAX3243 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver With ±15-kV ESD (HBM) Protection (Rev. O) | Datasheet | Texas Instruments MAX3243 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver With ±15-kV ESD (HBM) Protection (Rev. O) Datasheet

Texas Instruments MAX3243 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver With ±15-kV ESD (HBM) Protection (Rev. O) Datasheet
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MAX3243
SLLS350O – APRIL 1999 – REVISED JANUARY 2015
MAX3243 3-V to 5.5-V Multichannel RS-232 Line Driver/Receiver With ±15-kV ESD (HBM)
Protection
1 Features
2 Applications
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Operates With 3-V to 5.5-V VCC Supply
Single-Chip and Single-Supply Interface
for IBM™ PC/AT™ Serial Port
RS-232 Bus-Pin ESD Protection of
±15 kV Using Human-Body Model (HBM)
Meets or Exceeds the Requirements of
TIA/EIA-232-F and ITU V.28 Standards
Three Drivers and Five Receivers
Operates Up To 250 kbit/s
Low Active Current: 300 μA Typical
Low Standby Current: 1 μA Typical
External Capacitors: 4 × 0.1 μF
Accepts 5-V Logic Input With 3.3-V Supply
Always-Active Noninverting Receiver
Output (ROUT2B)
Operating Temperature
– MAX3243C: 0°C to 70°C
– MAX3243I: –40°C to 85°C
Serial-Mouse Driveability
Auto-Powerdown Feature to Disable Driver
Outputs When No Valid RS-232 Signal Is
Sensed
Battery-Powered Systems
Tablets
Notebooks
Laptops
Hand-Held Equipment
3 Description
The MAX3243 device consists of three line drivers,
five line receivers which is ideal for DE-9 DTE
interface. ±15-kV ESD (HBM) protection pin to pin
(serial- port connection pins, including GND). Flexible
power features saves power automatically. Special
outputs ROUT2B and INVALID are always enabled to
allow checking for ring indicator and valid RS232
input.
Device Information(1)
PART NUMBER
MAX3243
PACKAGE (PIN)
BODY SIZE
SSOP (28)
10.29 mm × 5.30 mm
SOIC (28)
17.90 mm × 7.50 mm
TSSOP (28)
9.70 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Diagram
3.3 V, 5 V
POWER
FORCEON
FORCEOFF
DIN
3
5
ROUT
INVALID
TX
RX
3
DOUT
RS232
5
RIN
RS232
STATUS
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
MAX3243
SLLS350O – APRIL 1999 – REVISED JANUARY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
5
Features ..................................................................
Applications ...........................................................
Description .............................................................
Simplified Diagram ................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
4
4
4
4
5
5
6
6
6
6
7
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics –– Auto Power Down........
Electrical Characteristics –– Driver ..........................
Electrical Characteristics –– Receiver .....................
Switching Characteristics –– Auto Power Down ......
Switching Characteristics –– Driver .........................
Switching Characteristics –– Receiver ...................
Typical Characteristics ............................................
8
9
Parameter Measurement Information .................. 8
Detailed Description ............................................ 11
9.1
9.2
9.3
9.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
11
11
12
13
10 Application and Implementation........................ 14
10.1 Application Information.......................................... 14
10.2 Typical Application ................................................ 14
11 Power Supply Recommendations ..................... 16
12 Layout................................................................... 16
12.1 Layout Guidelines ................................................. 16
12.2 Layout Example .................................................... 17
13 Device and Documentation Support ................. 18
13.1 Trademarks ........................................................... 18
13.2 Electrostatic Discharge Caution ............................ 18
13.3 Glossary ................................................................ 18
14 Mechanical, Packaging, and Orderable
Information ........................................................... 18
Revision History
Changes from Revision N (May 2009) to Revision O
Page
•
Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
•
Deleted Ordering Information table. ....................................................................................................................................... 1
2
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6 Pin Configuration and Functions
DB, DW, OR PW PACKAGE
(TOP VIEW)
C2+
C2−
V−
RIN1
RIN2
RIN3
RIN4
RIN5
DOUT1
DOUT2
DOUT3
DIN3
DIN2
DIN1
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
C1+
V+
VCC
GND
C1−
FORCEON
FORCEOFF
INVALID
ROUT2B
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
Pin Functions
PIN
NAME
NO.
TYPE
DESCRIPTION
C2+
1
—
Positive lead of C2 capacitor
C2–
2
—
Negative lead of C2 capacitor
V–
3
O
Negative charge pump output for storage capacitor only
RIN1:RIN5
4, 5, 6, 7, 8
I
RS232 line data input (from remote RS232 system)
DOUT1:DOUT3
9, 10, 11
O
RS232 line data output (to remote RS232 system)
DIN3:DIN1
12, 13, 14
I
Logic data input (from UART)
ROUT5:ROUT1
15, 16, 17, 18, 19
O
Logic data output (to UART)
ROUT2B
20
O
Always Active non-inverting output for RIN2 (normally used for ring
indicator)
INVALID
21
O
Active low output when all RIN are unpowered
FORCEOFF
22
I
Low input forces DOUT1-5, ROUT1-5 high Z per Device Functional
Modes
FORCEON
23
I
High forces drivers on. Low is automatic mode per Device Functional
Modes
C1–
24
—
Negative lead on C1 capacitor
GND
25
—
Ground
VCC
26
—
Supply Voltage, Connect to 3V to 5.5V power supply
V+
27
O
Positive charge pump output for storage capacitor only
C1+
28
—
Positive lead of C1 capacitor
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Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
Supply voltage range (2)
VCC
(2)
V+
Positive output supply voltage range
V–
Negative output supply voltage range (2)
V+ – V–
Supply voltage difference (2)
VI
Input voltage range
VO
Output voltage range
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
(1)
(2)
(1)
MIN
MAX
–0.3
6
V
–0.3
7
V
0.3
–7
V
13
V
Driver, FORCEOFF, FORCEON
–0.3
6
Receiver
–25
25
–13.2
13.2
–0.3
VCC + 0.3
Driver
Receiver, INVALID
UNIT
V
V
150
–65
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network GND.
7.2 ESD Ratings
MAX
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
RIN , DOUT, and GND pins (1)
15000
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
All other pins (1)
3000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
(1)
(See Figure 8)
VCC = 3.3 V
VCC Supply voltage
VCC = 5 V
VCC = 3.3 V
VIH
Driver and control high-level input voltage
DIN, FORCEOFF,
FORCEON
VIL
Driver and control low-level input voltage
DIN, FORCEOFF, FORCEON
VI
Driver and control input voltage
DIN, FORCEOFF, FORCEON
VI
Receiver input voltage
TA
(1)
VCC = 5 V
MAX3243C
Operating free-air temperature
MAX3243I
MIN
NOM
3
3.3
MAX UNIT
3.6
4.5
5
5.5
V
2
5.5
2.4
5.5
0
0.8
V
V
0
5.5
V
–25
25
V
0
70
–40
85
°C
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
7.4 Thermal Information
MAX3243
THERMAL METRIC (1)
RθJA
(1)
4
Junction-to-ambient thermal resistance
DB
DW
PW
16 PINS
16 PINS
16 PINS
62
46
62
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
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7.5 Electrical Characteristics –– Auto Power Down
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
PARAMETER
TEST CONDITIONS
MIN TYP (2)
MAX
0.3
1
UNIT
Supply current
Auto-powerdown
disabled
No load, FORCEOFF and FORCEON at VCC. TA = 25°C
Supply current
Powered off
No load, FORCEOFF at GND. TA = 25°C
1
10
Supply current
Auto-powerdown
enabled
No load, FORCEOFF at VCC, FORCEON at GND,
All RIN are open or grounded, All DIN are grounded. TA =
25°C
1
10
II
Input leakage current
of FORCEOFF, FORCEON
VI = VCC or VI at GND
±0.01
±1
μA
VIT+
Receiver input threshold
for INVALID high-level output
voltage
FORCEON = GND,
FORCEOFF = VCC
2.7
V
VIT–
Receiver input threshold
for INVALID high-level output
voltage
FORCEON = GND,
FORCEOFF = VCC
–2.7
VT
Receiver input threshold
for INVALID low-level output
voltage
FORCEON = GND,
FORCEOFF = VCC
–0.3
VOH
INVALID high-level output
voltage
IOH = -1 mA, FORCEON = GND,
FORCEOFF = VCC
VOL
INVALID low-level output
voltage
IOL = 1.6 mA, FORCEON = GND,
FORCEOFF = VCC
ICC
(1)
(2)
mA
μA
V
0.3
VCC – 0.6
V
V
0.4
V
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.6 Electrical Characteristics –– Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
PARAMETER
MIN TYP (2) MAX
TEST CONDITIONS
UNIT
VOH
High-level output voltage
All DOUT at RL = 3 kΩ to GND
5
5.4
V
VOL
Low-level output voltage
All DOUT at RL = 3 kΩ to GND
–5
–5.4
V
VO
Output voltage
(mouse driveability)
DIN1 = DIN2 = GND, DIN3 = VCC, 3-kΩ to GND at DOUT3,
DOUT1 = DOUT2 = 2.5 mA
±5
IIH
High-level input current
VI = VCC
±0.01
±1
μA
IIL
Low-level input current
VI at GND
±0.01
±1
μA
Vhys
Input hysteresis
±1
V
±60
mA
IOS
Short-circuit output current (3)
ro
Output resistance
Ioff
(1)
(2)
(3)
Output leakage current
VCC = 3.6 V,
VO = 0 V
VCC = 5.5 V,
VO = 0 V
VCC, V+, and V– = 0 V,
VO = ±2 V
FORCEOFF = GND,
V
±35
300
Ω
10M
VO = ±12 V,
VCC = 3 to 3.6 V
±25
VO = ±10 V,
VCC = 4.5 to 5.5 V
±25
μA
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one
output should be shorted at a time.
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7.7 Electrical Characteristics –– Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
PARAMETER
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOH = 1.6 mA
TYP (2)
VCC – 0.6
VCC – 0.1
MAX
UNIT
V
0.4
VCC = 3.3 V
1.6
2.4
VCC = 5 V
1.9
2.4
VIT+
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Input hysteresis (VIT+ – VIT–)
Ioff
Output leakage current (except ROUT2B)
FORCEOFF = 0 V
rI
Input resistance
VI = ±3 V or ±25 V
(1)
(2)
MIN
TEST CONDITIONS
VCC = 3.3 V
0.6
1.1
VCC = 5 V
0.8
1.4
V
V
V
0.5
3
V
±0.05
±10
μA
5
7
kΩ
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
7.8 Switching Characteristics –– Auto Power Down
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7)
PARAMETER
UNIT
1
μs
VCC = 5 V
30
μs
VCC = 5 V
100
μs
tvalid
Propagation delay time, low- to high-level output
VCC = 5 V
tinvalid
Propagation delay time, high- to low-level output
ten
Supply enable time
(1)
TYP (1)
TEST CONDITIONS
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
7.9 Switching Characteristics –– Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1) (see Figure 8)
MAX3243C, MAX3243I
PARAMETER
TEST CONDITIONS
MIN
Maximum data rate
RL = 3 kΩ
One DOUT switching,
CL = 1000 pF
See Figure 3
tsk(p)
Pulse skew (3)
RL = 3 kΩ to 7 kΩ
CL = 150 pF to 2500 pF
See Figure 5
SR(tr)
Slew rate, transition region
(see Figure 3)
VCC = 3.3 V,
RL = 3 kΩ to 7 kΩ
(1)
(2)
(3)
150
TYP (2) MAX
UNIT
250
kbit/s
100
ns
CL = 150 pF to 1000 pF
6
30
CL = 150 pF to 2500 pF
4
30
V/μs
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V + 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
7.10 Switching Characteristics –– Receiver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time, low- to high-level output
tPHL
Propagation delay time, high- to low-level output
ten
Output enable time
tdis
tsk(p)
(1)
(2)
(3)
6
TYP (2)
UNIT
CL = 150 pF,
See Figure 5
150
ns
150
ns
ns
Output disable time
CL = 150 pF, RL = 3 kΩ,
See Figure 6
200
200
ns
Pulse skew (3)
See Figure 5
50
ns
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH - tPHL| of each channel of the same device.
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7.11 Typical Characteristics
VCC = 3.3 V
0
6
5
±1
4
±2
VOL (V)
VOH (V)
VOH
3
±3
2
±4
1
±5
0
±6
VOL
0
5
10
15
20
25
30
Load Current (mA)
35
0
C001
Figure 1. DOUT VOH vs Load Current
5
10
15
20
25
30
Load Current (mA)
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C001
Figure 2. DOUT VOL vs Load Current
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8 Parameter Measurement Information
3V
Generator
(see Note B)
Input
RS-232
Output
50 W
RL
0V
CL
(see Note A)
3V
FORCEOFF
TEST CIRCUIT
−3 V
−3 V
6V
t THL or tTLH
VOH
3V
3V
Output
SR(tr)
tTLH
tTHL
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s (MAX3243C/I) and 1 Mbit/s (MAX3243FC/I),
ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
Figure 3. Driver Slew Rate
3V
Generator
(see Note B)
RS-232
Output
50 W
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPLH
tPHL
VOH
3V
FORCEOFF
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s (MAX3243C/I) and 1 Mbit/s (MAX3243FC/I),
ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
Figure 4. Driver Pulse Skew
3 V or 0 V
FORCEON
3V
Input
1.5 V
1.5 V
−3 V
Output
Generator
(see Note B)
tPHL
50 W
3V
FORCEOFF
tPLH
CL
(see Note A)
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
Figure 5. Receiver Propagation Delay Times
8
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Parameter Measurement Information (continued)
3V
Input
VCC
3 V or 0 V
FORCEON
S1
1.5 V
0V
tPZH
(S1 at GND)
tPHZ
(S1 at GND)
RL
3 V or 0 V
1.5 V
GND
VOH
Output
50%
Output
CL
(see Note A)
FORCEOFF
Generator
(see Note B)
0.3 V
tPZL
(S1 at VCC)
tPLZ
(S1 at VCC)
50 W
0.3 V
Output
50%
VOL
TEST CIRCUIT
NOTES: A.
B.
C.
D.
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The pulse generator has the following characteristics: ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
Figure 6. Receiver Enable and Disable Times
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Parameter Measurement Information (continued)
2.7 V
2.7 V
0V
Receiver
Input
0V
50 W
−2.7 V
−2.7 V
ROUT
Generator
(see Note B)
3V
−3 V
tvalid
tinvalid
VCC
50% VCC
FORCEOFF
DIN
ten
INVALID
CL = 30 pF
(see Note A)
FORCEON
0V
INVALID
Output
Autopowerdown
50% VCC
V+
≈V+
Supply
Voltages
0.3 V
VCC
0V
0.3 V
V−
≈V−
DOUT
TEST CIRCUIT
VOLTAGE WAVEFORMS
Valid RS-232 Level, INVALID High
2.7 V
Indeterminate
0.3 V
0V
If Signal Remains Within This Region
For More Than 30 ms, INVALID Is Low (see Note C)
−0.3 V
Indeterminate
−2.7 V
Valid RS-232 Level, INVALID High
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 W, 50% duty cycle, tr ≤10 ns, tf ≤10 ns.
C. Auto-powerdown disables drivers and reduces supply current to 1 mA.
Figure 7. INVALID Propagation Delay Times and Supply Enabling Time
10
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9 Detailed Description
9.1 Overview
The MAX3243 device consists of three line drivers, five line receivers, and a dual charge-pump circuit with ±15kV ESD (HBM) protection pin to pin (serial- port connection pins, including GND). The device meets the
requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication
controller and the serial-port connector. This combination of drivers and receivers matches that needed for the
typical serial port used in an IBM PC/AT, or compatible. The charge pump and four small external capacitors
allow operation from a single 3-V to 5.5-V supply. In addition, the device includes an always-active noninverting
output (ROUT2B), which allows applications using the ring indicator to transmit data while the device is powered
down. Flexible control options for power management are available. when the serial port is inactive. The autopower-down feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if
the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF is set low, both
drivers and receivers (except ROUT2B) are shut off, and the supply current is reduced to 1 µA. Disconnecting
the serial port or turning off the peripheral drivers causes the auto-powerdown condition to occur. Autopowerdown can be disabled when FORCEON and FORCEOFF are high and should be done when driving a
serial mouse. With auto-powerdown enabled, the device is activated automatically when a valid signal is applied
to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any receiver
input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V or has
been between –0.3 V and 0.3 V for less than 30 µs. INVALID is low (invalid data) if all receiver input voltages are
between –0.3 V and 0.3 V for more than 30 µs.
9.2 Functional Block Diagram
DIN1
DIN2
DIN3
FORCEOFF
FORCEON
ROUT1
ROUT2B
ROUT2
14
9
13
10
12
11
DOUT1
DOUT2
DOUT3
22
23
Auto-powerdown
21
19
4
20
5 kW
18
5
INVALID
RIN1
RIN2
5 kW
ROUT3
17
6
RIN3
5 kW
ROUT4
7
16
RIN4
5 kW
ROUT5
15
8
RIN5
5 kW
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9.3 Feature Description
9.3.1 Auto-Power-Down
Auto-Power-Down can be used to automatically save power when the receivers are unconnected or connected to
a powered down remote RS232 port. FORCEON being high will override Auto power down and the drivers will
be active. FORCEOFF being low will override FORCEON and will power down all outputs except for ROUT2B
and INVALID.
9.3.2 Charge Pump
The charge pump increases, inverts, and regulates voltage at V+ and V– pins and requires four external
capacitors.
9.3.3 RS232 Driver
Three drivers interface standard logic level to RS232 levels. All DIN inputs must be valid high or low.
9.3.4 RS232 Receiver
Five receivers interface RS232 levels to standard logic levels. An open input will result in a high output on ROUT.
Each RIN input includes an internal standard RS232 load.
9.3.5 ROUT2B Receiver
ROUT2B is an always-active noninverting output of RIN2 input, which allows applications using the ring indicator
to transmit data while the device is powered down.
9.3.6 Invalid Input Detection
The INVALID output goes active low when all RIN inputs are unpowered. The INVALID output goes inactive high
when any RIN input is connected to an active RS232 voltage level.
12
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9.4 Device Functional Modes
Table 1. Each Driver (1)
INPUTS
(1)
OUTPUT
DRIVER STATUS
DIN
FORCEON
FORCEOFF
VALID RIN
RS-232 LEVEL
X
X
L
X
Z
Powered off
Normal operation with
auto-powerdown disabled
DOUT
L
H
H
X
H
H
H
H
X
L
L
L
H
YES
H
H
L
H
YES
L
X
L
H
NO
Z
Normal operation with
auto-powerdown enabled
Power off by
auto-powerdown feature
H = high level, L = low level, X = irrelevant, Z = high impedance, YES = any RIN valid, NO = all RIN invalid
Table 2. Each Receiver (1)
INPUTS
(1)
OUTPUTS
RIN
FORCEON
FORCEOFF
ROUT
X
X
L
Z
H
L
X
H
H
X
H
L
Open
X
H
H
RECEIVER STATUS
Powered off
Normal operation
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
Table 3. INVALID and ROUT2B Outputs (1)
INPUTS
VALID RIN
RS-232
LEVEL
(1)
OUTPUTS
RIN2
FORCEON
FORCEOFF
INVALID
ROUT2B
YES
L
X
X
H
L
YES
H
X
X
H
H
YES
OPEN
X
X
H
L
NO
OPEN
X
X
L
L
OUTPUT STATUS
Always Active
Always Active
H = high level, L = low level, X = irrelevant, Z = high impedance (off),
OPEN = input disconnected or connected driver off, YES = any RIN valid, NO = all RIN invalid
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
It is recommended to add capacitors as shown in Figure 8.
10.2 Typical Application
ROUT and DIN connect to UART or general purpose logic lines. RIN and DOUT lines connect to a RS232
connector or cable.
C1+
1
+
C2
−
2
3
−
C2−
VCC
V−
GND
+
C1−
RIN1
RIN2
RS-232 Inputs
RIN3
RIN4
RIN5
DOUT1
RS-232 Outputs
DOUT2
4
27
+
−
26
25
C3(1) +
+ CBYPASS
− = 0.1 mF
−
C1
24
23
FORCEON
5
Autopowerdown
C4
V+
C2+
28
6
7
22
FORCEOFF
8
21
9
20
10
19
INVALID
ROUT2B
ROUT1
5 kW
DOUT3
18
11
ROUT2
5 kW
DIN3
12
Logic Outputs
17
ROUT3
5 kW
Logic Inputs
DIN2
13
16
ROUT4
5 kW
DIN1
14
15
ROUT5
5 kW
(1) C3 can be connected to VCC or GND.
NOTES: A. Resistor values shown are nominal.
B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum
or electrolytic capacitors are used, they should be connected as
shown.
VCC vs CAPACITOR VALUES
VCC
C1
C2, C3, and C4
3.3 V ± 0.3 V
5 V ± 0.5 V
3 V to 5.5 V
0.1 mF
0.047 mF
0.1 mF
0.1 mF
0.33 mF
0.47 mF
Figure 8. Typical Operating Circuit and Capacitor Values
14
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Typical Application (continued)
10.2.1 Design Requirements
• VCC minimum is 3 V and maximum is 5.5V.
• Maximum recommended bit rate is 250 kbit/s.
10.2.2 Detailed Design Procedure
• All DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels.
• Select capacitor values based on VCC level for best performance.
10.2.3 Application Curves
Voltage (V)
VCC= 3.3 V
6
5
4
3
2
1
0
±1
±2
±3
±4
±5
±6
±7
±8
±9
DIN
DOUT to RIN
ROUT
0
1
2
3
4
5
Time (s)
6
7
C001
Figure 9. Driver to Receiver Loopback Timing Waveform
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11 Power Supply Recommendations
VCC should be between 3 V and 5.5 V. Charge pump capacitors should be chosen using table in Figure 8.
12 Layout
12.1 Layout Guidelines
Keep the external capacitor traces short. This is more important on C1 and C2 nodes that have the fastest rise
and fall times.
In the Layout Example diagram, only critical layout sections are shown. Input and output traces will vary in shape
and size depending on the customer application. FORCEON and /FORCEOFF should be pulled up to VCC or
GND via a pullup resistor, depending on which configuration the user desires upon power-up.
16
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12.2 Layout Example
C1
1
C2+
C1+
28
2
C2-
V+
27
C2
Ground
C3
Ground
3
V-
VCC 26
4
RIN1
GND
25
5
RIN2
C1-
24
6
RIN3
FORCEON 23
7
RIN4
FORCEOFF 22
8
RIN5
INVALID 21
9
DOUT1
ROUT2B 20
10
DOUT2
ROUT1 19
11
DOUT3
ROUT2 18
12
DIN3
ROUT3 17
13
DIN2
ROUT4 16
14
DIN1
ROUT5 15
C4
VCC
0.1 μF
Ground
Figure 10. Layout Diagram
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www.ti.com
13 Device and Documentation Support
13.1 Trademarks
IBM, PC/AT are trademarks of IBM.
All other trademarks are the property of their respective owners.
13.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
MAX3243CDB
ACTIVE
SSOP
DB
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDBG4
ACTIVE
SSOP
DB
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDBR
ACTIVE
SSOP
DB
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDBRE4
ACTIVE
SSOP
DB
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDBRG4
ACTIVE
SSOP
DB
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDW
ACTIVE
SOIC
DW
28
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDWE4
ACTIVE
SOIC
DW
28
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDWR
ACTIVE
SOIC
DW
28
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CDWRG4
ACTIVE
SOIC
DW
28
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MAX3243C
MAX3243CPW
ACTIVE
TSSOP
PW
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MA3243C
MAX3243CPWE4
ACTIVE
TSSOP
PW
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MA3243C
MAX3243CPWR
ACTIVE
TSSOP
PW
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MA3243C
MAX3243CPWRG4
ACTIVE
TSSOP
PW
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
MA3243C
MAX3243IDB
ACTIVE
SSOP
DB
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MAX3243I
MAX3243IDBG4
ACTIVE
SSOP
DB
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MAX3243I
MAX3243IDBR
ACTIVE
SSOP
DB
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MAX3243I
MAX3243IDW
ACTIVE
SOIC
DW
28
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MAX3243I
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
MAX3243IDWR
ACTIVE
SOIC
DW
28
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
MAX3243I
MAX3243IDWRE4
ACTIVE
SOIC
DW
28
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MAX3243I
MAX3243IDWRG4
ACTIVE
SOIC
DW
28
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MAX3243I
MAX3243IPW
ACTIVE
TSSOP
PW
28
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MB3243I
MAX3243IPWR
ACTIVE
TSSOP
PW
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MB3243I
MAX3243IPWRE4
ACTIVE
TSSOP
PW
28
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
MB3243I
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF MAX3243 :
• Enhanced Product: MAX3243-EP
NOTE: Qualified Version Definitions:
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Nov-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
MAX3243CDBR
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SSOP
DB
28
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
MAX3243CDWR
SOIC
DW
28
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
MAX3243CPWR
TSSOP
PW
28
2000
330.0
16.4
6.9
10.2
1.8
12.0
16.0
Q1
MAX3243IDBR
SSOP
DB
28
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
MAX3243IDWR
SOIC
DW
28
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
MAX3243IDWRG4
SOIC
DW
28
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
MAX3243IPWR
TSSOP
PW
28
2000
330.0
16.4
6.9
10.2
1.8
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Nov-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
MAX3243CDBR
SSOP
DB
28
2000
367.0
367.0
38.0
MAX3243CDWR
SOIC
DW
28
1000
350.0
350.0
66.0
MAX3243CPWR
TSSOP
PW
28
2000
350.0
350.0
43.0
MAX3243IDBR
SSOP
DB
28
2000
367.0
367.0
38.0
MAX3243IDWR
SOIC
DW
28
1000
350.0
350.0
66.0
MAX3243IDWRG4
SOIC
DW
28
1000
350.0
350.0
66.0
MAX3243IPWR
TSSOP
PW
28
2000
350.0
350.0
43.0
Pack Materials-Page 2
PACKAGE OUTLINE
DB0028A
SSOP - 2 mm max height
SCALE 1.500
SMALL OUTLINE PACKAGE
C
8.2
TYP
7.4
A
0.1 C
PIN 1 INDEX AREA
SEATING
PLANE
26X 0.65
28
1
2X
10.5
9.9
NOTE 3
8.45
14
15
28X
B
5.6
5.0
NOTE 4
SEE DETAIL A
(0.15) TYP
0.38
0.22
0.15
C A B
2 MAX
0.25
GAGE PLANE
0 -8
0.95
0.55
0.05 MIN
DETAIL A
A 15
TYPICAL
4214853/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-150.
www.ti.com
EXAMPLE BOARD LAYOUT
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
SYMM
28X (1.85)
(R0.05) TYP
1
28X (0.45)
28
26X (0.65)
SYMM
15
14
(7)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.07 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4214853/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DB0028A
SSOP - 2 mm max height
SMALL OUTLINE PACKAGE
28X (1.85)
SYMM
(R0.05) TYP
1
28X (0.45)
28
26X (0.65)
SYMM
14
15
(7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4214853/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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