Texas Instruments | Quadruple Low-Power Differential Receiver, SN55LBC173-HIREL (Rev. A) | Datasheet | Texas Instruments Quadruple Low-Power Differential Receiver, SN55LBC173-HIREL (Rev. A) Datasheet

Texas Instruments Quadruple Low-Power Differential Receiver, SN55LBC173-HIREL (Rev. A) Datasheet
SN55LBC173-HIREL
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SGLS415A – OCTOBER 2013 – REVISED OCTOBER 2013
QUADRUPLE LOW-POWER DIFFERENTIAL RECEIVER
Check for Samples: SN55LBC173-HIREL
FEATURES
1
•
2
•
•
Meets EIA Standards RS-422-A, RS-423-A,
RS-485, and CCITT V.11
Designed to Operate With Pulse Durations as
Short as 20 ns
Designed for Multipoint Bus Transmission on
Long Bus Lines in Noisy Environments
•
•
•
Input Sensitivity: ±200 mV
Low-Power Consumption: 20 mA (Max)
Open-Circuit Fail-Safe Design
DESCRIPTION
The SN55LBC173 is a monolithic quadruple differential line receiver with 3-state outputs designed to meet the
requirements of the EIA standards RS-422-A, RS-423-A, RS-485, and CCITT V.11. This device is optimized for
balanced multipoint bus transmission at data rates up to and exceeding 10 million bits per second. The four
receivers share two ORed enable inputs, one active when high, the other active when low. Each receiver
features high input impedance, input hysteresis for increased noise immunity, and input sensitivity of ±200 mV
over a common-mode input voltage range of 12 V to –7 V. Fail-safe design ensures that if the inputs are open
circuited, the output is always high. The SN55LBC173 is designed using the Texas Instruments proprietary
LinBiCMOS™ technology that provides low power consumption, high switching speeds, and robustness.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
SN55LBC173-HIREL
SGLS415A – OCTOBER 2013 – REVISED OCTOBER 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION (1)
TA
–55°C to 125°C
(1)
PACKAGE
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SN55LBC173MKGD1
NA
SN55LBC173MKGD2
NA
KGD
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
BARE DIE INFORMATION
2
DIE THICKNESS
BACKSIDE FINISH
BACKSIDE
POTENTIAL
BOND PAD
METALLIZATION COMPOSITION
BOND PAD
THICKNESS
10.5 mils.
Silicon with backgrind
Floating
AlSi(1%)Cu(0.5%)TiW
1850 nm
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Table 1. Bond Pad Coordinates in Microns
DESCRIPTION
PAD NUMBER
X MIN
Y MIN
X MAX
Y MAX
1B
1
626.5
1695
740.5
1809.5
1A
2
222.5
1690.7
323
1791.3
1Y
3
167.9
1432.1
274.8
1539
G
4
171.4
614.1
278.3
721
2Y
5
166.6
392.1
273.5
499
2A
6
279.2
132
379.7
232.6
2B
7
704.8
132
805.3
232.6
GND
8
966.2
132
1066.7
232.6
3B
9
1237.2
132
1337.7
232.6
3A
10
1626.7
132
1727.2
232.6
3Y
11
1758.7
403.7
1865.6
510.6
G
12
1758.5
749
1865.4
855.9
4Y
13
1750.1
1408.4
1857
1515.3
4A
14
1702.2
1698.4
1802.7
1799
4B
15
1296.7
1698.4
1397.2
1799
VCC
16
1024.2
1671.9
1124.7
1772.5
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range unless otherwise noted
(2)
Value
UNIT
VCC
Supply voltage range
–0.3 to 7
V
VI
Input voltage range, (A or B inputs)
±25
V
VID
Differential input voltage (3)
±25
V
–0.3 to 7
V
TA
Data and control voltage range
Operating free-air temperature range
–55 to 125
°C
Tstg
Storage temperature range
–65 to 150
°C
(1)
(2)
(3)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input.
RECOMMENDED OPERATING CONDITIONS
MIN
TYP
MAX
4.75
5
5.25
UNIT
VCC
Supply voltage
VIC
Common-mode input voltage
VIH
High-level input voltage
VIL
Low-level input voltage
VID
Differential input voltage
IOH
High-level output current
–8
mA
IOL
Low-level output current
16
mA
TA
Operating free-air temperature
125
°C
–7
G inputs
12
2
V
0.8
–6
-55
6
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ELECTRICAL CHARACTERISTICS
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
VIT+
Positive-going input threshold voltage
IO = –8 mA
VIT–
Negative-going input threshold voltage
IO = 8 mA
Vhys
Hysteresis voltage (VIT+ – VIT–)
VIK
Enable input clamp voltage
II = – 18 mA
VOH
High-level output voltage
VID = –200 mV, IOH = –8 mA
VOL
Low-level output voltage
IOZ
High-impedance-state output current
MIN TYP (1)
TEST CONDITIONS
MAX
0.2
–0.2
45
3.5
–1.5
4.5
0.5
VID = –200 mV, IOL = 8 mA, TA = 125°
0.7
VO = 0 V to VCC
VIH = 12 V, VCC = 0 V
V
V
0.3
±20
VIH = 12 V, VCC = 5 V
V
mV
–0.9
VID = –200 mV, IOL = 8 mA
UNIT
0.7
1.15
0.8
1.15
–0.5
–0.9
–0.4
–0.9
V
µA
II
Bus input
current
IIH
High-level input current
VIH = 5 V
±20
µA
IIL
Low-level input current
VIL = 0 V
–20
µA
IOS
Short-circuit output current
VO = 0
mA
A or B inputs
VIH = –7 V, VCC = 5 V
Other inputs at 0 V
VIH = –7 V, VCC = 0 V
ICC
(1)
Supply current
–80
–120
Outputs enabled, IO = 0, VID = 5 V
11
20
Outputs disabled
0.9
1.4
mA
mA
All typical values are at 25°C and with a 5 V supply.
SWITCHING CHARACTERISTICS
VCC = 5 V, CL = 15 pF, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
25°C
11
tPHL
Propagation delay time, high-to-low-level
output
VID = –1.5 V to 1.5 V,
See Figure 1
–55°C to 125°C
11
tPLH
Propagation delay time, low-to-high-level
output
VID = –1.5 V to 1.5 V,
See Figure 1
25°C
11
–55°C to 125°C
11
tPZH
Output enable time to high level
See Figure 2
tPZL
Output enable time to low level
See Figure 3
tPHZ
Output disable time from high level
See Figure 2
tPLZ
Output disable time from low level
See Figure 3
tsk(p)
Pulse skew (|tPHL – tPLH|)
See Figure 1
tt
Transition time
See Figure 1
4
25°C
TYP MAX
22
35
22
17
18
30
25
25°C
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40
45
0.5
–55°C to 125°C
–55°C to 125°C
40
55
–55°C to 125°C
25°C
30
35
–55°C to 125°C
25°C
40
45
–55°C to 125°C
25°C
35
35
–55°C to 125°C
25°C
30
6
7
5
10
16
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
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SGLS415A – OCTOBER 2013 – REVISED OCTOBER 2013
PARAMETER MEASUREMENT INFORMATION
Generator
(see Note A)
1.5 V
50 Ω
0V
Input
Output
0V
– 1.5V
CL = 15 pF
(see Note B)
tPLH
tPHL
VOH
90%
Output
1.3 V
10%
1.3 V
VOL
tt
2V
tt
VOLTAGE WAVEFORMS
TEST CIRCUIT
A.
The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
Figure 1. tpd and tt Test Circuit and Voltage Waveforms
VCC
Output
2 kΩ
S1
1.5 V
Input
CL = 15 pF
(see Note B)
5 kΩ
Generator
(see Note A)
3V
1.3 V
0V
tPHZ
tPZH
See Note C
0.5 V
Output
S1 Open
2V
1.3 V
1.3 V
0V
VOH
S1 Closed
≈ 1.4 V
VOLTAGE WAVEFORMS
50 Ω
(see Note D)
TEST CIRCUIT
A.
The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
C.
All diodes are 1N916 or equivalent.
D.
To test the active-low enable G, ground G and apply an inverted input waveform to G.
Figure 2. tPHZ and tPZH Test Circuit and Voltage Waveforms
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PARAMETER MEASUREMENT INFORMATION (continued)
VCC
Output
2 kΩ
– 1.5 V
3V
Input
CL = 15 pF
(see Note B)
1.3 V
1.3 V
0V
5 kΩ
See Note C
tPZL
tPLZ
S2 Open
2V
Output
Generator
(see Note A)
S2 Closed
≈ 1.4 V
1.3 V
VOL
S2
0.5 V
50 Ω
(see Note D)
VOLTAGE WAVEFORMS
TEST CIRCUIT
A.
The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, duty cycle ≤ 50%,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
C.
All diodes are 1N916 or equivalent.
D.
To test the active-low enable G, ground G and apply an inverted input waveform to G.
Figure 3. tPZL and tPLZ Test Circuit and Voltage Waveforms
6
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DEVICE INFORMATION
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
EQUIVALENT OF A AND B INPUTS
TYPICAL OF ALL OUTPUTS
VCC
TYPICAL OF G AND G INPUTS
VCC
100 kΩ
A Only
Receiver
Input
Input
18 kΩ
100 kΩ
B Only
VCC
3 kΩ
Y Output
12 kΩ
1 kΩ
FUNCTION TABLE (EACH RECIEVER)
DIFFERENTIAL INPUTS
ENABLES
A-B
VID ≥ 0.2 V
-0.2 < VID < 0.2 V
VID ≤ -0.2 V
X
Open circuit
4
G
OUTPUT
G
G
Y
H
X
H
X
L
H
H
X
?
X
L
?
H
X
L
X
L
L
L
H
Z
H
X
H
X
L
H
4
≥1
G
12
12
G
G
2
2
3
1A
1Y
1
3
1A
1Y
1
1B
1B
6
5
2A
6
2Y
7
5
2A
2B
2Y
7
10
2B
11
3A
3Y
9
3B
10
14
3Y
9
4Y
15
11
3A
13
4A
3B
4B
14
13
4A
15
4Y
4B
Figure 4. Logic Symbol
Figure 5. Logic Diagram (Positive Logic)
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TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5.5
4.5
VCC = 5 V
TA = 25°C
VOH – High-Level Output Voltage – V
5
3.5
VIC = 12 V
VIC = 0 V
VIC = – 7 V
2
VIC = 0 V
2.5
VIC = 12 V
3
VIC = – 7 V
VO – Output Voltage – V
4
1.5
1
0.5
0
0
10
20
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
30
40
50
60
70
80
90 100
VCC = 5.25 V
4.5
4
VCC = 5 V
3.5
VCC = 4.75 V
3
2.5
2
1.5
1
0.5 VID = 0.2 V
TA = 25°C
0
0 – 4 – 8 – 12 – 16 – 20 – 24 – 28 – 32 – 36 – 40
VID – Differential Input Voltage – mV
Figure 6.
IOH – High-Level Output Current – mA
Figure 7.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
AVERAGE SUPPLY CURRENT
vs
FREQUENCY
660
540
I CC – Average Supply Current – mA
600
VOL – Low-Level Output Voltage – mV
14
TA = 25°C
VCC = 5 V
VID = 200 mV
480
420
360
300
240
180
120
TA = 25°C
VCC = 5 V
12
10
8
6
4
2
60
0
0
3
6
9
12
15
18
21
24
27
30
0
10 K
IOL – Low-Level Output Current – mA
Figure 8.
8
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100 K
2M
10 M
100 M
Figure 9.
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TYPICAL CHARACTERISTICS (continued)
BUS INPUT CURRENT
vs
INPUT VOLTAGE
(COMPLEMENTARY INPUT AT 0 V)
PROPAGATION DELAY TIME
vs
FREE-AIR TEMPERATURE
24.5
1
0.6
Propagation Delay Time – ns
I I – Bus Input Current – mA
0.8
TA = 25°C
VCC = 5 V
0.4
0.2
0
– 0.2
– 0.4
– 0.6
– 0.8
–1
–8
The shaded region of this graph represents
more than 1 unit load per RS-485.
–6 –4
–2
0
2
4
6
8
10
12
VCC = 5 V
CL = 15 pF
VIO = ± 1.5 V
24
tPHL
23.5
23
tPLH
22.5
22
– 40
– 20
VI – Input Voltage – V
Figure 10.
0
20
40
60
80
TA – Free-Air Temperature – °C
Figure 11.
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9
PACKAGE OPTION ADDENDUM
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22-Feb-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN55LBC173MKGD1
ACTIVE
XCEPT
KGD
0
100
TBD
Call TI
N / A for Pkg Type
-55 to 125
SN55LBC173MKGD2
ACTIVE
XCEPT
KGD
0
10
TBD
Call TI
Call TI
-55 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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