Texas Instruments | USB 3.0 Single Channel Redriver with Equalization (Rev. A) | Datasheet | Texas Instruments USB 3.0 Single Channel Redriver with Equalization (Rev. A) Datasheet

Texas Instruments USB 3.0 Single Channel Redriver with Equalization (Rev. A) Datasheet
TUSB501
www.ti.com
SLLSEG5A – AUGUST 2013 – REVISED AUGUST 2013
USB 3.0 Single Channel Redriver with Equalization
Check for Samples: TUSB501
FEATURES
DESCRIPTION
•
The TUSB501 is a 3rd generation 3.3-V USB 3.0
single-channel redriver. When 5 Gbps SuperSpeed
USB signals travel across a PCB or cable, signal
integrity degrades due to loss and inter-symbol
interference. The TUSB501 recovers incoming data
by applying equalization that compensates channel
loss, and drives out signals with a high differential
voltage. This extends the possible channel length,
and enables systems to pass USB 3.0 compliance.
The TUSB501 advanced state machine makes it
transparent to hosts and devices.
1
2
•
•
•
•
•
•
•
Aggressive Low-Power Architecture (Typ):
– 126 mW Active Power
– 20 mW in U2/U3
– 3 mW with No Connection
Automatic LFPS DE Control
Excellent Jitter and Loss Compensation
– 32 inches of FR4 4 mil Stripline
– 3 m of 30 AWG cable
Integrated Termination
Small 2 x 2 mm QFN Package
Selectable Receiver Equalization, Transmitter
De-Emphasis and Output Swing
Hot-Plug Capable
ESD Protection ±5 kV HBM
APPLICATIONS
•
Cell Phones, Computers, Docking Stations,
TVs, Active Cables, Backplanes
EQ
DE
OS
Driver
TX-
RX-
VCC
GND
Detect
Receiver/
Equalizer
Termination
TX+
Termination
RX+
rd
3 Generation
State Machine
LFPS
Controller
After power up, the TUSB501 periodically performs
receiver detection on the TX pair. If it detects a
SuperSpeed USB receiver, RX termination becomes
enabled, and the TUSB501 is ready to redrive.
The receiver equalizer has three gain settings that
are controlled by pin EQ: 3 dB, 6 dB, and 9 dB. This
should be set based on amount of loss before the
TUSB501. Likewise, the output driver supports
configuration of De-Emphasis and Output Swing (pins
DE and OS). These settings allow the TUSB501 to be
flexibly placed in the SuperSpeed USB path, with
optimal performance.
Over previous generations, the TUSB501 features
reduced power in all link states, a stronger OS option,
improved receiver equalization settings, and an
intelligent LFPS Controller. This controller senses the
low frequency signals and automatically disables
driver de-emphasis, for full USB 3.0 compliance.
The TUSB501 is packaged in a small 2 x 2 mm QFN,
and operates through an industrial temperature range
of –40°C to 85°C.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
TUSB501
SLLSEG5A – AUGUST 2013 – REVISED AUGUST 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DRF PACKAGE
(TOP VIEW)
VCC
1
8
DE
RXP
2
7
TXP
GND
RXN
3
6
TXN
OS
4
5
EQ
PIN FUNCTIONS
PIN
NAME
NO.
RXP
2
RXN
3
TXN
6
TXP
7
EQ
5
DE
OS
2
8
TYPE
Differential input pair for 5 Gbps SuperSpeed USB signals.
Differential I/O
Differential output pair for 5 Gbps SuperSpeed USB signals.
Sets the receiver equalizer gain. 3-state input with integrated pull-up and pulldown resistors.
CMOS Input
VCC
1
Thermal Pad
Sets the output de-emphasis gain. 3-state input with integrated pull-up and pulldown resistors.
Sets the output swing (differential voltage amplitude). 2-state input with an
integrated pull-down resistor.
4
GND
DESCRIPTION
Power
3.3-V power supply
Reference ground
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SLLSEG5A – AUGUST 2013 – REVISED AUGUST 2013
DEVICE CONFIGURATION
Table 1. Control Pin Effects (Typical Values)
PIN
DESCRIPTION
EQ
(1)
LOGIC STATE
GAIN
Low
3 dB
Floating
6 dB
High
9 dB
Equalization Amount
PIN
DESCRIPTION
LOGIC STATE
OUTPUT DIFFERENTIAL VOLTAGE
FOR THE TRANSITION BIT
OS
Output Swing
Amplitude
Low
930 mVpp
High
1300 mVpp
PIN
DESCRIPTION
LOGIC STATE
DE
De-Emphasis
Amount
High
DE-EMPHASIS RATIO
(1)
FOR OS = LOW
FOR OS = HIGH
Low
0 dB
–2.6 dB
Floating
–3.5 dB
–5.9 dB
–6.2 dB
–8.3 dB
Typical values
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Supply voltage range
(2)
Voltage range at any input or output
terminal
Electrostatic discharge
(1)
MIN
MAX
VCC
–0.5
4
V
Differential I/O
–0.5
4
V
CMOS inputs
–0.5
VCC + 0.5
V
Human body model (all pins)
(3)
Charged-device model (all pins)
UNIT
±5
(4)
kV
±1.5
Storage temperature, TSTG
–65
150
°C
Maximum junction temperature, TJ
-40
105
°C
(1)
(2)
(3)
(4)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to the GND terminals.
Tested in accordance with JEDEC Standard 22, Test Method A114-B.
Tested in accordance with JEDEC Standard 22, Test Method C101-A.
THERMAL INFORMATION
THERMAL METRIC (1)
TUSB501
DRF
θJA
Junction-to-ambient thermal resistance
102.4
θJC(top)
Junction-to-case(top) thermal resistance
90.3
θJB
Junction-to-board thermal resistance
21.2
ψJT
Junction-to-top characterization parameter
70
ψJB
Junction-to-board characterization parameter
3.6
θJC(bottom)
Junction-to-case(bottom) thermal resistance
70.2
(1)
UNITS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
VCC
Main power supply
TA
Operating free-air temperature
CAC
AC coupling capacitor
MIN
NOM
MAX
3
3.3
3.6
V
85
°C
nF
–40
75
100
200
MIN
TYP (1)
MAX (2)
UNIT
POWER SUPPLY CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
ICC-ACTIVE
Average active current
TEST CONDITIONS
UNIT
Link in U0 with SuperSpeed USB
data transmission, OS = Low
38.1
Link in U0 with SuperSpeed USB
data transmission, OS = High
43.8
29.8
mA
mA
65
ICC-IDLE
Average current in idle state
Link has some activity, not in U0,
OS = Low
ICC-U2U3
Average current in U2/U3
Link in U2 or U3
6.1
mA
ICC-NC
Average current with no connection
No SuperSpeed USB device is
connected to TXP, TXN
1.3
mA
PD
Power Dissipation in U0
OS = Low
126
OS = High
145
234
TYP
MAX
(1)
(2)
mW
TYP values use VCC = 3.3 V, TA = 25°C.
MAX values use VCC = 3.6 V, TA = –40°C.
DC ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
UNIT
3-State CMOS Inputs (EQ, DE)
VIH
High-level input voltage
VIM
Mid-level input voltage
2.8
VIL
Low-level input voltage
VF
Floating voltage
RPU
RPD
IIH
High-level input current
VIN = 3.6 V
IIL
Low-level input current
VIN = GND, VCC = 3.6 V
V
VCC / 2
V
0.6
VIN = High impedance
V
VCC / 2
V
Internal pull-up resistance
190
kΩ
Internal pull-down resistance
190
kΩ
36
µA
-36
µA
2
V
2-State CMOS Input (OS)
VIH
High-level input voltage
VIL
Low-level input voltage
VF
Floating voltage
RPD
Internal pull-down resistance
IIH
High-level input current
VIN = 3.6 V
IIL
Low-level input current
VIN = GND
4
0.5
VIN = High impedance
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V
270
kΩ
26
-1
V
GND
µA
µA
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AC ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
AC-coupled differential peak-to-peak
signal
100
TYP
MAX
UNIT
1200
mVpp
Differential Receiver (RXP, RXN)
VDIFF-pp
Input differential voltage swing
VCM-RX
Common-mode voltage bias in the
receiver (DC)
ZRX-DIFF
Differential input impedance (DC)
Present after a SuperSpeed USB
device is detected on TXP/TXN
72
91
120
Ω
ZRX-CM
Common-mode input impedance
(DC)
Present after a SuperSpeed USB
device is detected on TXP, TXN
18
22.8
30
Ω
ZRX-HIGH-
Common-mode input impedance
with termination disabled (DC)
Present when no SuperSpeed USB
device is detected on TXP, TXN.
Measured over the range of 0-500
mV with respect to GND.
25
35
Low Frequency Periodic Signaling
(LFPS) Detect Threshold
Below the minimum is squelched
IMP-DC-POS
VRX-LFPSDET-DIFF-pp
3.3
100
V
kΩ
300
mVpp
Differential Transmitter (TXP, TXN)
VTX-DIFF-PP
Transmitter differential voltage swing OS = Low, No load
(transition-bit)
OS = High, No load
VTX-DE-
Transmitter de-emphasis
DE = Floating, OS = Low
CTX
TX input capacitance to GND
At 2.5 GHz
ZTX-DIFF
Differential impedance of the driver
ZTX-CM
Common-mode impedance of the
driver
Measured with respect to AC ground
over 0-500 mV
ITX-SC
TX short circuit current
TX ± shorted to GND
VCM-TX
Common-mode voltage bias in the
transmitter (DC)
VCM-TX-AC
AC common-mode voltage swing in
active mode
Within U0 and within LFPS
VTX-IDLE-
Differential voltage swing during
electrical idle
Tested with a high-pass filter
Absolute delta of DC CM voltage
during active and idle states
Restrict the test condition to meet
100 mV
DC electrical idle differential output
voltage
Voltage must be low pass filtered to
remove any AC component
930
mVpp
1300
-3.5
dB
RATIO
DIFF -AC-pp
VTX-CMDeltaU1-U0
VTX-idle-diffDC
1.25
75
93
18.75
1.2
0
0
pF
125
Ω
31.25
Ω
60
mA
2.5
V
100
mVpp
10
mVpp
100
mV
12
mV
Differential Transmitter (TXP, TXN)
tR, tF
Output rise, fall time
see Figure 4
20%-80% of differential voltage
measured 1 inch from the output pin
tRF-MM
Output Rise, Fall time mismatch
20%-80% of differential voltage
measured 1 inch from the output pin
tdiff-LH,
tdiff-HL
Differential propagation delay
see Figure 2
De-emphasis = -3.5 dB propagation
delay between 50% level at input
and output
tidleEntry,
tidleExit
Idle entry and exit times
see Figure 3
80
ps
20
290
ps
3.6
ns
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SLLSEG5A – AUGUST 2013 – REVISED AUGUST 2013
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AC ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Timing
Time from power applied until RX
termination
tREADY
Apply 0 V to VCC, connect
SuperSpeed USB termination to
TX±, apply 3.3 V to VCC, and
measure when ZRX-DIFF is enabled.
9
ms
Jitter
(1) (2)
TJTX-EYE
Total jitter
DJTX
Deterministic jitter
RJTX
(1)
(2)
(3)
(4)
Random jitter
EQ = Floating, OS = High,
DE = High
See Figure 1.
(2)
(2) (4)
0.213
UI
(3)
0.197
UI
(3)
0.016
UI
(3)
Includes RJ at 10-12.
Measured at the ends of reference channel in Figure 1 with K28.5 pattern, VID = 1000 mVpp, 5 Gbps, -3.5 dB de-emphasis from source.
UI = 200 ps.
Rj calculated as 14.069 times the RMS random jitter for 10-12 BER.
spacer
PARAMETER MEASUREMENT INFORMATION
Jitter
Measurement
A
TUSB501
AWG
24"
4"
Up to 3m
(30AWG)
1"-6"
Figure 1. Jitter Measurement Setup
spacer
IN
Tdiff_LH
Tdiff_HL
OUT
Figure 2. Propagation Delay
6
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PARAMETER MEASUREMENT INFORMATION (continued)
IN+
Vcm
VRX-LFPS-DET-DIFF-pp
INtidleExit
t idleEntry
OUT+
Vcm
OUT-
Figure 3. Electrical Idle Mode Exit and Entry Delay
spacer
80%
20%
tr
tf
Figure 4. Output Rise and Fall Times
spacer
Transition
bit
Transition
bit
Consecutive bits
Consecutive bits
DE = 0dB
415mV
DE = -3.5dB
DE = -6.2dB
VTX-DIFF- PP
0V
DE = -6.2dB
DE = -3.5dB
DE = 0dB
-415mV
0ps
200ps
400ps
600ps
800ps
1000ps
1200ps
Figure 5. Transmitter Differential Voltage, OS = L
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PARAMETER MEASUREMENT INFORMATION (continued)
Figure 6. Input for Typical Output Measurement at TUSB501 at TA = 25°C
8
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PARAMETER MEASUREMENT INFORMATION (continued)
Figure 7. Typical Output Eye for Jitter Measurement Setup in Figure 1
at TA = 25°C, DE = HIGH, OS = HIGH, EQ = NC
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REVISION HISTORY
Changes from Original (August 2013) to Revision A
•
10
Page
Changed from Product Preview to Production Data ............................................................................................................. 1
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Aug-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
TUSB501DRFR
ACTIVE
Package Type Package Pins Package
Drawing
Qty
WSON
DRF
8
3000
Eco Plan
Lead/Ball Finish
(2)
Green (RoHS
& no Sb/Br)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
CU NIPDAU
Level-2-260C-1 YEAR
(4/5)
-40 to 85
T501
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Jul-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TUSB501DRFR
Package Package Pins
Type Drawing
WSON
DRF
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
3000
180.0
8.4
Pack Materials-Page 1
2.3
B0
(mm)
K0
(mm)
P1
(mm)
2.3
1.15
4.0
W
Pin1
(mm) Quadrant
8.0
Q2
PACKAGE MATERIALS INFORMATION
www.ti.com
28-Jul-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TUSB501DRFR
WSON
DRF
8
3000
210.0
185.0
35.0
Pack Materials-Page 2
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