Texas Instruments | DockPort Controller, HD3SS2521 (Rev. A) | Datasheet | Texas Instruments DockPort Controller, HD3SS2521 (Rev. A) Datasheet

Texas Instruments DockPort Controller, HD3SS2521 (Rev. A) Datasheet
HD3SS2521
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SLAS941A – APRIL 2013 – REVISED MAY 2013
DockPort Controller
Check for Samples: HD3SS2521
FEATURES
1
•
•
•
•
•
•
•
Ideal for DockPort Applications
– Bi-Directional 2:1 Switch for USB 2.0
(HS/FS/LS) and HPD Signals
– Bi-Directional 2:1 Switch for SuperSpeed
USB and DisplayPort Signals
– Integrated DockPort Controller Manages
DockPort Detection, Signal Switching and
Power Switching
Supports Host-and Dock-side Applications
VCC Operating Range 3.3V ± 10%
SuperSpeed USB I/O Supports Common Mode
Voltage from 0V to 2.2V
USB 2.0 I/O Supports Signal Up to 3.6V
Wide –3dB Differential BW on High-bandwidth
Path of over 6 GHz
Excellent High-bandwidth Path Dynamic
Characteristics on (at 2.5GHz)
– Crosstalk = –39dB
– Isolation = –22dB
– Insertion Loss = –1.2dB
– Return Loss = 12 dB
– Max Bit-Bit Skew = 8 ps
5mm x11mm, 56-Pin WQFN Package (RHU)
•
ESD
– HBM: 2000V
– CDM: 500V
APPLICATIONS
•
•
•
•
Desktop PCs
Notebook PCs
Tablets
Docking Station
DP Lane 2
SuperSpeed USB TX
DockPort_L2_TX
DockPort_L3_RX
DP Lane 3
SuperSpeed USB RX
DP Config 1
DP Config 2
DockPort_C1_DP
DockPort_C2_DM
USB DP
USB DM
Control
Logic
Figure 1. DockPort Functional Diagram
DESCRIPTION
The HD3SS2521 is an integrated DockPort switch solution. It provides independent 2:1 passive switching for the
SuperSpeed USB and Display Port signals as well as for the USB 2.0 (HS/FS/LS) and I2C necessary to support
DockPort applications. In addition, a firmware upgradable integrated DockPort controller is provided to manage
host and dock side DockPort detection, signal switch and power configuration.
The HD3SS2521 is offered in 56-pin WQFN package and is specified to operate from a single supply voltage of
3.3V over the temperature range of 0°C to 70°C .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2013, Texas Instruments Incorporated
PRODUCT PREVIEW
•
HD3SS2521
SLAS941A – APRIL 2013 – REVISED MAY 2013
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PART NUMBER
PART MARKING
PACKAGE
HD3SS2521RHUR
HD3S2521
56-Pin WQFN (Reel Large)
HD3SS2521RHUT
HD3S2521
56-Pin WQFN (Reel Small)
PRODUCT PREVIEW
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TYPICAL APPLICATION
DP_1P
DP_1N
DP_0P
DP_0N
AUX_P
AUX_N
SLEEP#
Display Port Source
B1P
B1N
A0P
A0N
A1P
A1N
C0P
C0N
SSRXP
SSRXM
Downstream
SSRX
B0P
B0N
C1P
C1N
16 5 3 11 9
DP_2P/SSTXP
DP_2N/SSTXM
DP_3P/SSRXP
DP_3N/SSRXM
15
17
mDP Connector
SSTXP
SSTXM
Downstream
SSTX
1
AUX_N
DP_2P
DP_2N
DP_3P
DP_3N
HD3SS2521
10
12
4
6
2
SEL
PRODUCT PREVIEW
SS_OE#_IN
SS_SEL_IN
18
USB3/xHCI
HS_OE#_IN
CONFIG1_SDA
CONFIG2_SCL
USB2_DP
USB2_DM
Downstream
USB2
20 19
BDP
BDM
ADP
ADM
CDP
CDM
DP/CONFIG1
DM/CONFIG2
SEL
HS_SEL_IN
HS_SEL_OUT
SS_SEL_OUT
CONFIG1
CONFIG2
CONFIG_PU#
HPD_OUT
SYS_COM_REQ
Vcc
HPD_IN
AUX_N
HPD_IN
HS_OE#_OUT
AUX_N
SS_OE#_OUT DigitalControl
CONFIG1
CONFIG2
Logic
SLEEP#
RTN
Vcc
DP_PWR
SYS_COM_REQ
HPD_OUT
Vcc/
Vcc/ GND
GND
SLEEP#
DP Power Enable
Block
CHRG_OFF
CHRG_DELAY
Dongle_PWREN#
RST
MODE_LED
NOTE: Refer to the implementation guide for details on design
considerations and configuration options
Figure 2. DockPort Host Implementation
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DP_1P
DP_1N
DP_0P
DP_0N
AUX_P
AUX_N
Vcc
PUSH_BUTTON
MST_MODE
HD3SS2521
17 15 12 10 16
SS_OE_IN#
Tethered Cable with
mini DP plug
AUX_N
B0P
B0N
DP_2P/SSRXP
DP_2N/SSRXM
11
9
DP_3P/SSTXP
DP_3N/SSTXM
5
3
B1P
B1N
A0P
A0N
A1P
A1N
C0P
C0N
4
6
2
SEL
C1P
C1N
DP_2P
DP_2N
Display
Ports
MST_HUB
DP_3P
DP_3N
SSRXP
SSRXM
Upstream
SSRX
SSTXP
SSTXM
DP
Display/
DP HUB
Ethernet
Upstream
SSTX
Audio
SS_SEL_IN
18
USB3 HUB
PRODUCT PREVIEW
HS_OE#
19 20
DP/CONFIG1
DM/CONFIG2
BDP
BDM
ADP
ADM
CDP
CDM
CONFIG1
CONFIG2
USB2_DP
USB2_DM
Upstream
USB2
DP_PWR
RTN
SEL
Vcc
HS_SEL_IN
HPD_OUT
AUX_N
MST_MODE
PUSH_BUTTON
Power Block
V_CHARGE(5/12/19.5V)
HS_SEL_OUT
SS_SEL_OUT
HPD_OUT
AUX_N
DigitalControl
MST_MODE Logic
PUSH_BUTTON
CONFIG1
CONFIG2
CONFIG1
CONFIG2
HPD_IN
Vcc
CHRG_EN#
FAULT#
Power Switch
Block
USB Peripherals
HUB
19.5V_SEL
12V_SEL
5V_SEL
VCTRL_SEL3
VCTRL_SEL2
VCTRL_SEL1
HS_OE#_OUT
RST
MODE_LED
NOTE: Refer to the implementation guide for details on design
considerations and configuration options
Figure 3. DockPort Hub Implementation
4
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NC
NC
GND
VCC
NC
NC
NC
56
55
54
53
52
51
50
49
VCC
1
48
B0P
A0P
2
47
B0N
A0N
3
46
B1P
NC
4
45
B1N
A1P
5
44
C1P
A1N
6
43
C0N
SS_SEL_IN
7
42
C1P
RSVD
8
41
C1N
HS_OE#_IN
9
40
VCC
39
NC
38
CDP
ADM
10
Thermal
Pad
ADP
11
HS_SEL_IN
12
37
CDM
VCC
13
36
BDM
VCC
14
35
BDP
MODE_LED
15
34
RSVD / PUSH_BUTTON
HPD_IN
16
33
GND
HPD_OUT
17
32
HS_OE#_OUT
AUX_N
18
31
NC
HS_SEL_OUT
19
30
RST
SS_SEL_OUT
20
29
CONFIG_1
21
22
23
24
25
26
27
28
CHRG_OFF / MST_MODE
CHRG_DELAY / CHRG_EN#
SLEEP# / FAULT#
NC
SYS_COM_REQ / VCTRL_SEL1
CONFIG_PU# / VCTRL_SEL2
DONGLE_PWR_EN# / VCTRL_SEL3
CONFIG_2
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PRODUCT PREVIEW
NC
RHU PACKAGE
(TOP VIEW)
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PIN FUNCTIONS
PRODUCT PREVIEW
6
DockPort HOST
(SIGNAL MUX)
DockPort DEVICE
(SIGNAL DE-MUX)
SIGNAL
SPEED
(MAX)
PIN
I/O
PIN NAME
2
I/O
A0P
DockPort Lane 2, Positive Signal
(DockPort cable between DockPort host and DockPort device)
3
I/O
A0N
DockPort Lane 2, Negative Signal
(DockPort cable between DockPort host and DockPort device)
5
I/O
A1P
DockPort Lane 3, Positive Signal (DockPort cable between DockPort host and
DockPort device)
6
I/O
A1N
DockPort Lane 3, Negative Signal (DockPort cable between DockPort host and
DockPort device)
48
I/O
B0P
DisplayPort Lane 2, Positive Signal
47
I/O
B0N
DisplayPort Lane 2, Negative Signal
46
I/O
B1P
DisplayPort Lane 3, Positive Signal
45
I/O
B1N
DisplayPort Lane 3, Negative Signal
44
I/O
C0P
SuperSpeed USB TX, Positive Signal
SuperSpeed USB RX, Positive
Signal
43
I/O
C0N
SuperSpeed USB TX, Negative Signal
SuperSpeed USB RX, Negative
Signal
42
I/O
C1P
SuperSpeed USB RX, Positive Signal
SuperSpeed USB TX, Positive Signal
41
I/O
C1N
SuperSpeed USB RX, Negative Signal
SuperSpeed USB TX, Negative
Signal
11
I/O
ADP
10
I/O
ADM
DockPort Config1 (DockPort cable between DockPort host and DockPort device) Supports Highspeed USB
DockPort Config2 (DockPort cable between DockPort host and DockPort device)
35
I/O
BDP
CONFIG 1
36
I/O
BDM
CONFIG 2
37
I/O
CDP
High-speed USB D+
38
I/O
CDM
High-speed USB D-
7
I
SS_SEL_IN
DisplayPort / SuperSpeed USB Mux Select (Connect to SS_SEL_OUT - Pin 20)
12
I
HS_SEL_IN
DisplayPort / HighSpeed USB Mux Select (Connect to HS_SEL_OUT - Pin 19)
8
I
RSVD
(SS_OE#_IN)
N/C
For future compatibility (Connect to
RSVD [SS_OE#_OUT] signal - Pin 34)
Fast Lane
(Up to
5.4Gbps)
Fast Lane
(Up to
5.4Gbps)
Fast Lane
(Up to
5.4Gbps)
N/C
Requires external 10 kΩ Pull-down.
9
I
HS_OE#_IN
DisplayPort / HighSpeed USB Mux Enable (Connect to HS_OE#_OUT - Pin 32)
15
I/O
MODE_LED
This signal is sampled at power on or
reset to determine the mode of operation:
Pulled High for DockPort host operation.
(Optionally through LED for debug
purposes)
This signal is sampled at power on or
reset to determine the mode of
operation:
Pulled Low for DockPort hub
(dock/dongle) operation. (Optionally
through LED for debug purposes)
16
I
HPD_IN
Hot Plug Detect from DockPort device
Hot Plug Detect from MST Hub/DP
Device
17
O
HPD_OUT
Hot Plug Detect to System Graphics
Hot Plug Detect to DockPort host.
18
I/O
AUX_N
AUX Negative Pull-Up to DockPort
device (Output)
This signal indicates a connection event
to a DockPort device.
AUX Negative from DockPort host
(Input)
This signal is used to detect a
connection event from a DockPort
host.
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PIN FUNCTIONS (continued)
PIN
I/O
PIN NAME
19
O
HS_SEL_OUT
DockPort HOST
(SIGNAL MUX)
DockPort DEVICE
(SIGNAL DE-MUX)
SIGNAL
SPEED
(MAX)
DisplayPort / High-speed USB Mux Select (Connect to HS_SEL_IN - Pin 12)
This signal in conjunction with SS_SEL_OUT is sampled at power-on or reset to
determine the voltage level supplied to a DockPort host and must be strapped to
correct logic level for the corresponding voltage level: 5 V, 12 V or 19 V.
Refer to the Power Delivery Voltage Selection table for strapping options.
After power-on/reset, this signal is driven by DockPort host to select the device
operation between DisplayPort and High-speed USB.
MM 0 = DisplayPort
MM 1 = High-speed USB
20
O
SS_SEL_OUT
DisplayPort / SuperSpeed USB Mux Select (Connect to SS_SEL_IN - Pin 7)
This signal in conjunction with HS_SEL_OUT is sampled at power-on or reset to
determine the voltage level to be supplied to a DockPort host and must be
strapped to correct logic level for the corresponding voltage level: 5 V, 12 V or
19 V.
Refer to the Power Delivery Voltage Selection table for strapping options.
PRODUCT PREVIEW
After power-on/reset, this signal is driven by DockPort host to select the device
operation between DisplayPort and SuperSpeed USB.
MM 0 = DisplayPort
MM 1 = SuperSpeed USB
28
I/O
CONFIG_2
DisplayPort CONFIG2/CEC
29
I/O
CONFIG_1
DisplayPort CONFIG1/CAD
21
O
CHRG_OFF
This signal controls the power delivery
circuit.
—
MST_MODE
—
MST Mode Input from MST HUB
which indicates 2/4 DisplayPort lane
switch.
0 = 2-lane (external 10 kΩ Pull-down)
1 = 4-lane (external 10 kΩ Pull-up)
This signal controls the power delivery
circuit.
—
—
This signal is the power delivery
enable for a DockPort hub.
SLEEP#
Connect to the DockPort host sleep state
signal.
—
FAULT#
—
Connect to the fault indicator of the
power management circuit
22
O
CHRG_DELAY
CHRG_EN#
23
25
I
I
SYS_COM_REQ
External 100K Pull–down required. This
signal is a sampled at power on or reset
to determine if the system is in a FW
update mode.
After power on reset, the signal is used
for communication request via a GPIO in
a DockPort host for communication
request
O
VCTRL_SEL1
—
Power enable for 5 V power delivery
In additon, this signal is sampled at
power on or reset to determine the
mode of operation:
0 = DockPort hub (external 10 kΩ
Pull-down)
1 = DockPort dongle (external 10 kΩ
Pull-up)
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PIN FUNCTIONS (continued)
DockPort DEVICE
(SIGNAL DE-MUX)
I/O
PIN NAME
26
O
CONFIG_PU#
Connect to FET switch to control pull-up
option on DisplayPort
CONFIG1/CONFIG2 for DockPort
communication.
—
VCTRL_SEL2
—
Power enable for 12 V power
delivery
Power enable for 5 V DockPort dongle
power circuitry
—
—
Power enable for 19 V power
delivery
27
O
Dongle_PWREN#
VCTRL_SEL3
34
PRODUCT PREVIEW
8
DockPort HOST
(SIGNAL MUX)
PIN
O
RSVD
(SS_OE#_OUT)
N/C
For future compatibility (Connect to
RSVD [SS_OE#_IN] signal - Pin 8)
—
I
PUSH_BUTTON
—
External 5.6 kΩPull-up required.
Push button input to DockPort hub
and MST HUB for 2-lane/4-lane
switching
32
O
HS_OE#_OUT
30
I/O
RST
Reset
33
39
53
GND
GND
Connect to Supply Ground
24
31
49
50
51
54
55
56
NC
NC
1
4
13
14
40
52
Supply
VCC
SIGNAL
SPEED
(MAX)
DisplayPort / High-speed USB Mux Enable. (Connect to HS_OE#_IN - Pin 9)
An external 10 kΩ Pull-down to ground is required.
No Connect
3.3V Positive power supply voltage
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Table 1. Power Delivery Voltage Selection
VOLTAGE
HS_SEL_OUT
SS_SEL_OUT
0V
0
0
12 V
0
1
19 V
1
0
5V
1
1
ABSOLUTE MAXIMUM RATINGS (1)
(2)
over operating free-air temperature range (unless otherwise noted)
Supply Voltage Range (2) VCC
Differential I/O (High bandwidth signal path, AxP/N, BxP/N, CxP/N)
Electrostatic discharge
(2)
(3)
(4)
4
UNIT
V
–0.5
4
V
Differential I/O (Low bandwidth signal path, ADP/M, BDP/M, CDP/M)
-0.5
7
V
Control Pin and Single Ended I/O
–0.3
VCC + 0.3
V
±2000
V
±500
V
Human body model (3)
Charged-device model
(4)
Continuous power dissipation
(1)
MAX
See Thermal Table
PRODUCT PREVIEW
Voltage Range
MIN
–0.3
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to network ground terminal.
Tested in accordance with JEDEC Standard 22, Test Method A114-B
Tested in accordance with JEDEC Standard 22, Test Method C101-A
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THERMAL INFORMATION
HD3SS2521
THERMAL METRIC (1)
UNITS
RHU (56 PIN)
θJA
Junction-to-ambient thermal resistance
31.6
θJCtop
Junction-to-case (top) thermal resistance
15.9
θJB
Junction-to-board thermal resistance
8.5
ψJT
Junction-to-top characterization parameter
0.5
ψJB
Junction-to-board characterization parameter
8.5
°C/W
spacer
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
(Typical values for all parameters are at Vcc = 3.3V and TA = 25°C. All temperature limits are specified by design)
MIN
TYP
3
3.3
MAX
UNITS
PRODUCT PREVIEW
VCC
Supply voltage
3.6
V
VIH
Input high voltage
Control/Status Pins
2
VCC
V
VIL
Input low voltage
Control/Status Pins
–0.1
0.8
V
VI/O_Diff
Differential
voltage
Switch I/O diff voltage (High-bandwidth path AxP/N, BxP/N, CxP/N)
0
1.8
Vpp
VI/O_CM
Common voltage
Switch I/O common mode voltage (High-bandwidth path AxP/N, BxP/N,
CxP/N)
0
2
V
VI/O
Input/ouput
voltage
Data input/output voltage (Low-bandwidth path ADP/M, BDP/M,
CDP/M)
0
5.5
V
TA
Operating free-air temperature
0
70
°C
ELECTRICAL CHARACTERISTICS – DEVICE PARAMETERS
(under recommended operating conditions)
PARAMETER
ICC
Supply Current
CONDITIONS
MIN
VCC = 3.6V, HS_SEL_IN/SS_SEL_IN =
VCC/GND;
HS_OE#_IN = GND; Outputs Floating
TYP
MAX
4.5
UNITS
mA
AUX_N, CONFIG_1, CONFIG_2, FAULT#, HPD_IN, MODE_LED, PUSH_BUTTON, RST, SLEEP#, SYS_COM_REQ, TEST
VIT+
Positive-going input threshold
voltage
0.45 VCC
0.75 VCC
V
VIT–
Negative-going input threshold
voltage
0.25 VCC
0.55 VCC
V
Vhys
Input voltage hysteresis
(VIT+ – VIT–)
VCC = 3V
0.3
1
V
RPULL
Pullup/pulldown resistor
Pullup: VIN = GND,
Pulldown: VIN = VCC, VCC = 3V
20
50
kΩ
CI
Input capacitance
VIN = GND or VCC
ILK
High-impedance leakage current
VIN = GND or VCC, VCC = 3V, Pullup/Pulldown
disabled
35
5
pF
±50
nA
AUX_N, CHRG_DELAY, CHRG_EN, CHRG_OFF, CONFIG_1, CONFIG_2, CONFIG_PU#, Dongle_PWREN#, HPD_OUT, HS_OE#_OUT,
HS_SEL_OUT, MODE_LED, MST_MODE, SS_SEL_OUT, RST, TEST, VCTRL_SEL1, VCTRL_SEL2, VCTRL_SEL3
VOH
High-level ouptut voltage
IOHmax = –6 mA (1)
VOL
Low-level ouptut voltage
IOLmax = 6 mA (1)
VCC– 0.3
V
GND + 0.3
V
SS_SEL_IN
IIH
Input High Current
VCC = 3.6V, VIN = VCC
95
IIL
Input Low Current
VCC = 3.6V, VIN = GND
1
(1)
10
µA
The maximum total current, IOHmax and IOLmax, for all outputs combined should not exceed ±48 mA to hold the maximum voltage drop
specified.
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ELECTRICAL CHARACTERISTICS – DEVICE PARAMETERS (continued)
(under recommended operating conditions)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
HS_OE#_IN , HS_SEL_IN
IIH
Input High Current
VCC = 3.6V, VIN = VCC
1
µA
IIL
Input Low Current
VCC = 3.6V, VIN = GND
1
µA
AxP/N, BxP/N, CxP/N
ILK
High-impedance leakage current
VCC = 3.6V, VIN = 0V, VOUT = 2V
(ILK on open outputs Port B and C)
130
µA
VCC = 3.6V, VIN = 0V, VOUT = 2V
(ILK on open outputs Port A)
4
VCC = 3.6V, VIN = 0V, VOUT = 0V to 4V,
HS_OE#_IN = GND
1
ADP/DM, BDP/DM, CDP/DM
ILK
High-impedance leakage current
µA
ELECTRICAL CHARACTERISTICS – SIGNAL SWITCH PARAMETERS
(under recommended operating conditions; RL, Rsc = 50Ω, CL = 10pF unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Rsc and RL = 50 Ω, See Figure 5
tPD
Switch Propagation Delay
Ton
SS_SEL_IN -to-Switch Ton
Toff
SS_SEL_IN -to-Switch Toff
TSK(O)
Inter-Pair Output Skew (CH-CH)
TSK(b-b)
Intra-Pair Output Skew (bit-bit)
CON
Outputs ON Capacitance
VIN = 0V, Outputs Open, Switch ON
COFF
Outputs OFF Capacitance
RON
Output ON resistance
Rsc and RL = 50 Ω, See Figure 4
On resistance match between pairs of the
same channel
RFLAT_ON On resistance flatness [RON(MAX) – RON(MIN)]
RL
Differential Return Loss (VCM = 0V)
XTALK
Differential Crosstalk (VCM = 0V)
OIRR
Differential Off-Isolation (VCM = 0V)
IL
Differential Insertion Loss (VCM = 0V)
BW
Bandwidth
70
250
70
250
20
Rsc and RL = 50 Ω, See Figure 5
On resistance match between channels
ΔRON
85
8
ps
ns
ps
ps
1.5
pF
VIN = 0V, Outputs Open, Switch OFF
1
pF
VCC = 3.3V, VCM = 0.5V – 1.5V,
IO = –8 mA
5
8
Ω
2
VCC = 3.3V; –0.35V ≤ VIN ≤ 1.2V;
IO = –8 mA
0.7
VCC = 3.3V; –0.35V ≤ VIN ≤ 1.2V
1.15
f = 2.5 GHz
–12
f = 4.0 GHz
–11
f = 2.5 GHz
–39
f = 4.0 GHz
–35
f = 2.5 GHz
–22
f = 4.0 GHz
–19
f = 2.5 GHz
–1.1
f = 4.0 GHz
–1.5
At -3 dB
PRODUCT PREVIEW
AxP/N, BxP/N, CxP/N HIGH-BANDWIDTH SIGNAL PATH
Ω
Ω
dB
dB
dB
dB
6
GHz
ADP/DM, BDP/DM, CDP/DM SIGNAL PATH
tPD
Ton
Toff
Switch Propagation Delay
HS_SEL_IN -to-Switch Ton
HS_OE#_IN -to-Switch Ton
HS_SEL_IN Toff
HS_OE#_IN -to-Switch Toff
TSK(O)
Inter-Pair Output Skew (CH-CH)
TSK(b-b)
Intra-Pair Output Skew (bit-bit)
CON
Outputs ON Capacitance
Rsc and RL = 50 Ω, See Figure 5
250
30
Rsc and RL = 50 Ω, See Figure 4
17
12
Rsc and RL = 50 Ω, See Figure 4
Rsc and RL = 50 Ω, See Figure 5
VIN = VCC or 0V, Outputs Open,
Switch ON
Product Folder Links :HD3SS2521
ns
10
10
20
ps
10
20
ps
6
7.5
pF
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Copyright © 2013, Texas Instruments Incorporated
ps
11
HD3SS2521
SLAS941A – APRIL 2013 – REVISED MAY 2013
www.ti.com
ELECTRICAL CHARACTERISTICS – SIGNAL SWITCH PARAMETERS (continued)
(under recommended operating conditions; RL, Rsc = 50Ω, CL = 10pF unless otherwise noted)
PARAMETER
CONDITIONS
VIN = VCC or 0V, Outputs Open,
Switch OFF
MIN
TYP
MAX
3.5
6
UNITS
COFF
Outputs OFF Capacitance
RON
Output ON resistance
ΔRON
On resistance match
RFLAT_ON
On resistance flatness
[RON(MAX) – RON(MIN)]
VCC = 3V, VIN = 0V, IO = 30 mA
XTALK
Differential Crosstalk (VCM = 0V)
RL = 50 W, f = 250 MHz
–40
OIRR
Differential Off-Isolation (VCM = 0V)
RL = 50 W, f = 250 MHz
–41
dB
BW
Bandwidth
RL = 50 W
0.9
GHz
VCC = 3V, VIN = 0V, IO = 30 mA
3
6
VCC = 3V, VIN = 2.4V, IO = –15 mA
3.4
6
VCC = 3V, VIN = 0V, IO = 30 mA
0.2
VCC = 3V, VIN = 1.7V, IO = –15 mA
0.2
VCC = 3V, VIN = 1.7V, IO = –15 mA
1
pF
Ω
Ω
W
1
dB
PRODUCT PREVIEW
12
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links :HD3SS2521
HD3SS2521
www.ti.com
SLAS941A – APRIL 2013 – REVISED MAY 2013
TEST TIMING DIAGRAMS
50%
HS_SEL_IN/SS_SEL_IN
90%
VOUT
10%
Toff
Ton
Figure 4. Select to Switch Ton and Toff
Vcc
50 Ω
Bx/Cx(p)
Ax(p)
HD3SS2521
50 Ω
50 Ω
PRODUCT PREVIEW
Ax(p)
Bx/Cx(p)
Bx/Cx(n)
Ax(n)
Ax(n)
Bx/Cx(n)
50 Ω
SEL
Cx/Bx (p)
50%
50%
Cx/Bx (n)
Ax (p)
50%
50%
Ax (n)
tP1
tP2
Inter-pair skew
t PD = Max(t p1, t p2)
t SK(O)
t1
= Difference between t PD for any
two pairs of outputs
t3
t2
t4
DCx/DBx/DAx (p)
50%
Cx/Bx/Ax (n)
Cx/Bx/Ax (p)
tSK(O)
Cx/Bx/Ax (n)
Intra-pair skew
t SK(b-b) = 0.5 X |(t 4 – t 3 ) + (t 1 – t 2 )|
NOTES:
1. Measurements based on an ideal input with zero intra-pair skew on
the input, i.e. the input at A to B/C or the input at B/C to A
2. Inter-pair skew is measured from lane to lane on the same channel,
e.g. C0 to C1
3. Intra-pair skew is defined as the relative difference from the p and n
signals of a single lane
Figure 5. Propagation Delay and Skew
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links :HD3SS2521
13
PACKAGE OPTION ADDENDUM
www.ti.com
29-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
HD3SS2521RHUR
ACTIVE
WQFN
RHU
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
0 to 70
HD3SS2521RHUT
PREVIEW
WQFN
RHU
56
250
TBD
Call TI
Call TI
0 to 70
HD3S2521
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Aug-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
HD3SS2521RHUR
Package Package Pins
Type Drawing
WQFN
RHU
56
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
5.3
B0
(mm)
K0
(mm)
P1
(mm)
11.3
1.0
8.0
W
Pin1
(mm) Quadrant
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Aug-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
HD3SS2521RHUR
WQFN
RHU
56
2000
367.0
367.0
45.0
Pack Materials-Page 2
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