Texas Instruments | DS90LV027 LVDS Dual High Speed Differential Driver (Rev. C) | Datasheet | Texas Instruments DS90LV027 LVDS Dual High Speed Differential Driver (Rev. C) Datasheet

Texas Instruments DS90LV027 LVDS Dual High Speed Differential Driver (Rev. C) Datasheet
DS90LV027
www.ti.com
SNLS003C – JUNE 1998 – REVISED APRIL 2013
DS90LV027 LVDS Dual High Speed Differential Driver
Check for Samples: DS90LV027
FEATURES
DESCRIPTION
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The DS90LV027 is a dual LVDS driver device
optimized for high data rate and low power
applications. The DS90LV027 is a current mode
driver allowing power dissipation to remain low even
at high frequency. In addition, the short circuit fault
current is also minimized. The device is in a 8-lead
SOIC package. The DS90LV027 has a flow-through
design for easy PCB layout. The differential driver
outputs provides low EMI with its low output swings
typically 340 mV. Perfect for high speed transfer of
clock and data. Pair with any of TI's LVDS receivers.
1
23
Ultra Low Power Dissipation
Operating Range above 155 Mbps
Flow-through pinout simplifies PCB layout
Conforms to TIA/EIA-644 Standard
8-Lead SOIC Package Saves Space
VCM ±1V center around 1.2V
Low Differential Output Swing Typical 340 mV
Power Off Protection (outputs in high
impedance)
Connection Diagram
Figure 1. Dual-In-Line
See Package Number D (R-PDSO-G8)
Functional Diagram
Truth Table (1)
Input/Output
(1)
DI
DO+
DO−
L
L
H
H
H
L
DI > 0.8V and DI < 2.0V
X
X
H = Logic high level
L = Logic low level
X = indeterminant
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TRI-STATE is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated
DS90LV027
SNLS003C – JUNE 1998 – REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)
−0.3V to +6V
Supply Voltage (VCC)
−0.3V to (VCC + 0.3V)
Input Voltage (DI)
−0.3V to +3.9V
Output Voltage (DO±)
Maximum Package Power Dissipation @ +25°C
D Package
1190 mW
Derate D Package
9.5 mW/°C above +25°C
−65°C to +150°C
Storage Temperature Range
Lead Temperature Range
Soldering (4 sec.)
ESD Rating
+260°C
(2)
≥ 4.5 kV
(HBM 1.5 kΩ, 100 pF)
(1)
(2)
“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. Electrical Characteristics specifies conditions of device operation.
ESD Rating: HBM (1.5 kΩ, 100 pF) ≥ 4.5 kV
Recommended Operating Conditions
Supply Voltage (VCC)
Temperature (TA)
Min
Typ
Max
3.0
3.3
3.6
Units
V
0
25
70
°C
Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
(1) (2) (3)
Pin
Min
Typ
Max
Units
DO+,
DO−
250
340
450
mV
10
35
mV
1.43
1.6
V
DIFFERENTIAL DRIVER CHARACTERISTICS
VOD
Output Differential Voltage
RL = 100Ω (Figure 2)
ΔVOD
VOD Magnitude Change
VOH
Output High Voltage
VOL
Output Low Voltage
0.9
1.09
VOS
Offset Voltage
0.9
1.25
1.6
V
ΔVOS
Offset Magnitude Change
0
5
25
mV
IOZD
TRI-STATE® Leakage
VOUT = VCC or GND
0
±1
±10
μA
IOXD
Power-off Leakage
VOUT = 3.6V or GND, VCC = 0V
0
±1
±10
μA
IOSD
Output Short Circuit Current
VIH
Input High Voltage
VIL
Input Low Voltage
IIH
Input High Current
VIN = 3.6V or 2.4V
IIL
Input Low Current
VIN = GND or 0.5V
VCL
Input Clamp Voltage
ICL = −18 mA
ICC
Power Supply Current
No Load
−4
DI
VIN = VCC or GND
(2)
(3)
2
VCC
V
−6
mA
2.0
VCC
V
GND
0.8
V
±1
±10
μA
±1
±10
μA
−1.5
RL = 100Ω
(1)
0
−0.8
V
1
4
mA
8
11
mA
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
except VOD.
All typicals are given for: VCC = +3.3V and TA = +25°C.
The DS90LV027 is a current mode device and only function with datasheet specification when a resistive load is applied to the drivers
outputs.
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS90LV027
DS90LV027
www.ti.com
SNLS003C – JUNE 1998 – REVISED APRIL 2013
Switching Characteristics
Over Supply Voltage and Operating Temperature Ranges, unless otherwise specified.
Symbol
Parameter
(1) (2)
Conditions
Min
Typ
Max
Units
1.5
3.4
6
ns
1.5
3.5
6
ns
DIFFERENTIAL DRIVER CHARACTERISTICS
tPHLD
Differential Propagation Delay High to Low
tPLHD
Differential Propagation Delay Low to High
tSKD
Differential Skew |tPHLD − tPLHD|
0
0.1
1.9
ns
tTLH
Transition Low to High Time
0
1
3
ns
tTHL
Transition High to Low Time
0
1
3
ns
(1)
(2)
RL = 100Ω, CL = 5 pF
(Figure 3 and Figure 4)
CL includes probe and fixture capacitance.
Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tr ≤ 6 ns, tf ≤ 6 ns (10%-90%).
PARAMETER MEASUREMENT INFORMATION
Figure 2. Differential Driver DC Test Circuit
Figure 3. Differential Driver Propagation Delay and Transition Time Test Circuit
Figure 4. Differential Driver Propagation Delay and Transition Time Waveforms
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS90LV027
3
DS90LV027
SNLS003C – JUNE 1998 – REVISED APRIL 2013
www.ti.com
APPLICATION INFORMATION
Table 1. Device Pin Descriptions
Pin #
Name
2, 3
DI
6, 7
DO+
Non-inverting driver output pin
5, 8
DO−
Inverting driver output pin
4
GND
Ground pin
1
4
VCC
Description
TTL/CMOS driver input pins
Positive power supply pin,
+3.3V ± 0.3V
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS90LV027
DS90LV027
www.ti.com
SNLS003C – JUNE 1998 – REVISED APRIL 2013
REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
•
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 4
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS90LV027
5
PACKAGE OPTION ADDENDUM
www.ti.com
7-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
DS90LV027M/NOPB
ACTIVE
SOIC
D
8
95
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
90LV
027M
DS90LV027MX/NOPB
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
0 to 70
90LV
027M
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
DS90LV027MX/NOPB
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.5
B0
(mm)
K0
(mm)
P1
(mm)
5.4
2.0
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DS90LV027MX/NOPB
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
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EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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