Texas Instruments | DS26LV32AQML 3V Enhanced CMOS Quad Differential Line Receiver (Rev. A) | Datasheet | Texas Instruments DS26LV32AQML 3V Enhanced CMOS Quad Differential Line Receiver (Rev. A) Datasheet

Texas Instruments DS26LV32AQML 3V Enhanced CMOS Quad Differential Line Receiver (Rev. A) Datasheet
DS26LV32AQML
www.ti.com
SNOSAS7A – MARCH 2006 – REVISED APRIL 2013
DS26LV32AQML 3V Enhanced CMOS Quad Differential Line Receiver
Check for Samples: DS26LV32AQML
FEATURES
DESCRIPTION
•
The DS26LV32A is a high speed quad differential
CMOS receiver that is comparable to TIA/EIA-422-B
and ITU-T V.11 standards, but with a specified
common mode voltage range of -0.5V to +5.5V due
to the lower operating supply voltage of 3.0V to 3.6V.
The TRI-STATE enables, EN and EN, allow the
device to be active High or active Low. The enables
are common to all four receivers. The receiver output
(RO) is specified to be High when the inputs are left
open. The receiver can detect signals as low as
±200mV over the common mode range of -0.5V to
+5.5V. The receiver outputs (RO) are compatible with
TTL and LVCMOS levels.
1
2
•
•
•
•
Comparable to Both TIA/EIA-422 and ITU-T
V.11 Standards
Low Power CMOS Design (30 mW typical)
Interoperable with Existing 5V RS-422
Networks
Receiver OPEN Input Failsafe Feature
Pin Compatible with DS26C32AT
Connection Diagram
Figure 1. CLGA Package- Top View
See Package Number NAD0016A
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated
DS26LV32AQML
SNOSAS7A – MARCH 2006 – REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
Supply Voltage (VCC)
7.0V
Common Mode Range (VCM)
±14V
Differential Input Voltage (VDiff)
±14V
Enable Input Voltage (VI)
-0.5V to VCC+0.5V
-65°C ≤ TA ≤ +150°C
Storage Temperature Range (TStg)
Lead Temperature (TL) Soldering, 4 seconds
Maximum Power Dissipation +25°C
260°C
(2)
1087mW
Thermal Resistance
(1)
(2)
θJA
138°C/W
θJC
13.5°C/W
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not verify specific performance limits. For verified specifications and test conditions, see the
Electrical Characteristics. The verified specifications apply only for the test conditions listed. Some performance characteristics may
degrade when the device is not operated under the listed test conditions.
Derate CERPAK 7.3mW/°C above +25°C.
Recommended Operating Conditions
Supply Voltage (vCC)
3.0V to 3.6V
−55°C ≤ TA ≤ +125°C
Operating Temperature Range (TA)
Table 1. Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A
2
Subgroup
Description
1
Static tests at
25
2
Static tests at
125
3
Static tests at
-55
4
Dynamic tests at
25
5
Dynamic tests at
125
6
Dynamic tests at
-55
7
Functional tests at
25
8A
Functional tests at
125
8B
Functional tests at
-55
9
Switching tests at
25
10
Switching tests at
125
11
Switching tests at
-55
12
Settling time at
25
13
Settling time at
125
14
Settling time at
-55
Submit Documentation Feedback
Temp °C
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: DS26LV32AQML
DS26LV32AQML
www.ti.com
SNOSAS7A – MARCH 2006 – REVISED APRIL 2013
DS26LV32AQML Electrical Characteristics DC Parameters
Parameter
VTh
RI
II
Test Conditions
Notes
Min
Max
Units
Subgroups
+200
mV
1, 2, 3
KΩ
1, 2, 3
Minimum Differential Input
Voltage
VCC = 3.0/3.6V,
VO = VOH or VOL,
-0.5V < VCM < +5.5V
-200
Input Resistance
VCC = 3.6V,
-0.5V < VCM < +5.5V,
One input AC Gnd
5.0
VCC = 3.6V, VI = +5.5V
Other Input = Gnd
0.0
+1.8
mA
1, 2, 3
VCC = 3.6V, VI = -0.5V
Other Input = Gnd
0.0
-1.8
mA
1, 2, 3
VCC = 0V, VI = +5.5V
Other Input = Gnd
0.0
+1.8
mA
1, 2, 3
VCC = 0V, VI = -0.5V
Other Input = Gnd
0.0
-1.8
mA
1, 2, 3
2.4
V
1, 2, 3
V
1, 2, 3
V
1, 2, 3
0.8
V
1, 2, 3
Input Current
VOH
Logical "1" Output Voltage
VCC = 3.0V, VDiff = +1V,
IO = -6.0mA
VOL
Logical "0" Output Voltage
VCC = 3.0V, VDiff = -1V,
IO = 6.0mA
0.5
VIH
Minimum Enable High Level
Voltage
(1)
VIL
Maximum Enable Low Level
Voltage
(1)
IOZ
Maximum TRI-STATE Output
Leakage Current
VCC = 3.6V, VO = VCC or Gnd
Enable = VIL, Enable = VIH
±50
µA
1, 2, 3
IEn
Maximum Enable Input Current
VCC = 3.6V, VI = VCC or Gnd
±1.0
µA
1, 2, 3
ICC
Quiescent Power Supply Current
VCC = 3.6V, No Load, En,
En = VCC or Gnd,
-0.5V<VCM<+5.5V
20
mA
1, 2, 3
-10
-70
mA
1, 2, 3
Min
Max
Units
Subgroups
IOS
(1)
(2)
Output Short Circuit Current
2.0
VCC = 3.0V/3.6V, VO = 0V,
VDiff = +1V
(2)
Parameter tested Go-No-Go only.
Short one output at a time to Gnd.
DS26LV32AQML Electrical Characteristics AC Parameters
The following conditions apply, unless otherwise specified.
AC:
VCC = 3.0/3.6V, CL = 50pF
Parameter
Test Conditions
Notes
Input to Output Propagation Delay VCM = 1.5V
(1)
6.0
45
nS
9, 10, 11
tPHL
Input to Output Propagation Delay VCM = 1.5V
(1)
6.0
45
nS
9, 10, 11
tSK1
Skew tpHLD-tpLHD (same
channel)
6.0
nS
9, 10, 11
tSK2
Pin to Pin Skew (Same device)
6.0
nS
9, 10, 11
tPLZ
Output Disable Time
2KΩ to VCC
(2)
50
nS
9, 10, 11
tPZL
Output Enable Time
2KΩ to VCC
(2)
50
nS
9, 10, 11
tPHZ
Output Disable Time
2KΩ to Gnd
(2)
50
nS
9, 10, 11
2KΩ to Gnd
(2)
50
nS
9, 10, 11
tPLH
tPZH
(1)
(2)
Output Enable Time
Generator waveform is specified as follows: ƒ = 1MHz, Duty Cycle = 50%, ZO = 50Ω, tR = tF ≤ 6nS. Receiver inputs = 1V to 2V with
measure points equal to 1.5V on the inputs to 1/2 VCC on the outputs.
Generator waveform is specified as follows: ƒ = 1MHz, Duty Cycle = 50%, ZO = 50Ω, tR = tF ≤ 6nS. En/En inputs = 0V to 3V with
measure points equal to 1.5V on the inputs, to 1/2 VCC on the outputs for ZL and ZH, and (VOL + 0.3V) for LZ, and (VOH.- 0.3V) for HZ.
Submit Documentation Feedback
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: DS26LV32AQML
3
DS26LV32AQML
SNOSAS7A – MARCH 2006 – REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Released
4
Revision
3/01/06
*
4/15/2013
A
Section
New Release, Corporate format
Originator
L. Lytle
TIS
Submit Documentation Feedback
Changes
1 MDS data sheet converted into one Corp.
data sheet format. MNDS26LV32A-X Rev 0A0
will be archived.
Changed layout of National Data Sheet to TI
format
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: DS26LV32AQML
PACKAGE OPTION ADDENDUM
www.ti.com
25-Oct-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9858501QFA
ACTIVE
CFP
NAD
16
19
TBD
Call TI
Call TI
-55 to 125
DS26LV32AWQML Q
5962-98585
01QFA ACO
01QFA >T
DS26LV32AW-QML
ACTIVE
CFP
NAD
16
19
TBD
Call TI
Call TI
-55 to 125
DS26LV32AWQML Q
5962-98585
01QFA ACO
01QFA >T
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Oct-2016
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
NAD0016A
W16A (Rev T)
www.ti.com
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