Texas Instruments | DS16F95, DS36F95 EIA-485/EIA-422A Differential Bus Transceiver (Rev. D) | Datasheet | Texas Instruments DS16F95, DS36F95 EIA-485/EIA-422A Differential Bus Transceiver (Rev. D) Datasheet

Texas Instruments DS16F95, DS36F95 EIA-485/EIA-422A Differential Bus Transceiver (Rev. D) Datasheet
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DS16F95, DS36F95 EIA-485/EIA-422A Differential Bus Transceiver
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FEATURES
DESCRIPTION
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The DS16F95/DS36F95 Differential Bus Transceiver
is a monolithic integrated circuit designed for
bidirectional data communication on balanced
multipoint bus transmission lines. The transceiver
meets both EIA-485 and EIA-422A standards.
1
2
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•
•
•
•
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Meets EIA-485 and EIA-422A
Meets SCSI-1 (5 MHZ) Specifications
Designed for Multipoint Transmission
Wide Positive and Negative Input/Output Bus
Voltage Ranges
Thermal Shutdown Protection
Driver Positive and Negative Current-Limiting
High Impedance Receiver Input
Receiver Input Hysteresis of 50 mV Typical
Operates from Single 5.0V Supply
Reduced Power Consumption
Pin Compatible with DS3695 and SN75176A
Military Temperature Range Available
Qualified for MIL-STD 883C
Standard Military Drawings (SMD) Available
Available in 8-Pin CDIP (NAB0008A) or SOIC
(D) Package
The DS16F95/DS36F95 offers improved performance
due to the use of L-FAST bipolar technology. The LFAST technology allows for higher speeds and lower
currents by minimizing gate delay times. Thus, the
DS16F95 and DS36F95 consume less power, and
feature an extended temperature range as well as
improved specifications.
The DS16F95/DS36F95 combines a Tri-state
differential line driver and a differential input line
receiver, both of which operate from a single 5.0V
power supply. The driver and receiver have an active
Enable that can be externally connected to function
as a direction control. The driver differential outputs
and the receiver differential inputs are internally
connected to form differential input/output (I/O) bus
ports that are designed to offer minimum loading to
the bus whenever the driver is disabled or when VCC
= 0V. These ports feature wide positive and negative
common mode voltage ranges, making the device
suitable for multipoint applications in noisy
environments.
The driver is designed to accommodate loads of up to
60 mA of sink or source current and features positive
and negative current limiting in addition to thermal
shutdown for protection from line fault conditions.
The DS16F95/DS36F95 can be used in transmission
line applications employing the DS96F172 and the
DS96F174 quad differential line drivers and the
DS96F173 and DS96F175 quad differential line
receivers.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated
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Logic Diagram
Function Tables
Table 1. Driver (1)
(1)
Driver Input
Enable
Outputs
DI
DE
A
H
H
H
L
L
H
L
H
X
L
Z
Z
B
H = High Level
L = Low Level
X = Immaterial
Z = High Impedance (Off)
Table 2. Receiver (1)
(1)
2
Differential Inputs
Enable
Output
A–B
RE
RO
VID ≥ 0.2V
L
H
VID ≤ −0.2V
L
L
X
H
Z
H = High Level
L = Low Level
X = Immaterial
Z = High Impedance (Off)
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
−65°C to +175°C
Storage Temperature Range
Lead Temperature (Soldering, 60 sec.)
300°C
Maximum Package Power Dissipation (3) at 25°C
CDIP Package
1300 mW
SOIC Package
735 mW
Supply Voltage
7.0V
Input Voltage (Bus Terminal)
+15V/−10V
Enable Input Voltage
(1)
(2)
(3)
5.5V
Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that
the devices should be operated at these limits. The tables of Electrical Characteristics provide conditions for actual device operation.
Specifications for the 883 version of this product are listed separately on the following pages.
Derate CDIP package 8.7 mW/°C above 25°C.Derate SOIC package 5.88 mW/°C above 25°C.
Recommended Operating Conditions
Supply Voltage (VCC)
Min
Typ
Max
Units
DS36F95
4.75
5.0
5.25
V
DS16F95
4.50
5.0
5.50
V
+12
V
Voltage at Any Bus Terminal (Separately or Common Mode) (VI or VCM)
−7.0
Differential Input Voltage (VID)
Output Current HIGH (IOH)
Output Current LOW (IOL)
Operating Temperature (TA)
±12
V
Driver
−60
mA
Receiver
−400
μA
Driver
60
mA
Receiver
16
mA
DS36F95
0
+25
+70
°C
DS16F95
−55
+25
+125
°C
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Driver Electrical Characteristics (1) (2)
Over recommended supply voltage and operating temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
VIH
Input Voltage HIGH
VIL
Input Voltage LOW
VOH
Output Voltage HIGH
IOH = −55 mA
0°C to +70°C
VOL
Output Voltage LOW
IOL = 55 mA
0°C to +70°C
VIC
Input Clamp Voltage
|VOD1|
Differential Output Voltage
|VOD2|
Differential Output Voltage
RL = 100Ω, See Figure 1
2.0
2.25
RL = 54Ω,See Figure 1
1.5
2.0
Δ|VOD|
Max
2.0
V
0.8
Change in Magnitude of Differential
Output Voltage (3)
Units
3.0
V
V
2.0
V
II = −18 mA
−1.3
V
IO = 0 mA
6.0
V
RL = 54Ω or 100Ω, See −40°C to +125°C
Figure 1
−55°C to +125°C
V
±0.2
V
±0.4
VOC
Common Mode Output Voltage (4)
3.0
V
Δ|VOC|
Change in Magnitude of Common
Mode Output Voltage (3)
±0.2
V
IO
Output Current (5) (Includes
Receiver II)
Output Disabled
IIH
Input Current HIGH
VI = 2.4V
20
μA
IIL
Input Current LOW
VI = 0.4V
−50
μA
VO = −7.0V
−250
VO = 0V
−150
VO = VCC
150
VO = +12V
250
IOS
Short Circuit Output Current
ICC
Supply Current (Total Package)
ICCX
(1)
(2)
(3)
(4)
(5)
(6)
4
(6)
No Load, All Inputs
Open
VO = +12V
1.0
VO = −7.0V
−0.8
DE = 2V, RE = 0.8V
Outputs Enabled
28
DE = 0.8V, RE = 2V
Outputs Disabled
25
mA
mA
mA
Unless otherwise specified min/max limits apply across the −55°C to +125°C temperature range for the DS16F95 and across the 0°C to
+70°C range for the DS36F95. All typicals are given for VCC = 5V and TA = 25°C.
All currents into the device pins are positive; all currents out of the device pins are negative. All voltages are referenced to ground
unless otherwise specified.
Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level
to a low level.
In TIA/EIA-422A and TIA/EIA-485 Standards, VOC, which is the average of the two output voltages with respect to ground, is called
output offset voltage, VOS.
Refer to TIA/EIA-485 Standard for exact conditions.
Only one output at a time should be shorted.
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Driver Switching Characteristics
VCC = 5.0V, TA = 25°C
Symbol
Parameter
Conditions
RL = 60Ω, See Figure 2
Min
Typ
Max
Units
8.0
15
20
ns
8.0
15
22
ns
6.0
12
16
ns
6.0
12
16
ns
tDD
Differential Output Delay Time
tTD
Differential Output Transition Time
tPLH
Propagation Delay Time, Low-to-High Level
Output
tPHL
Propagation Delay Time, High-to-Low Level
Output
tZH
Output Enable Time to High Level
RL = 110Ω, See Figure 5
25
32
ns
tZL
Output Enable Time to Low Level
RL = 110Ω, See Figure 6
25
32
ns
tHZ
Output Disable Time from High Level
RL = 110Ω, See Figure 5
20
25
ns
tLZ
Output Disable Time from Low Level
RL = 110Ω, See Figure 6
20
25
ns
tLZL
Output Disable Time from Low Level with Load
Resistor to GND
Load per Figure 5 Timing per
Figure 6
300
tSKEW
Skew (Pulse Width Distortion)
RL = 60Ω, See Figure 2
1.0
RL = 27Ω, See Figure 4
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ns
4.0
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ns
5
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Receiver Electrical Characteristics
Over recommended supply voltage and operating temperature ranges, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.2
V
VTH
Differential Input High Threshold
Voltage
VO = 2.7V, IO = −0.4 mA
VTL
Differential Input Low Threshold
Voltage See (1)
VO = 0.5V, IO = 8.0 mA
VT+−VT−
Hysteresis See
VIH
Enable Input Voltage HIGH
VIL
Enable Input Voltage LOW
VIC
Enable Input Clamp Voltage
II = −18 mA
VOH
Output Voltage HIGH
VID = 200 mV,
0°C to +70°C
2.8
IOH = −400 μA, See
Figure 2
−55°C to +125°C
2.5
VID = −200 mV, See
Figure 2
IOL = 8.0 mA
0.45
IOL = 16 mA
0.50
VOL
IOZ
II
(2)
VCM = 0V
Output Voltage LOW
High Impedance State Output
Line Input Current See
−0.2
(3)
35
V
50
mV
2.0
V
V
−1.3
V
V
VO = 0.4V to 2.4V
Other Input = 0V
0.8
±20
VI = +12V
1.0
VI = −7.0V
0.8
V
μA
mA
IIH
Enable Input Current HIGH
VIH = 2.7V
20
μA
IIL
Enable Input Current LOW
VIL = 0.4V
−50
μA
RI
Input Resistance
IOS
Short Circuit Output Current
See
ICC
Supply Current (Total Package)
No Load, All Inputs
Open
ICCX
(1)
(2)
(3)
6
14
(3)
−15
18
22
kΩ
−85
mA
DE = 2V, RE = 0.8V
Outputs Enabled
28
DE = 0.8V, RE = 2V
Outputs Disabled
25
mA
The algebraic convention, where the less positive (more negative) limit is designated minimum, is used in this data sheet for common
mode input voltage and threshold voltage levels only.
Hysteresis is the difference between the positive-going input threshold voltage, VT+, and the negative-going input threshold voltage, VT−.
Refer to TIA/EIA-485 Standard for exact conditions.
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Receiver Switching Characteristics
VCC = 5.0V, TA = 25°C
Symbol
tPLH
Parameter
Propagation Delay Time, Low-to-High Level
Output
tPHL
Propagation Delay Time, High-to-Low Level
Output
tZH
Output Enable Time to High Level
tZL
Output Enable Time to Low Level
tHZ
Output Disable Time from High Level
tLZ
Output Disable Time from Low Level
|tPLH−tPHL|
Pulse Width Distortion (SKEW)
Conditions
Min
Typ
Max
Units
VID = 0V to +3.0VCL = 15 pF,
See Figure 7
14
19
24
ns
14
19
24
ns
10
16
ns
12
18
ns
CL = 5.0 pF, See Figure 8
12
20
ns
12
18
ns
See Figure 7
1.0
4.0
ns
CL = 15 pF, See Figure 8
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Parameter Measurement Information
Figure 1. Driver VOD and VOC (1)
Figure 2. Receiver VOH and VOL
(1)
8
All diodes are 1N916 or equivalent.
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tSKEW = |tPLHD–tPHLD|
Figure 3. Driver Differential Output Delay and Transition Times (2) (3)
(2)
(3)
The input pulse is supplied by a generator having the following characteristics: PRR = 1.0 MHz, 50% duty cycle, tr ≤ 6.0 ns, tf ≤ 6.0 ns,
ZO = 50Ω.
DS16F95/DS36F95 Driver enable is Active-High
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Figure 4. Driver Propagation Times (2) (4)
Figure 5. Driver Enable and Disable Times (tZH, tHZ) (2) (4) (3)
Figure 6. Driver Enable and Disable Times (tZL, tLZ, tLZL)
(4)
(5)
(6)
(7)
10
(5) (6) (7)
CL includes probe and stray capacitance
The input pulse is supplied by a generator having the following characteristics: PRR = 1.0 MHz, 50% duty cycle, tr ≤ 6.0 ns, tf ≤ 6.0 ns,
ZO = 50Ω.
CL includes probe and stray capacitance
DS16F95/DS36F95 Driver enable is Active-High
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Figure 7. Receiver Propagation Delay Times (5) (6)
Figure 8. Receiver Enable and Disable Times (8) (9) (10)
The input pulse is supplied by a generator having the following characteristics: PRR = 1.0 MHz, 50% duty cycle, tr ≤ 6.0 ns, tf ≤ 6.0 ns,
ZO = 50Ω.
(9) CL includes probe and stray capacitance
(10) All diodes are 1N916 or equivalent.
(8)
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Typical Application
NOTE
The line should be terminated at both ends in its characteristic impedance, typically 120Ω.
Stub lengths off the main line should be kept as short as possible.
Connection Diagram
8-Lead Dual-In-Line Package or Small Outline Molded Package
See Package Number J08A, or M08
12
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REVISION HISTORY
Changes from Revision C (April 2013) to Revision D
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 12
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PACKAGE OPTION ADDENDUM
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19-Jul-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
DS16F95 MDA
ACTIVE
Package Type Package Pins Package
Drawing
Qty
DIESALE
Y
0
221
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Green (RoHS
& no Sb/Br)
Call TI
Level-1-NA-UNLIM
Op Temp (°C)
Device Marking
(4/5)
-40 to 85
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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Addendum-Page 2
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