Texas Instruments | SP3T SWITCH WITH IMPEDANCE DETECTION | Datasheet | Texas Instruments SP3T SWITCH WITH IMPEDANCE DETECTION Datasheet

Texas Instruments SP3T SWITCH WITH IMPEDANCE DETECTION Datasheet
TSU5511
www.ti.com
SCDS304 – FEBRUARY 2011
SP3T SWITCH WITH IMPEDANCE DETECTION
MICRO-USB SWITCH TO SUPPORT USB, UART, AUDIO, AND CHARGER
Check for Samples: TSU5511
FEATURES
•
1
•
•
•
•
•
•
•
Compatible Accessories
– USB Data Cable
– UART Cable
– Charger (Dedicated Charger or Host/Hub
Charger)
– Stereo Headset With Mic
Integrated LDOs for VREF and Mic Bias
USB Path Supports USB 2.0 High Speed
Audio Path Provides Negative Rail Support
and Click/Pop Reduction
Supports Factory Test Mode
1.8-V Compatible I2C Interface
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
ESD Performance DP/DM/ID/VBUS to GND
– ±8-kV Contact Discharge (IEC 61000-4-2)
– ±15-kV Air Gap Discharge (IEC 61000-4-2)
APPLICATIONS
•
Cellular Telephones
YZP PACKAGE
(LASER SCRIBE VIEW)
A
B
C
D
E
4
3
2
1
PIN ASSIGNMENTS
A
B
C
D
E
4
MIC
3
R2.2K
ISET
UART_TX
USB_DM
USB_DP
INT
UART_RX
ID
2
DP
SDA
SCL
DSS
GND
DM
1
CLDO
VSUPPLY
AUDIO_R
AUDIO_L
VBUS
DESCRIPTION
The TSU5511 is designed to interface the cell phone UART, USB, and audio chips with external peripherals via a
micro-USB connector. The switch features impedance detection for identification of various accessories that are
attached through DP and DM of the micro-USB port. When an accessory is plugged into the micro-USB port, the
switch uses a detection mechanism to identify the accessory (see State Machine for details). It will then switch to
the appropriate channel—data, audio, or UART.
The TSU5511 has an I2C interface for communication with the cellphone baseband or applications processor. An
interrupt is generated when anything plugged into the micro-USB is detected. Another interrupt is generated
when the device is unplugged.
Table 1. ORDERING INFORMATION
TA
–40°C to 85°C
(1)
(2)
PACKAGE
WCSP – YZP
(0.5-mm pitch)
(1) (2)
Tape and reel
ORDERABLE PART NUMBER
TSU5511YZPR
TOP-SIDE MARKING
A62
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
TSU5511
SCDS304 – FEBRUARY 2011
www.ti.com
Table 2. SUMMARY OF TYPICAL CHARACTERISTICS
TA = 25°C
USB PATH
UART PATH
AUDIO PATH
MIC PATH
2
2
2
1
4.5 Ω
37 Ω
3.8 Ω
9Ω
1Ω
2Ω
1Ω
N/A
ON-state resistance flatness (rON(flat))
0.5 Ω
20 Ω
0.1 Ω
0.5 Ω
Turn-on/turn-off time (tON/tOFF)
1 ms
1 ms
1 ms
1 ms
573 MHz
Number of switches
ON-state resistance (rON)
ON-state resistance match (ΔrON)
Bandwidth (BW)
830 MHz
295 MHz
788 MHz
OFF isolation (OISO)
–20 dB
-100 dB
–100 dB
–37 dB
Crosstalk (XTALK)
–42 dB
-98 dB
–120 dB
–125 dB
N/A
N/A
0.087%
0.07%
25 nA
100 nA
25 nA
5 nA
Total harmonic distortion (THD)
Leakage current (INO(OFF)/INC(OFF))
Package options
YZP package, 0.5-mm pitch
BLOCK DIAGRAM
VSUPPLY
UART_TX
UART
USB
UART_ RX
Supply
Detect
Switch
Matrix
VBUS
0.6V
3.5 V
USB_DM
_
DM
USB_DP
DP
Micro
USB
ID
AUDIO_L
AUDIO
AUDIO_R
MIC
75 mA
Negative
Rail and
Click/Pop
Free
200 kW
INT
Logic
& I2C
SDA
DP/ DM
Comparators
2.3, 2.6V
10nF
ADC
SCL
GND
2
2.21kW
LDO
...
Processor
680 W
ISET
DSS
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Noise Filter Cap
= pin on MUIC1
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SCDS304 – FEBRUARY 2011
SWITCH MATRIX BLOCK DIAGRAM
UART _RX
VBUS
UART _TX
DUSB_DM
D+
USB _DP
ID
AUDIO _L
AUDIO _R
MIC
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TERMINAL FUNCTIONS
TERMINAL
4
NAME
NO.
TYPE
DESCRIPTION
AUDIO_L
D1
I/O
Stereo audio left channel
AUDIO_R
C1
I/O
Stereo audio right channel
CLDO
A1
O
Capacitor connection for LDO noise filtering
DM
E2
I/O
Common I/O port for USB, UART, Audio. Connected to USB receptacle.
DP
E3
I/O
Common I/O port for USB, UART, Audio. Connected to USB receptacle.
DSS
C2
I
GND
D2
GND
ID
D3
I/O
Common I/O port for microphone, ID detection
INT
B3
O
Open-drain interrupt output. Connect an external pullup resistor.
ISET
B4
O
Output to charger for high-current charging mode. Open-drain output.
MIC
A4
I/O
Microphone signal
R2.2K
A3
I
2.21 kΩ connection for microphone bias
SCL
B2
I
I2C clock input. Connect an external pullup resistor.
SDA
A2
I/O
I2C data. Connect an external pullup resistor.
UART_RX
C3
I/O
UART receive data
UART_TX
C4
I/O
UART transmit data
USB_DM
D4
I/O
USB D– connected to host
USB_DP
E4
I/O
USB D+ connected to host
VBUS
E1
I
VBUS power supply from USB receptacle
VSUPPLY
B1
I
2.8-V to 4.4-V battery supply voltage
Pulldown or pullup resistor connection to determine default switch
Ground
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ABSOLUTE MAXIMUM RATINGS (1)
(2)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VBUS
Supply voltage from USB connector
–0.5
28
V
VSUPPLY
Supply voltage from battery
–0.5
6
V
VUSBIO
USB switch
–0.5
VSUPPLY+0.5
V
VUARTIO
UART switch
–0.5
VSUPPLY+0.5
V
Audio switch
–1.5
VSUPPLY+0.5
Mic switch
–0.5
VSUPPLY+0.5
DSS, SCL, SDA
–0.5
VSUPPLY+0.5
VAUDIO
Switch I/O voltage range
VMICIO
V
VLOGICIO
Logic input, output and I/O voltage ranges
IBUS
Input current on VBUS pin
100
mA
ISUPPLY
Input current on VSUPPLY pin
100
mA
IGND
Continuous current through GND
100
mA
IK
Analog port diode current
–50
50
mA
ISW-DC
ON-state continuous switch current
–60
60
mA
ISW-PEAK
ON-state peak switch current
–150
150
mA
IIK
Digital logic input clamp current
–50
mA
ILOGIC_O
Continuous current through logic output
50
mA
Tstg
Storage temperature range
150
°C
(1)
(2)
VL < 0
–65
V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
THERMAL IMPEDANCE RATINGS
UNIT
θJA
Package thermal impedance
YZP package
75.5
°C/W
UNIT
RECOMMENDED OPERATING CONDITIONS
VBUS
Supply voltage from USB connector
VSUPPLY
Supply voltage from battery
MIN
MAX
4.35
6.7
V
2.8
4.4
V
VUSBIO
USB switch
0
3.6
VUARTIO
UART switch
0
VSUPPLY
Audio switch
–1.3
1.3
VAUDIO
Switch I/O voltage range
VMICIO
VLOGICIO
Logic input, output and I/O voltage ranges
ISW-DC
ON-state continuous switch current
ISWPEAK
ON-state peak switch current
TA
Ambient temperature
Mic switch
0
2.3
DSS, SCL, SDA
0
VSUPPLY
V
V
mA
mA
–40
85
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ELECTRICAL CHARACTERISTICS
TA = –40°C to 85°C, typical values are at VSUPPLY = 3.6 V, VBUS = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
VSUPPLY supply current
SYMBOL
VSUPPLY = 4.2 V, VBUS = 0 V,
ADC_EN = 0,
IVSUPPLY
VBUS supply current
VBUS detect threshold
TEST CONDITIONS
VSUPPLY = 3.6 V, VBUS = 5 V,
ADC_EN = 0,
IVBUS
VBUSDET
MIN
TYP
MAX
CP_EN = 0, SEMREN
=0
6
10
CP_EN = 0, SEMREN
=1
6
10
CP_EN = 1, SEMREN
=1
60
70
CP_EN = 0, SEMREN
=0
45
60
CP_EN = 0, SEMREN
=1
45
60
CP_EN = 1, SEMREN
=1
80
98
3.5
4
VBUS = 0 to 5 V, read the INT
3
LDO voltage = 2.6 V
2.2
LDO voltage = 2.3 V
1.95
Microphone removal
threshold
VMRCOMP
Ramp ID down, read the INT
SEND/END threshold
VSECOMP
LDO voltage = 2.3 or 2.6 V, ramp ID up from 0 V, read the
INT
UNIT
μA
μA
V
V
0.15
V
ID resistance 1
RID1
ID_200 = 1, VSUPPLY = 3.6 V
160
200
240
kΩ
ID resistance 2
RID2
ID_620 = 1, VSUPPLY = 3.6 V
496
620
744
Ω
LDO ELECTRICAL CHARACTERISTICS
TA = –40°C to 85°C, typical values are at VSUPPLY = 3.6 V, VBUS = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
Input voltage
Output voltage
Max output current
Power supply
rejection
Integrated output
noise
SYMBOL
MIN
TYP
MAX
VBUS
4.35
5
6.7
VSUPPLY
2.8
VOUT-26
VOUT-23
IO-26
IO-23
PSR217
TEST CONDITIONS
IO = 0 mA
4.4
2.54
2.6
2.65
2.2
2.3
2.35
10
Measured at R2.2K pin
500
UNIT
V
V
μA
f = 217 Hz
–50
dB
PSR1k
VOUT = 2.3 V, VSUPPLY = 3.2 V, IO =
150 to 450 μA,
f = 1 kHz
–42
dB
en-OUT
VOUT = 2.3 V, VSUPPLY = 3.2 V, IO =
150 to 450 μA,
f = 20 Hz to 20 kHz
(A-weighted)
1
50
μV
Rise time 1
tr1
IO = 20 μA, R2.2K = 0 to 2.6 V
178
ms
Rise time 2
tr2
IO = 20 μA, R2.2K = 2.3 to 2.6 V
260
ms
Fall time
tf
IO = 0 μA, R2.2K = 2.6 to 2.3 V
2.5
ms
6
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SCDS304 – FEBRUARY 2011
USB SWITCH ELECTRICAL CHARACTERISTICS FOR 2.8 V to 4.4 V SUPPLY
TA = –40°C to 85°C, typical values are at VSUPPLY = 3.6 V, VBUS = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal range
VUSBIO
0
VI = 0 V to 3.6 V,
IO = –2 mA,
VSUPPLY = 3.0 V,
CP_EN = 1, Switch ON
VI = 0.4 V, IO = –2 mA,
VSUPPLY = 3.0 V,
CP_EN = 1, Switch ON
ON-state resistance
rON
ON-state resistance
match between
channels
ΔrON
ON-state resistance
flatness
rON(flat)
VI = 0 V to 3.6 V,
IO = –2 mA, VSUPPLY = 3.0 V
CP_EN = 1, Switch ON
VI or VO OFF leakage
current (1)
IIO(OFF)
VI = 0.3 V, VO = 2.5 V
or
VI = 2.5 V, VO = 0.3 V,
VSUPPLY = 4.4 V,
Switch OFF
IIO(ON)
VI = OPEN, VO = 0.3 V or
2.5 V,
VSUPPLY = 4.4 V,
CP_EN = 1, Switch ON
VO ON leakage current
(1)
3.6
V
4.5
10
Ω
1
1.5
Ω
0.5
1
Ω
25
360
nA
10
360
nA
Dynamic
tON
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF
CP_EN = 1
Turn-ON time
tOFF
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF,
CP_EN = 0
Turn-OFF time
(1)
CI(OFF)
DC bias = 0 V or 3.6 V
f = 10 MHz,
CP_EN = 0, Switch OFF
VO OFF capacitance (1)
CO(OFF)
DC bias = 0 V or 3.6 V
f = 10 MHz,
CP_EN = 0, Switch OFF
VI, VO ON capacitance
CI(ON),
CO(ON)
DC bias = 0 V or 3.6 V
f = 10 MHz,
CP_EN = 1, Switch ON
BW
RL = 50 Ω,
CP_EN = 1, Switch ON
OFF Isolation
OISO
f = 240 MHz, RL = 50 Ω,
CL = 20 pF,
CP_EN = 0, Switch OFF
Crosstalk
XTALK
f = 240 MHz, RL = 50 Ω,
CL = 20 pF,
CP_EN = 1, Switch ON
VI OFF capacitance
(1)
Bandwidth
(1)
From receipt of I2C
ACK bit
From receipt of I2C
ACK bit
1
ms
1
ms
6.5
pF
3
pF
9
pF
830
MHz
–20
dB
–42
dB
VI = voltage asserted on DP and DM pins. VO = voltage asserted on USB_DP and USB_DM pins. IO = current on the USB_DP or
USB_DM pins.
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UART SWITCH ELECTRICAL CHARACTERISTICS FOR 2.8 V to 4.4 V SUPPLY
TA = –40°C to 85°C, typical values are at VSUPPLY = 3.6 V, VBUS = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal range
VUARTIO
0
VI = 0 V to 2.8 V,
IO = –2 mA,
VSUPPLY = 2.8 V,
CP_EN = 1, Switch ON
VI = 0.4 V, IO = –2 mA,
VSUPPLY = 2.8 V,
Switch ON
ON-state resistance
rON
ON-state resistance
match between
channels
ΔrON
ON-state resistance
flatness
rON(flat)
VI = 0 V to 2.8 V,
IO = –2 mA, VSUPPLY = 2.8 V
Switch ON
VI or VO OFF leakage
current (1)
IIO(OFF)
VI = 0.3 V, VO = 3.3 V
or
VI = 3.3 V, VO = 0.3 V,
VSUPPLY = 3.6 V,
Switch OFF
IIO(ON)
VI = OPEN, VO = 0.3 V or
3.3 V,
VSUPPLY = 3.6 V,
CP_EN = 1, Switch ON
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF
From receipt of I2C
ACK bit
VO ON leakage current
(1)
VSUPPLY
V
37
61
Ω
2
3.5
Ω
20
27
Ω
100
360
nA
100
360
nA
Dynamic
Turn-ON time
tON
Turn-OFF time
tOFF
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF
From receipt of I C
ACK bit
(1)
CI(OFF)
DC bias = 0 V or VSUPPLY,
f = 10 MHz,
Switch OFF
VO OFF capacitance (1)
CO(OFF)
DC bias = 0 V or VSUPPLY,
f = 10 MHz,
Switch OFF
VI, VO ON capacitance
CI(ON),
CO(ON)
DC bias = 0 V or VSUPPLY,
f = 10 MHz,
Switch ON
VI OFF capacitance
(1)
Bandwidth
BW
RL = 50 Ω,
Switch ON
OFF Isolation
OISO
f = 250 kHz, RL = 50 Ω,
CL = 20 pF,
Switch OFF
Crosstalk
XTALK
f = 250 kMHz, RL = 50 Ω,
CL = 20 pF,
Switch ON
(1)
8
1
ms
1
ms
6.5
pF
8
pF
22
pF
295
MHz
–100
dB
–98
dB
2
VI = voltage asserted on DP and DM pins. VO = voltage asserted on UART_RX and UART_TX pins. IO = current on the UART_RX and
UART_TX pins.
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AUDIO SWITCH ELECTRICAL CHARACTERISTICS FOR 2.8 V to 4.4 V SUPPLY
TA = –40°C to 85°C, typical values are at VSUPPLY = 3.6 V, VBUS = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal range
VAUDIOIO
–1.3
V
3.8
6
Ω
ON-state resistance
rON
ON-state resistance
match between
channels
ΔrON
VI = 1.3 V, IO = –20 mA,
VSUPPLY = 2.8 V,
AUDIO_L or
AUDIO R,
DM or DP
1
1.3
Ω
ON-state resistance
flatness
rON(flat)
VI = ±1.3 V, IO = –20 mA,
VSUPPLY = 2.8 V,
AUDIO_L or
AUDIO R,
DM or DP
0.1
0.25
Ω
VI or VO OFF leakage
current (1)
VI = 0 V, VO = 1.3 V
or
VI = 1.3 V, VO = 0.3 V,
Switch OFF
IIO(OFF)
25
400
nA
IIO(ON)
VI = OPEN, VO = ±1.3 V,
VSUPPLY = 4.4 V,
Switch ON
25
400
nA
VO ON leakage current
(1)
AUDIO_L or
AUDIO R,
DM or DP
1.3
VI = ±1.3 V, IO = –20 mA,
VSUPPLY = 2.8 V,
Dynamic
Turn-ON time
tON
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF
From receipt of I2C
ACK bit
1
ms
Turn-OFF time
tOFF
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF
From receipt of I2C
ACK bit
1
ms
(1)
CI(OFF)
DC bias = 0 V or 2.6 V,
f = 10 MHz,
Switch OFF
4.5
pF
VO OFF capacitance (1)
CO(OFF)
DC bias = 0 V or 2.6 V ,
f = 10 MHz,
Switch OFF
6.5
pF
VI, VO ON capacitance
CI(ON),
CO(ON)
DC bias = 0 V or 2.6 V,
f = 10 MHz,
Switch ON
9
pF
VI OFF capacitance
(1)
Bandwidth
BW
RL = 50 Ω,
Switch ON
788
MHz
OFF Isolation
OISO
f = 20 kHz, RL = 50 Ω,
Switch OFF
–100
dB
Crosstalk
XTALK
f = 20 kHz, RL = 50 Ω,
Switch ON
–120
dB
THD
RL = 16 Ω, CL = 20 pF,
f = 20 Hz to 20 kHz,
2.6 Vpp
0.087
Total harmonic
distortion
(1)
0.12
%
VO = voltage asserted on DP and DM pins. VI = voltage asserted on AUDIO_R and AUDIO_L pins. IO = current on the DP and DM pins.
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MIC SWITCH ELECTRICAL CHARACTERISTICS FOR 2.8 V to 4.4 V SUPPLY
TA = –40°C to 85°C, typical values are at VSUPPLY = 3.6 V, VBUS = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal range
VMICIO
0
ON-state resistance
rON
VI = 2.3 V, IO = –2 mA,
VSUPPLY = 2.8 V,
ON-state resistance
flatness
rON(flat)
VI = 2.3 V , IO = –2 mA,
VSUPPLY = 2.8 V
MIC ID
Switch OFF
IIO(OFF)
VI = 0.3 V, VO = 2.3 V
or
VI = 2.3 V, VO = 0.3 V,
VSUPPLY = 4.4 V
VI = OPEN
VO = 0.3 V or 2.5 V
VSUPPLY = 4.4 V
Switch ON
IIO(ON)
VI or VO OFF leakage
current (1)
VO ON leakage current
(1)
MIC ID
2.3
V
9
12
Ω
0.5
1
Ω
5
200
nA
2
200
nA
Dynamic
Turn-ON time
tON
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF
From receipt of I2C
ACK bit
1
ms
Turn-OFF time
tOFF
VI or VO = VSUPPLY,
RL = 50 Ω, CL = 35 pF
From receipt of I2C
ACK bit
1
ms
(1)
CI(OFF)
DC bias = 0 V or 3.6 V,
f = 10 MHz,
Switch OFF
6
pF
VO OFF capacitance (1)
CO(OFF)
DC bias = 0 V or 3.6 V ,
f = 10 MHz,
Switch OFF
6
pF
VI, VO ON capacitance
CI(ON),
CO(ON)
DC bias = 0 V or 3.6 V,
f = 10 MHz,
Switch ON
12
pF
VI OFF capacitance
(1)
Bandwidth
BW
RL = 50 Ω,
Switch ON
573
MHz
OFF Isolation
OISO
f = 20 kHz, RL = 50 Ω,
Switch OFF
–37
dB
Crosstalk
XTALK
f = 20 kHz to audio input,
RL = 50 Ω,
Switch ON
–125
dB
Total harmonic
distortion
THD
RL = 600 Ω, CL = 20 pF,
f = 20 Hz to 20 kHz,
2.6 Vpp
(1)
10
0.07
0.075
%
VI = voltage asserted on the ID pin. VO = voltage asserted on MIC pin. IO = current on the MIC pin.
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SCDS304 – FEBRUARY 2011
DIGITAL SIGNALS
TA = –40°C to 85°C (unless otherwise noted), typical values are at VSUPPLY = 3.6 V, VBUS = 5 V, TA = 25°C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNIT
DSS
High-level input logic
VIH
Low-level input logic
VIL
Input leakage current
IINLEAK
VI = 0 V to VSUPPLY
VSUPPLY × 0.7
VSUPPLY
V
0
VSUPPLY ×
0.3
V
–1
1
μA
SCL, SDA
High-level input logic
VIH
1.4
Low-level input logic
VIL
Input leakage current
IINLEAK
VI = 0 V to VSUPPLY
VODOL
IODL = 4 mA
–1
V
0.4
V
1
μA
0.4
V
INT, ISET
Open-drain low
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APPLICATION INFORMATION
Default Switch Position
The default switch state (DSS) pin determines if the USB switches or UART switches are selected at startup. An
internal pulldown resistor is present on the DSS pin, which selects the USB switches as the default at start-up. If
the user wants to default to the UART switches at startup, the DSS pin must be pulled high to VSUPPLY. If the user
wants to disable the switches, this must be done using an I2C write to the SW_Control register after initialization
is complete.
The default configuration with VBAT power disables the switches. If the user wants to use the switches, this must
be done using an I2C write to the SW_Control register after initialization is complete.
VBUS PRESENT
ON POWER UP
DSS
Yes
SWITCH STATES
OPEN / PD
USB
PU
UART
x
Disable
No
ID Impedance Detection
The TSU5511 features impedance detection for identification of various accessories that are attached to the
microUSB port. Each accessory is identified by a unique resistor value on the ID pin to ground. During ID
detection, the device auto-calibrates an internal current source, using an external 2.21K ±1% resistor. The
current source is then applied to the ID pin while an internal voltage reference is incremented until it matches the
ID pin voltage. This produces a 4-bit ADC value corresponding to the ID resistance found.
2.6 V
ID Resistor
Tolerance
ID No.
ADC Value
0W
1%
0
0000
24 kW
1%
1
0001
56 kW
1% or 20%
2
0010
100 kW
1%
3
0011
130 kW
1%
4
0100
180 kW
1%
5
0101
240 kW
1%
6
0110
330 kW
1%
7
0111
430 kW
1%
8
1000
620 kW
1%
9
1001
910 kW
1%
10
1010
Open
N/A
11
1011
R2.2k Pin
2.21 kW ±1%
ID Resistor
Figure 1. Figure 1. Impedance Detection Circuitry
12
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Supply Detection
The TSU5511 can be powered by either VSUPPLY or VBUS. The TSU5511 will select VBUS as the power source
when present and otherwise will select VSUPPLY as the power source when VSUPPLY is present and VBUS is not.
Supply Selection and Shutdown Sequence
VSUPPLY
HANDSET STATUS
MUIC STATUS
POWER SUPPLY
Yes
ON
Active
VSUPPLY
Yes
OFF (S/W off)
Shutdown
Yes
ON
Active
No
OFF
Shutdown
No
OFF
Shutdown
No
ON (VBUS)
Active
VBUS
Yes (charging)
ON (VBUS)
Active
VBUS
NORMAL CASE
SUDDEN POWER LOSS
NO BATTERY
USB CHARGING
VSUPPLY
I2C Controlled Internal Comparator Operation
Internal Comparator Logic Table
I2C CONTROL REGISTER BIT
COMPARATORS
USB_DET_DI
S
ADC_EN
SEMREN
VBUS
SE
MR
LDO
0
0
0
ON
OFF
OFF
OFF
0
0
1
ON
ON
ON
ON
0
1
0
ON
OFF
ON
ON
0
1
1
ON
ON
ON
ON
1
0
0
OFF
OFF
OFF
OFF
1
0
1
ON
ON
ON
ON
1
1
0
ON
OFF
ON
ON
1
1
1
ON
ON
ON
ON
Software Flowchart
Initialization
Write Reg .03=3 Fh
(DP/DM Open )
Write Reg .01=14h
(2 .6V ,200 K,SEMREN )
Write Reg .02=02h
(CHG _TYP )
Wait 250 ms
Write Reg .02=42h
( INT_EN,CHG _TYP)
IDLE
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Interrupt
Handler
Read Reg .04
N
N
VBUS =1
MR_ COMP =0
Y
Y
Charger Type =
None
N
N
Y
Y
SEND /END=1 or
IDNO =0000
(0K)?
Read Reg .05
N
EAR/MIC
MODE ?
IDLE_MODE ?
CHGDET =1?
Y
Write Reg .03=3Fh
(DP/DM Open )
Write Reg .01=14h
(2.6 V,200 K,SEMREN )
Write Reg .02=42h
(INT_EN,CHG_ TYP)
N
Y
Charger Type =
Dedicated
Charger
Y
Write Reg .01 = 4Ch
(2 .3V ,2.2K,SEMREN )
Write Reg .02 = 02h
(disable INT )
Wait 70 msec
Read Reg . 04
DCPORT =1?
N
Charger Type =
Charging Host
Y
IDLE
Other Accessories
CHPORT =1?
Y
N
SEND /END=1?
Charger Type =
Invalid Charger
N
EAR/MIC Mode
OTG
Invalid Device
Y
Write Reg .01 = 4Dh
(2 .3V ,2.2K,SEMREN ,CP_EN)
Write Reg .02 = 42h
(INT_EN,CHG _TYP)
Write Reg .03 =52 h
IDNO=0000
(0K )?
N
Factory UART
Y
Write Reg .01=44 h
Write Reg .03=09 h
(MIC,Audio SW On)
IDNO=0100
(130 K)?
SHORT
Write Reg .02 = 42 h
N
SEND /END=1?
Y
Key Pressed
N
Factory USB
Key Released
Y
Write Reg .01=45 h
Write Reg .03=00 h
IDNO=0010
(56K)?
N
TA
Write Reg .01=44 h
Write Reg .03 =3Fh
Y
IDNO = 0101
(180 K)?
N
USB Mode
Write Reg .01=45h
Write Reg .03=00h
Wait for INT
14
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Figure 2. FACTORY MODE FLOWCHART
Factory Mode
Write Reg. 01 = 15h
(200K, 2.6V)
Write Reg. 03 = 00h
Enable USB path
AUDIO_MODE
Change
N
Y
Write Reg. 03 = 12h
Enable Audio Path
MP3 Test
N
N
Call Test
Other Test
Y
Y
N
N
SEND/END
=1 *
Y
Write Reg. 03 = 00h
USB path
SEND/END
=1 *
Y
CALL CONNECT
N
SEND/END
=1 *
Y
CALL DISCONNECT
SEND/END
=1 *
Y
Write Reg. 03 = 00h
(USB Path)
* = 10ms debounce for this decision
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I2C Register Map
ADDRESS
(xxh)
NAME
TYPE
RESET
VALUE
0
Device ID
R
TBD
1
Control 1
R/W
X0000000
2
Control 2
3
(1)
SW Control
R/W
INT_Status
R
5
Status
R
RFU
(1)
See
b6
b5
b4
b3
VENDOR ID BITS (TI=0001)
0000XX01
R/W
4
b7
00000000 (
ID_2P2
INTPOL
INT_EN
RFU
MIC_ON
ID_620
MIC_LP
b2
b1
REVISION BITS
ID_200
CP_AUD
VLDO
RFU
SEMREN
RFU
DP[2:0]
1)
CHGDET
MR_COMP
SEND/EN
D
00XXXXXX
DCPORT
CHPORT
RFU
b0
VBUS
RFU
ADC_EN
CP_EN
CHG_TYP
USB_DET
_DIS
DM[2:0]
IDNO[3: 0]
RFU
RFU
RFU
RFU
Refer INT_Status
Slave Address
DESCRIPTION
NAME
SIZE
(BITS)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Slave address
8
1
0
0
0
1
0
0
R/W
Register Descriptions
Device ID
Address:
00h
Reset Value:
14h
Type:
Read
NAME
SIZE
(BITS)
Device ID
8
DESCRIPTION
A unique number for chip version
00010100
bits 0–3 = chip revision, bits 4–7 = Vendor ID (TI = 1h)
Control 1
Address:
01H
Reset Value:
x0000000
Type:
Read/Write
16
NAME
SIZE
(BITS)
ID_2P2
1
0: 2.21 kΩ switch open
1: Connect LDO to ID through 2.21 kΩ external resistor
ID_620
1
0: 620 Ω switch open
1: Connect LDO to ID through 620 Ω internal resistor (used for video)
ID_200
1
0: 200 kΩ switch open
1: Connect LDO to ID through 200 kΩ internal resistor
VLDO
1
0: LDO voltage = 2.6 V (if manual switching mode)
1: LDO voltage = 2.3 V (if manual switching mode)
SEMREN
1
0: Disable send/end and MIC removal comparators and LDO
1: Enable send/end and MIC removal comparators and LDO
DESCRIPTION
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NAME
SIZE
(BITS)
ADC_EN
1
0: ADC and LDO disabled
1: ADC and LDO enabled
CP_EN
1
0: charge pump disabled
1: charge pump enabled
DESCRIPTION
Control 2
Address:
02H
ADDRESS
(xxh)
NAME
TYPE
b7
b6
b5
b4
b3
b2
b1
b0
2
Control 2
R/W
INTPOL
INT_EN
MIC_LP
CP_AUD
RFU
RFU
CHG_TYP
USB_DET
_DIS
0
0
0
0
X
X
0
1
b2
b1
b0
Reset Value
NAME
SIZE
(BITS)
INT_POL
1
0: Interrupt polarity = active low
1: interrupt polarity = active high
INT_EN
1
0: All interrupts disabled (masked)
1: All interrupts enabled
MIC_LP
1
0: Low power mode - MIC power pulsing disabled
1: Low power mode - MIC power pulsing enabled
CP_AUD
1
0: Click/pop resistors on AUDIO_L and AUDIO_R disabled
1: Click/pop resistors on AUDIO_L and AUDIO_R enabled
CHG_TYP
1
0: Charger type detection disabled
1: Charger type detection enabled
USB_DET_DIS
1
0: USB detection enabled
1: USB detection disabled
DESCRIPTION
SW_Control
Address:
03H
ADDRESS
(xxh)
NAME
TYPE
b7
b6
03
SW
Control
R/W
RFU
MIC_ON
Reset Value
(1)
X
0
b5
b4
b3
DP[2:0]
See
(1)
DM[2:0]
See
(1)
The reset value depends on VBUS status at power up. If VBUS presents, the default value depends on DSS pin state (refer to Default
Switch Position section). If VBUS does not present, the default value is 111b (DM/DP switch is open).
NAME
SIZE
(BITS)
MIC_ON
1
0: MIC switching path open
1: MIC switching path connected to ID line
3
000:
001:
010:
011:
DP
DESCRIPTION
DP connected to USB_DP
DP connected to UART_TX
DP connected to AUDIO_R
Future Use (right Audio for Video)
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SIZE
(BITS)
NAME
DM
DESCRIPTION
000: DM connected to USB_DM
001: DM connected to UART_RX
010: DM connected to AUDIO_L
011: Future Use (left Audio for Video)
100–111: DM switching path open
3
INT_Status
Address:
04H
ADDRESS
(xxh)
NAME
TYPE
b7
b6
b5
b4
04
INT_Statu
s
R
CHGDET
MR_COM
P
SEND/EN
D
VBUS
0
0
0
0
Reset Value
(1)
b3
b2
b1
b0
IDNO[3:0]
See
(1)
ADC value of the ID pin
NAME
SIZE
(BITS)
CHGDET
1
0: High-current charger not detected
1: High-current charger detected
MR_COMP
1
0: MIC removal comparator low
1: MIC removal comparator high
SEND/END
1
0: ID line not grounded
1: ID line grounded (send/end button pressed)
VBUS
1
0: No power detected on VBUS
1: Power detected on VBUS
1
0000:
0001:
0010:
0011:
0100:
0101:
0110:
0111:
1000:
1001:
1010:
1011:
IDNO
DESCRIPTION
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
determined
determined
determined
determined
determined
determined
determined
determined
determined
determined
determined
determined
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
impedance
impedance
impedance
impedance
impedance
impedance
impedance
impedance
impedance
impedance
impedance
impedance
= 0 Ω (grounded)
= 24 kΩ
= 56 kΩ
= 100 kΩ
= 130 kΩ
= 180 kΩ
= 240 kΩ
= 330 kΩ
= 430 kΩ
= 620 kΩ
= 910 kΩ
= open
Status
Address:
05H
ADDRESS
(xxh)
NAME
TYPE
b7
b6
b5
b4
b3
b2
b1
b0
5
Status
R
DCPORT
CHPORT
RFU
RFU
RFU
RFU
RFU
RFU
0
0
X
X
X
X
X
X
Reset
Value
18
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SCDS304 – FEBRUARY 2011
NAME
SIZE
(BITS)
DCPORT
1
0: Dedicated charger not detected
1: Dedicated charger detected
CHPORT
1
0: Charging host port not detected
1: Charging host port detected
DESCRIPTION
Power Consumption
Operating Modes Summary
(with estimated power consumption)
BAND GAP
UVLO
I2C
DETECTION
PLUG
Z
DETECTION
CHARGE
PUMP
CHARGE PUMP
(LOW CURRENT)
TOTAL
ICC (µA)
Audio
ON
ON
ON
ON
ON
ON
OFF
59
Audio
(no active
signal)
ON
ON
ON
ON
ON
OFF
ON
14
UART
ON
ON
ON
ON
ON
OFF
OFF
9
USB
ON
ON
ON
ON
ON
ON
OFF
59
Travel
Adapter
ON
ON
ON
ON
OFF
OFF
OFF
8
IDLE
ON
ON
ON
ON
OFF
OFF
OFF
8
Sleep
OFF
OFF
OFF
OFF
OFF
OFF
OFF
0
ICC (µA)
3
2
1
2
1
50
5
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PARAMETER MEASUREMENT INFORMATION
VDD
VSUPPLY
Enter 2.6 V mode
VOUT-26 = VMIC
VMIC
100 nF
R2 .2 K
4.7 µF
0 mA
Enter 2.3 V mode
VOUT-23 = VMIC
CLDO
GND
10 nF
Figure 3. LDO Output Voltage
VDD
VSUPPLY
100 nF
Enter 2.6 V mode
Sweep IO 0 -> 200 µA
IO-26 = IO
VMIC
R2 .2 K
IO
4.7 µF
CLDO
Enter 2.3 V mode
Sweep IO 0 -> 2 mA
IO-23 = IO
GND
10 nF
Figure 4. Max Output Current
VDD
Enter 2.6 V mode
tSU = t90% – t10%
VSUPPLY
VMIC
100 nF
R2 .2 K
4.7 µF
Enter 2.3 V mode
Enter 2.6 V mode
tr = t90% – t10%
Enter 2.3 V mode
Enter 2.6 V mode
tf = t90% – t10%
CLDO
GND
10 nF
Figure 5. LDO Rise/Fall Time
A.
20
IO can be set with a resistor.
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PARAMETER MEASUREMENT INFORMATION (continued)
VSUPPLY
VPP = 100 mV
VMIC
R2 .2 K
fPP
4.7 µF
VDD = 3.2 V
RL
Enter 2.3 V mode
RL = 15 kΩ and 5.1 kΩ
fPP = 217 Hz
PSR217 = 20*log10(VMIC/VSUPPLY)
fPP = 1 kHz
PSR1k = 20*log10(VMIC/VSUPPLY)
CLDO
GND
10 nF
Figure 6. Power Supply Rejection
A.
VMIC should be V2.2K; add 200 pF on VSUPPLY in LDO output noise.
VDD
VSUPPLY
VMIC
R2 .2 K
4.7 µF
RL
Enter 2.3 V mode
RL = 15 kΩ and 5.1 kΩ
en-OUT = VMIC integrated
noise 20 Hz to 20 kHz
CLDO
GND
10 nF
Figure 7. Integrated Output Noise
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PACKAGE OPTION ADDENDUM
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21-Feb-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
TSU5511YZPR
ACTIVE
Package Type Package Pins Package
Drawing
Qty
DSBGA
YZP
20
3000
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
Op Temp (°C)
Device Marking
(4/5)
-40 to 85
A6N
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
21-Feb-2017
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TSU5511YZPR
Package Package Pins
Type Drawing
SPQ
DSBGA
3000
YZP
20
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
178.0
9.2
Pack Materials-Page 1
2.02
B0
(mm)
K0
(mm)
P1
(mm)
2.52
0.63
4.0
W
Pin1
(mm) Quadrant
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-May-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TSU5511YZPR
DSBGA
YZP
20
3000
220.0
220.0
35.0
Pack Materials-Page 2
D: Max = 2.418 mm, Min =2.358 mm
E: Max = 1.918 mm, Min =1.858 mm
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
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