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Texas Instruments DS90UB934-Q1EVM User guides
User's Guide
SNLU220 – December 2016
Using the DS90UB934-Q1EVM Evaluation Module
The DS90UB934-Q1 is an FPD-Link III deserializer that converts a serialized camera data input to parallel
LVCMOS output. When coupled with DS90UB913A/933 serializers, the DS90UB934-Q1 receives data
from 1-Megapixel image sensors supporting 720p/800p/960p resolution at 30-Hz or 60-Hz frame rates.
There is a 2:1 mux on the input that allows two cameras to be connected, with pin or register control of
whichever camera is active. The EVM has two Rosenberger FAKRA connectors and configurable powerover-coax (POC) voltage for connecting the camera modules (not included). There is an onboard MSP430
which functions as a USB2ANY bridge for connecting a PC. This works with the Analog LaunchPAD GUI
tool.
NOTE: The demo board is not intended for EMI testing. The demo board was designed for easy
accessibility to device pins with tap points for monitoring or applying signals, additional pads
for termination, and multiple connector options.
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5
6
7
8
Contents
General Description ......................................................................................................... 3
Quick Start Guide ............................................................................................................ 4
Demo Board Connections .................................................................................................. 5
ALP Software Setup ......................................................................................................... 8
Troubleshooting ALP Software ........................................................................................... 15
Equipment References .................................................................................................... 20
PCB Schematics ........................................................................................................... 21
Board Layout ................................................................................................................ 27
List of Figures
1
Applications Diagram ........................................................................................................ 3
2
Interfacing to the EVM ...................................................................................................... 4
3
Power-Over-Coax Network ................................................................................................. 5
4
Launching ALP ............................................................................................................... 9
5
Initial ALP Screen .......................................................................................................... 10
6
Follow-up Screen ........................................................................................................... 10
7
ALP Information Tab ....................................................................................................... 11
8
ALP Registers Tab ......................................................................................................... 11
9
ALP Device ID Selected ................................................................................................... 12
10
ALP Device ID Expanded ................................................................................................. 13
11
ALP Scripting Tab .......................................................................................................... 14
12
USB2ANY Setup ........................................................................................................... 15
13
Remove Incorrect Profile .................................................................................................. 16
14
Add Correct Profile ......................................................................................................... 16
15
Finish Setup ................................................................................................................. 17
16
ALP No Devices Error ..................................................................................................... 18
17
Windows 7, ALP USB2ANY Driver
18
19
......................................................................................
ALP in Demo Mode ........................................................................................................
ALP Preferences Menu ....................................................................................................
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1
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20
Top Overlay ................................................................................................................. 27
21
Top Solder
22
Top Layer 1 ................................................................................................................. 28
23
Layer 2 ....................................................................................................................... 28
24
Layer 3 ....................................................................................................................... 29
25
Layer 4 ....................................................................................................................... 29
26
Layer 5 ....................................................................................................................... 30
27
Bottom Layer 6 ............................................................................................................. 30
28
Bottom Solder............................................................................................................... 31
29
Bottom Overlay ............................................................................................................. 31
..................................................................................................................
27
List of Tables
1
2
3
4
5
6
7
8
9
10
11
12
................................................................................................................
POC Power Supply Feed Configuration ..................................................................................
Parallel LVCMOS Output Signals - J7 Pinout ...........................................................................
FPD-Link III Signals .........................................................................................................
IDx I2C Device Address Select - J34 ......................................................................................
I2C Interface Header - J4 ...................................................................................................
VDDIO Interface Header - J1 ..............................................................................................
GPIO Interface Header - J2 ................................................................................................
CMLOUTP Output Signals .................................................................................................
Mode SW-DIP4 - S1.........................................................................................................
Control SW-DIP4 - SW1 ....................................................................................................
LEDs ...........................................................................................................................
Power Supply
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7
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8
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Trademarks
Windows is a registered trademark of Microsoft Corporation.
All other trademarks are the property of their respective owners.
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General Description
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1
General Description
1.1
Features
•
•
•
•
•
•
•
•
1.2
Supports 1-Megapixel sensors with HD 720P/800P/960P resolution at 30-Hz/60-Hz frame rate (paired
w/ DS90UB913A or DS90UB933)
Parallel LVCMOS Video Output
Supports Single-ended Coax cable and Power Over Coax
Adaptive receive equalization
Onboard USB2ANY Controller for I2C Access
I2C with Fast-mode Plus up to 1 Mbps
Flexible GPIOs for camera sync and functional safety
Single 12-V power supply for EVM
System Requirements
The major components of the DS90UB934-Q1EVM are:
• DS90UB934-Q1
• On-board POC interface
• Two Fakra coax connectors for digital video, power, control, and diagnostics
• On-board I2C programming interface
In order to demonstrate, the following is required (not included):
1. One Omnivision sensor board with DS90UB913A/DS90UB933 Serializer board
(a) TI DS90UB913A-CXEVM OR TI SAT0088 ‘MiniSer’, and
(b) OV10635 P/N: OV10635-EAAE-AA0A OR OV10640 P/N: OV10640-EAAA-AA0A (DVP)
2. One DACAR/FAKRA coax cables
3. Power supply for 12 V at 1 A
Contents of the Demo Evaluation Kit
•
1.4
One EVM board with the DS90UB934-Q1 (serializer board and cable not included)
Applications Diagram
2:1
DS90UB933-Q1
Serializer
DVP
Output
1.3
Parallel LVCMOS
Host / ISP
DS90UB933-Q1
Serializer
DS90UB934-Q1
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Figure 1. Applications Diagram
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Quick Start Guide
2
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Quick Start Guide
1.
2.
3.
4.
5.
6.
7.
8.
Connect mini USB J5 to USB port for register programming
Optional : Connect an external I2C host adapter I2C signals on J4 port for register programming
Configure switches S1 and SW1 to set operating modes of the device
Configure VFEED power supply for each channel on J14, J16, J32, J33, and J35 headers
Plug a sensor into the DS90UB913A/DS90UB933 serializer boards to create four camera modules
Connect the camera module to channels 1 or 2 using coax cables on CN1 or CN2
Interface parallel LVCMOS output signals (J2) to application processor
Provide power to board on J24 (+12VDC)
(a) Optional 5-V DC power supply on J11 (remove jumper on J12 if +5VDC applied to J11)
(b) Optional 1.8-V DC power supply on J28
(c) Optional 3.3-V DC power supply on J29
9. For details of pin-names and pin-functions, refer to the DS90UB934-Q1 data sheet.
Figure 2. Interfacing to the EVM
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3
Demo Board Connections
3.1
Power Supply
Table 1. Power Supply
3.2
REFERENCE
SIGNAL
DESCRIPTION
J24.1
12 V
Main Power
Single 12-V DC (nominal) power connector that supplies power to the
entire board.
J11.1 (Optional)
5V
5 V ±5%
Alternative to main power
J28.2 (Optional)
1.8 V
1.8 V ±5%
Alternative to main power
J29.2 (Optional)
3.3 V
3.3 V ±5%
Alternative to main power
Power-Over-Coax Interface
The DS90UB934-Q1EVM offers two power-over-coax (POC) interfaces to connect cameras through a
coaxial cable with FAKRA connectors. Power is delivered on the same conductor that is used to transmit
video and control channel between the host and the camera. By default, 9-V power supply is applied over
the coax cable. Refer Table 2 to for other POC configurations.
For POC on the EVM, the circuit uses a filter network as shown in Figure 3. The POC network frequency
response corresponds to the bandwidth compatible with DS90UB913A / DS90UB933 chipsets.
VFEED_POC
1.Ÿ
1.Ÿ
FB
4.7 PH
100 PH
FAKRA
connector
FPD3 signal
0.1 PF
Figure 3. Power-Over-Coax Network
WARNING
Verify that the power voltage is properly set before plugging into
CN1 or CN2. Power supply is not fused. Overvoltage causes
damage to boards directly connected due to incorrect input power
supplies.
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Demo Board Connections
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Table 2. POC Power Supply Feed Configuration
REFERENCE
SIGNAL
DESCRIPTION
POC Power Feed Selection 1
J14
VFEED_POC1
Short pins 1-2: 9-V power supply from VFEED_LDO1 (Default)
Short pins 2-3: 5-V power supply from 5V_SW
POC Power Feed Selection 2
J16
VFEED_POC2
Short pins 1-2: 9-V power supply from VFEED_LDO2 (Default)
Short pins 2-3: 5-V power supply from 5V_SW
POC Power Feed using 12-V Main Power (J24)
Note: J16 and J14 must to left OPEN if using this configuration
J35
VDD_EXT
Short pins 1-2: 12-V power supply to VFEED_POC1
Short pins 2-3: 12-V power supply to VFEED_POC2
Remote power supply connection to CN1
J32.1
VFEED1
Short J32.1-2: VFEED_POC1 (Default)
Short J32.1 and J33.1: VFEED_POC2
Remote power supply connection to CN2
J32.3
VFEED2
Short J32.3-4: VFEED_POC1 (Default)
Short J32.3 and J33.2: VFEED_POC2
Table 3. Parallel LVCMOS Output Signals - J7 Pinout
3.3
PIN NUMBER
SIGNAL NAME
PIN NUMBER
SIGNAL NAME
1
ROUT0
2
GND
3
ROUT1
4
GND
5
ROUT2
6
GND
7
ROU3
8
GND
9
ROUT4
10
GND
11
ROUT5
12
GND
13
ROUT6
14
GND
15
ROUT7
16
GND
17
ROUT8
18
GND
19
ROUT9
20
GND
21
ROUT10
22
GND
23
ROUT11
24
GND
25
HSYNC
26
GND
27
VSYNC
28
GND
29
PCLK
30
GND
FPD-Link III Signals
Table 4. FPD-Link III Signals
6
REFERENCE
SIGNAL
DESCRIPTION
CN1
RIN0+
FAKRA connector
CN2
RIN1+
FAKRA connector
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3.4
2
I C Interface
A standalone external I2C host can connect via J4 for programming purposes. Examples of external I2C
host controllers are Texas Instruments USB2ANY and Total Phase Aardvark I2C/SPI host adapter (Total
Phase Part#: TP240141).
I2C signal levels match VDDIO which can be configured through J1 to be at 1.8 V or 3.3 V when the I2C
interface is accessed through connectors J4.
Table 5. IDx I2C Device Address Select - J34
REFERENCE
SIGNAL
DESCRIPTION
2
Selects I C Device Address
J34
IDX
Open: 0x30 (7'b) or 0x60 (8'b)
Short: 0x3D (7'b) or 0x7A (8'b)(Default)
Table 6. I2C Interface Header - J4
3.5
REFERENCE
SIGNAL
J4.1
VDDIO
DESCRIPTION
J4.2
I2C_SCL
I2C Clock Interface for primary I2C bus
J4.3
I2C_SDA
I2C Data Interface for primary I2C bus
J4.4
GND
I2C bus voltage (tied to VDDIO)
Ground
Control Interface
Table 7. VDDIO Interface Header - J1
REFERENCE
SIGNAL
DESCRIPTION
Selects VDDIO bus voltage
J1
VDDIO
Short pins 1-2: 3.3-V IO (Default)
Short pins 2-3: 1.8-V IO
Table 8. GPIO Interface Header - J2
REFERENCE
SIGNAL
DESCRIPTION
J2.1
GPIO0
General Purpose Input/Output 0
J2.3
GPIO1
General Purpose Input/Output 1
J2.5
GPIO2
General Purpose Input/Output 2
J2.7
GPIO3
General Purpose Input/Output 3
J2.9
NC
Not connected
J2.11
NC
Not connected
J2.13
NC
Not connected
J2.15
NC
Not connected
Table 9. CMLOUTP Output Signals
REFERENCE
SIGNAL
TP16
CMLOUTP
Test Pad for Channel Monitor Loop-through Driver
TP17
CMLOUTN
Test Pad for Channel Monitor Loop-through Driver
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Table 10. Mode SW-DIP4 - S1
(1)
REFERENCE
MODE
S1.1
1
Reserved
S1.2
2
RAW12 / LF
S1.3
3
RAW12 / HF
S1.4
4
RAW10 (Default)
(1)
DESCRIPTION
Only set one ON.
Table 11. Control SW-DIP4 - SW1
REFERENCE
SIGNAL
INPUT = L
INPUT = H
DESCRIPTION
SW1.1
BISTEN
For Normal operation
(Default)
BIST Mode enable
Test Mode
SW1.2
RES
Tied to GND(Default)
N/A
Reserved
SW1.3
SEL
FPD-Link III on Port 0 (CN1)
(Default)
FPD-Link III on Port 1 (CN2)
Port Select
SW1.4
PDB
Device is powered down
Device is enabled (Default)
Power-down Mode
Table 12. LEDs
3.6
REFERENCE
LED NAME
DESCRIPTION
D2
GPIO0
Illuminates if GPIO0 is ON
D3
GPIO1
Illuminates if GPIO1 is ON
D4
GPIO2
Illuminates if GPIO2 is ON
D1
GPIO3/INTB
Illuminates if GPIO3 is ON
D9
LOCK
Illuminates if device is Locked to a serializer
D15
PASS
Illuminates if device is receiving error free data
D11
VDD_EXT
Illuminates if 12V Power is applied to DC-IN J24
D12
VDD5V
Illuminates on +5V
D13
VFEED_POC
Illuminates if VFEED_POC Power is ON
D14
VDDIO
Illuminates on VDDIO Power
Enable and Reset
There are two device enable and reset/power-down options for the EVM.
• RC timing option: The C3 external capacitor and R17 pullup resistor connected to the PDB pin ramp
time after the device is powered on.
• External control option: A push-button (S2) or SW1 position 4 is available for the manual control of the
PBD signal.
4
ALP Software Setup
4.1
System Requirements
8
Operating System:
USB:
USB2ANY Firmware Version:
Windows® 7 64-bit
USB2ANY
2.5.2.0
USB:
Aardvark I2C/SPI host adapter
p/n TP240141
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4.2
Download Contents
Latest TI Analog LaunchPAD can be downloaded from: http://www.ti.com/tool/alp.
Download and extract the zip file to a temporary location that can be deleted later.
The following installation instructions are for a PC running Windows 7 64-bit operating system.
4.3
Installation of the ALP Software
Execute the ALP Setup Wizard program called “ALPF_setup_v_x_x_x.exe” that was extracted to a
temporary location on the local drive of your PC.
There are 7 steps to the installation once the setup wizard is started:
1. Select the "Next" button.
2. Select “I accept the agreement” and then select the “Next” button.
3. Select the location to install the ALP software and then select the “Next” button.
4. Select the location for the start menu shortcut and then select the “Next” button.
5. There will then be a screen that allows the creation of a desktop icon. After selecting the desired
choices select the “Next” button.
6. Select the “Install” button, and the software will then be installed to the selected location.
7. Uncheck “Launch Analog LaunchPAD” and select the “Finish” button. The ALP software will start if
“Launch Analog LaunchPAD” is checked, but it will not be useful until the USB driver is installed and
board is attached.
Power the DS90UB934-Q1 EVM board with a 12 VDC power supply.
4.4
Start-up - Software Description
Make sure all the software has been installed and the hardware is powered on and connected to the PC.
Execute “Analog LaunchPAD” shortcut from the start menu. The default start menu location is under All
Programs > Texas Instruments > Analog LaunchPAD vx.x.x > Analog LaunchPAD to start MainGUI.exe.
Figure 4. Launching ALP
The application should come up in the state shown in the figure below. If it does not, see Section 5,
“Troubleshooting ALP Software”.
Under the Devices tab click on “DS90UB934” to select the device and open up the device profile and its
associated tabs.
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ALP Software Setup
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Figure 5. Initial ALP Screen
After selecting the DS90UB934, the following screen shown in Figure 6 should appear.
Figure 6. Follow-up Screen
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4.5
Information Tab
The Information tab is shown in Figure 7.
Figure 7. ALP Information Tab
4.6
Registers Tab
The Register tab is shown in Figure 8.
Figure 8. ALP Registers Tab
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ALP Software Setup
4.7
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Registers Tab - Address 0x00 Selected
Address 0x00 is selected as shown in Figure 9. Note that the “Value:” box,
hex value of that register.
now shows the
Figure 9. ALP Device ID Selected
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4.8
Registers Tab - Address 0x00 Expanded
By double clicking on the Address bar
or a single click on
can be expanded.
Address 0x00 expanded reveals contents by bits. Any register address displayed
Figure 10. ALP Device ID Expanded
Any RW Type register,
, can be written into by writing the hex value into the “Value:” box,
or putting the pointer into the individual register bit(s) box by a left mouse click to put a check mark
(indicating a 1) or unchecking to remove the check mark (indicating a 0). Click the “Apply” button to write
to the register, and “refresh” to see the new value of the selected (highlighted) register.
The box toggles on every mouse click.
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ALP Software Setup
4.9
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Scripting Tab
The Scripting tab is shown below.
Figure 11. ALP Scripting Tab
The script window provides a full Python scripting environment which can be for running scripts and
interacting with the device in an interactive or automated fashion.
WARNING
Directly interacting with devices either through register
modifications or calling device support library functions can effect
the performance and/or functionality of the user interface and may
even crash the ALP Framework application.
4.10 Sample ALP Python Script
4.10.1
Initialization
board.WriteI2C(0x7A,
board.WriteI2C(0x7A,
board.WriteI2C(0x7A,
board.WriteI2C(0x7A,
14
0x4C,
0x58,
0x5D,
0x65,
0x01)
0x58)
0x60)
0x68)
#enable to write to PORT0 registers
#enable I2C pass-through
#set slave ID to 0x62
#set slave alias to 0x62
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5
Troubleshooting ALP Software
5.1
ALP Loads the Incorrect Profile
If ALP opens with the incorrect profile loaded the correct profile can be loaded from the
USB2ANY/Aardvark Setup found under the tools menu.
Figure 12. USB2ANY Setup
Highlight the incorrect profile in the Defined ALP Devices list and press the remove button.
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Figure 13. Remove Incorrect Profile
Find the correct profile under the Select a Daughter Board list, highlight the profile and press Add.
Figure 14. Add Correct Profile
Select Ok and the correct profile should now be loaded.
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Figure 15. Finish Setup
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Troubleshooting ALP Software
5.2
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What to do if ALP Does Not Detect the EVM
If the following window opens after starting the ALP software, double check the hardware setup.
Figure 16. ALP No Devices Error
It may also be that the USB2ANY driver is not installed. Check the device manager. There should be a
“HID-compliant device” under the “Human Interface Devices” as shown below.
Figure 17. Windows 7, ALP USB2ANY Driver
The software should start with only “DS90UB96X” in the “Devices” pulldown menu. If there are more
devices then the software is most likely in demo mode. When the ALP is operating in demo mode there is
a “(Demo Mode)” indication in the lower left of the application status bar as shown below.
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Figure 18. ALP in Demo Mode
Disable the demo mode by selecting the “Preferences” pull down menu and un-checking “Enable Demo
Mode”.
Figure 19. ALP Preferences Menu
After demo mode is disabled, the ALP software polls the ALP hardware. The ALP software updates and
have only “DS90UB96X” under the “Devices” pulldown menu.
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Equipment References
6
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Equipment References
NOTE: The following references are supplied only as a courtesy to our valued customers. It is not
intended to be an endorsement of any particular equipment or supplier.
Logic Analyzer:
Keysight Technologies
www.keysight.com
Aardvark I2C/SPI Host Adapter Part Number: TP240141
www.totalphase.com/products/aardvark_i2cspi
6.1
Cable References
FAKRA coaxial cable:
www.leoni-automotive-cables.com
Rosenberger FAKRA connector:
http://www.rosenberger.com/en/products/automotive/fakra.php
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PCB Schematics
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PCB Schematics
Layout note: For all differential pairs(CSI-2 and FPD) in this
design follow the guidelines decribed below: Route together
with controlled differential 100ohm impedance and controlled
single ended 50ohm impedance for all single ended signals
(ROUT, HS, VS, PCLK,), route with controlled single ended 50
ohm impedance. Keep away from other high speed signals.
Keep lengths within 10mil of each other. Keep traces on layers
adjacent to the ground plane. Keep the number of VIAS to
minimum. If VIAS are used, make it symetrical through all
signals. Keep diff pairs separated at least by x3 of the trace
width. NO STUBS on the signal path, components should be
placed such that the signals can be routed in pass-through
manner.
VDD1V8
VDD_1P8_CSI
VDDD_1V1
L1
120 ohm
C19
1µF
0.1µF
Place 10uF, 1uF, 0.1uF
and 0.01uF bypass caps on
bottom of board, close to
U1 VDD pins
C20
C500 C501 C502
DNP DNP DNP
0.01µF 22µF 22µF
22µF
L2
DNP
120 ohm
7
29
VDDP_1V8
C8
10µF
1µF
C9
C10
C509 C510 C511
DNP DNP DNP
0.1µF 0.01µF 22µF 22µF 22µF
GND
VDDFPD_1V8
GND
VDDCSI_1V1
DS90UB934TRGZRQ1
VDDFPD_1V1
17
VDD_1P8
40
31
VDD_1P8_FPD0
VDD_1P8_FPD1
3
VDDCSI_1V1
MIPI_SEL
MIPI_SEL
SEL
VDD_1P1_CSI
34
VDD_1P1_FPD
43
MIPI_SEL
SEL
RIN0_P
RIN0_N
RIN0_P
RIN0_N
GPIO0
GPIO1
GPIO2
GPIO3/INTB
HSYNC/GPIO4
VSYNC/GPIO5
PCLK/GPIO6
PCLK needs to be 50 ohm
41
42
RIN1_P
RIN1_N
RIN1_P
RIN1_N
R22
4.7k
46
32
33
GPIO0
GPIO1
GPIO2
GPIO3/INTB
HSYNC/GPIO4
VSYNC/GPIO5
PCLK/GPIO6
28
27
26
25
10
9
8
I2C_SCL
I2C_SDA
I2C_SCL
I2C_SDA
2
1
ROUT_10/CSI_CLK0_P
ROUT_11/CSI_CLK0_N
ROUT_4/CSI_CLK1+
ROUT_5/CSI_CLK1-
19
18
ROUT_4/CSI_CLK1_P
ROUT_5/CSI_CLK1_N
ROUT_8/CSI_D0+
ROUT_9/CSI_D0-
14
13
ROUT_8/CSI_D0_P
ROUT_9/CSI_D0_N
ROUT_6/CSI_D1+
ROUT_7/CSI_D1-
16
15
ROUT_6/CSI_D1_P
ROUT_7/CSI_D1_N
ROUT_2/CSI_D2+
ROUT_3/CSI_D2-
22
21
ROUT_2/CSI_D2_P
ROUT_3/CSI_D2_N
ROUT_0/CSI_D3+
ROUT_1/CSI_D3-
24
23
ROUT_0/CSI_D3_P
ROUT_1/CSI_D3_N
IDX
35
IDX
LOCK
PASS
48
47
LOCK
PASS
MODE
PDB
37
30
MODE
PDB
CMLOUTP
CMLOUTN
38
39
CMLOUT_P
CMLOUT_N
6
BISTEN
44
TESTEN
VDD_1P1_D
20
VDDFPD_1V1
12
11
ROUT_10/CSI_CLK0+
ROUT_11/CSI_CLK0-
VDD_1P8_P0
VDD_1P8_P1
VDDD_1V1
R155
VDDIO
VDDIO
45
36
VDD_1P8_CSI
VDDFPD_1V8
SEL
RIN0+
RIN0RIN1+
RIN1GPIO_0
GPIO_1
GPIO_2
GPIO_3/INTB
HSYNC/GPIO_4
VSYNC/GPIO_5
PCLK/GPIO_6
BISTEN
TESTEN
C21
C22
C23
10µF
1µF
0.1µF 0.01µF
C24
C503 C504 C505
DNP DNP DNP
0.01µF 22µF 22µF 22µF
120 ohm
ROUT_2/CSI_D2_P
ROUT_3/CSI_D2_N
C36
DNP
10µF
C26
C27
1µF
0.1µF 0.01µF
C28
C506 C507 C508
DNP DNP DNP
0.01µF 22µF 22µF 22µF
L6
DNP
120 ohm
0
DS90UB934 cannot receive
external 1.1V supply - Please
keep R23 unpopulated for
DS90UB934 and populated for
DS90UB954.
GND
TP16
1
2
R182
100
0.1µF
1
2
3
J36
0.1µF
LOCK
HSYNC/GPIO4
VSYNC/GPIO5
PCLK/GPIO6
GPIO5
GPIO6
DO NOT POPULATE CRYSTAL
S3B
C31
C32
C33
C518 C519 C520
DNP DNP DNP
0.1µF 0.01µF 0.01µF 22µF 22µF 22µF
VDD3V3
J37
1
2
PASS
GND
D1
Green
5-146261-1
LABEL "GPIO3/INTB" i
R4
470
OPEN: I2C Address = 0x30 (7'b)
SHORTED: I2C Address = 0x3D (7'b)
3
VDD1V8
VDD1V8
IDX
REMOVE R84 and R85 in CSI Mode
3
4
C17
C515 C516 C517
DNP DNP DNP
0.01µF 0.01µF 22µF 22µF 22µF
GND
C1 & C2 should be fitted
as a 0.1uF when
interfacing with
DS90UB913A &
DS90UB933. C1 & C2
fitted with 0.033uF for
interfacing with
DS90UB953.
1
2
OEN/XIN/REFCLK
OSS_SEL/XOUT
C30
GND
IDX
GND
C16
VDDIO
1µF
J34
R85
10k
0.1µF
120 ohm
SH-J1
TSW-103-07-G-S
TP17
VDDIO
R84
10k
C15
1µF
5-146261-1
BISTEN
TSW-108-07-G-D
GPIO4
C14
10µF
R19
DNP
0
C5
0.1µF
R27
40.2k
1
R153 R154 R13
R14
82.5k 68.1k 56.2k 13.3k
MODE and IDX Resistors
are +/-1% tolerance.
GPIO3/INTB
R6
100k
GND
R33
102k
R34
137k
R36
R35
210kDNP
0
VDDIO
2
1
S3A
Q1
GPIO3/INTB
2
GPIO0
GPIO1
GPIO2
GPIO3/INTB
GPIO4
R187 0
DNP
GPIO5
R188 0
DNP
GPIO6
R189 0
DNP
1
3
5
7
9
11
13
15
C41
L8
GND
100 ohm diff pair. +/-5%.
Resistors have to be placed
close to U1.
+/- 10 mil for all inter/intra
pairs.
C13
C512 C513 C514
DNP DNP DNP
0.1µF 0.01µF 22µF 22µF 22µF
GND
PASS
OSS_SEL/XOUT
C12
ZZ12
VDD3V3 VDD1V8
Assembly Note
Place Jumper on pins 1 and 2 for J1
J1
LOCK
OEN/XIN/REFCLK
1µF
GND
VDDFPD_1V1
R23
DNP
C29
ROUT_0/CSI_D3_P
ROUT_1/CSI_D3_N
TESTEN
C11
10µF
L5
ROUT_6/CSI_D1_P
ROUT_7/CSI_D1_N
C2
C40
GND
VDDP_1V8 VDD1V1
ROUT_8/CSI_D0_P
ROUT_9/CSI_D0_N
C1
L4
DNP
120 ohm
C25
ROUT_4/CSI_CLK1_P
ROUT_5/CSI_CLK1_N
MODE
PDB
49
PAD
ROUT_10/CSI_CLK0_P
ROUT_11/CSI_CLK0_N
IDX
5 OEN/XIN/REFCLK
4 OSS_SEL/XOUT
OEN/XIN/REFCLK
OSS_SEL/XOUT
I2C_SCL
I2C_SDA
J2
2
4
6
8
10
12
14
16
C39
2
U1
120 ohm
VDDIO
C18
L3
VDDIO
DNP
0
C35
DNP
10µF
1
7
VDDIO
GND
GND
GND
Y1
10.0k
DNP
1
C37
12pF
DNP
2
R20
4.7k
DNPY2
25MHz
C38
12pF
DNP
I2C_SCL
I2C_SDA
1
I2C_SCL
I2C_SDA
C34
0.1µF
R21
4.7k
R25
R26
E/D
1
2
3
4
GND
i
i
i
i
VDDIO
SCL
SDA
GND
4
GND
OUT
3
MODE
GND
H1
R11
0 OEN/XIN/REFCLK
DNP
MODE
R12
DNP0
1
DNP
R29
DNP
0
OSS_SEL/XOUT
GND
OEN/XIN/REFCLK
DESERIALIZER EMI/EMC SHIELD
DNP GND
LABEL "REF_CLK i
BMI-S-201-F
GND
R156
10k
8
7
6
5
DNPC6 DNPC7
0.1µF
0.01µF
25MHz
7C-25.000MCB-T
0022112042
10.0k
DNP
VCC
DNP
2
J4
0
0
VDDIO
R5
DNP
10k
1
2
R28
GND
1
VDDIO
CSI (953) - Coax
2
RAW12 Low-Freq (913) - Coax
3
RAW12 High-Freq (913) - Coax
4
RAW10 (913) - Coax
OEN/XIN/REFCLK
R18
DNP
0
R24
S1
219-4LPST
C4
R17
10k
R16
10k
R37
10k
R38
10k
C3
10µF
MIPI_SEL
0.1µF GND
R157
0
BISTEN
TESTEN
SEL
PDB
8
7
6
5
SW1
1
2
3
4
S2
GND
219-4LPST
GND
GND
J3
GND
GND
Copyright © 2016, Texas Instruments Incorporated
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21
PCB Schematics
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-Remove R53-R64 for CSI2 source connected to J6
-Populate R53-R64 when source connected through J31
** R53-64 to be placed very close to J6 to avoid stub when J31
is not in use **
CSI-2 CONNECTION
Place resistors close to device
ROUT_10/CSI_CLK0_P
ROUT_11/CSI_CLK0_N
ROUT_8/CSI_D0_P
ROUT_9/CSI_D0_N
ROUT_6/CSI_D1_P
ROUT_7/CSI_D1_N
ROUT_2/CSI_D2_P
ROUT_3/CSI_D2_N
ROUT_0/CSI_D3_P
ROUT_1/CSI_D3_N
ROUT_4/CSI_CLK1_P
ROUT_5/CSI_CLK1_N
CSI-2 CONNECTION
J6
J31
1
3
2
4
5
7
6
8
EXP_SCL
EXP_SDA
CSI_CLK0_P
CSI_CLK0_N
R158 0
DNP
R159 0
DNP
J6_CLK0_P
J6_CLK0_N
CSI_D0_P
CSI_D0_N
R160 0
DNP
R161 0
DNP
J6_D0_P
J6_D0_N
9
11
10
12
CSI_D1_P
CSI_D1_N
R162 0
DNP
R163 0
DNP
J6_D1_P
J6_D1_N
13
15
14
16
RESETn
CSI_D2_P
CSI_D2_N
R164 0
DNP
R165 0
DNP
J6_D2_P
J6_D2_N
17
19
18
20
CSI_D3_P
CSI_D3_N
R166 0
DNP
R167 0
DNP
J6_D3_P
J6_D3_N
21
23
22
24
CSI_CLK1_P
CSI_CLK1_N
R168 0
DNP
R169 0
DNP
J6_CLK1_P 25
J6_CLK1_N 27
26
28
29
31
30
32
33
35
34
36
37
39
38
40
DNP
MP1
MP3
1
3
2
4
EXP_SCL
EXP_SDA
EXP_REF_CLK
EXP_REF_CLK
EXP_SCL
R44
0
DNP
I2C_SCL
EXP_SDA
R45
0
DNP
I2C_SDA
RESETn
R46
0
DNP
PDB
SPI_MOSI
R47
0
DNP
GPIO0
SPI_SCLK
R48
0
DNP
GPIO1
SPI_CSn
R49
0
DNP
GPIO2
SPI_MOSI
R50
0
DNP
GPIO3/INTB
SPI_SCLK
R51
0
DNP
GPIO4
SPI_CSn
R52
0
DNP
GPIO5
J6_CLK0_P
J6_CLK0_N
R53
0 0201
DNP
R54
0 0201
DNP
J31_CLK0_P 5
J31_CLK0_N 7
6
8
J6_D0_P
J6_D0_N
R55
0 0201
DNP
R56
0 0201
DNP
J31_D0_P
J31_D0_N
9
11
10
12
J6_D1_P
J6_D1_N
R57
0 0201
DNP
R58
0 0201
DNP
J31_D1_P
J31_D1_N
13
15
14
16
RESETn
SPI_MOSI
SPI_SCLK
J6_D2_P
J6_D2_N
R59
0 0201
DNP
R60
0 0201
DNP
J31_D2_P
J31_D2_N
17
19
18
20
SPI_MOSI
SPI_SCLK
SPI_CSn
J6_D3_P
J6_D3_N
R61
0 0201
DNP
R62
0 0201
DNP
J31_D3_P
J31_D3_N
21
23
22
24
SPI_CSn
J6_CLK1_P
J6_CLK1_N
R63
0 0201
DNP
R64
0 0201
DNP
J31_CLK1_P25
J31_CLK1_N27
26
28
29
31
30
32
33
35
34
36
37
39
38
40
EXP_REF_CLK
GND
VDD_3V3
R39
DNP
0
VDD_3V3
VDD_1V8
R40
DNP
0
MP2
MP4
VDD_1V8
MP1
MP3
QSH-020-01-H-D-DP-A
DNP
GND
R170
R171
R172
R173
R174
R175
R176
R177
R178
R179
R180
R181
R184
R185
R186
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
J7_D3_P
J7_D3_N
J7_D2_P
J7_D2_N
J7_CLK1_P
J7_CLK1_N
J7_D1_P
J7_D1_N
J7_D0_P
J7_D0_N
J7_CLK0_P
J7_CLK0_N
J7_HSYNC
J7_VSYNC
J7_PCLK
I2C_SCL
I2C_SDA
PDB
VDD_1V8
R42
DNP
0
MP2
MP4
BOTTOM MOUNT
LVCMOS CONNECTION
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
OEN/XIN/REFCLK
VDD_3V3
VDD_1V8
GPIO0
GPIO1
GND
J7
ROUT0
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUT6
ROUT7
ROUT8
ROUT9
ROUT10
ROUT11
HSYNC
VSYNC
PCLK
OEN/XIN/REFCLK
VDD_3V3
R41
DNP
0
GND
ROUT_0/CSI_D3_P
ROUT_1/CSI_D3_N
ROUT_2/CSI_D2_P
ROUT_3/CSI_D2_N
ROUT_4/CSI_CLK1_P
ROUT_5/CSI_CLK1_N
ROUT_6/CSI_D1_P
ROUT_7/CSI_D1_N
ROUT_8/CSI_D0_P
ROUT_9/CSI_D0_N
ROUT_10/CSI_CLK0_P
ROUT_11/CSI_CLK0_N
HSYNC/GPIO4
VSYNC/GPIO5
PCLK/GPIO6
0
QTH-020-04-L-D-DP-A
TOP MOUNT
Place resistors close to device
DNP
R43
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
GPIO2
GPIO3/INTB
GPIO4
GPIO5
TSW-115-08-L-D
TOP MOUNT
GND
Copyright © 2016, Texas Instruments Incorporated
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PCB Schematics
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GPIO0
GPIO0
LABEL "GPIO0" D2
i
R1
2
USB-TO-3.3V REGULATOR
NOTE: NO POWER DISTRIBUTION SWITCH NEEDED FOR EXT 3.3V SUPPLY
USB PORT
1
220
GPIO1
Green
LABEL "GPIO1" D3
i
R2
2
3V3
J5
220
GPIO2
GPIO2
Green
LABEL "GPIO2" D4
i
R8
2
TP1
1
2
3
4
5
1
1
R3
33
GPIO4
GPIO5
GPIO6
LOCK
GPIO5
GPIO6
LOCK
1
Green
LABEL "GPIO4" D6
i
2 DNP 1
2
R10
DNP
220
R15
Green
LABEL "GPIO5" D7
i
R31
2 DNP 1
DNP
220
Green
LABEL "GPIO6" D8
i
R32
2 DNP 1
DNP
220
Green
LABEL "LOCK" D9
i
R65
3
33k
IO1
VCC
IO2
IO4
GND
IO3
FB1
DP
R9
2
220
7.5V
GND
1
2
4
GND
4
3
1µF
2
6
7
IN
OUT
EN
NR
NC
NC
NC
GND
PAD
1
C42
2.2µF
3
C43
0.01µF
4
9
GND
GND
GND
TPS73533DRBR
VUSB
BSL
U9
GND
R30
1.2M
GND
GND
C47
220pF
GND
GND
HEADER FOR SPI MODE COMMUNICATION
GND
V18
GPIO5/SPI(SOMI)/UART(RXD)
J30
1
2
3
4
GPIO4/SPI(SIMO)/UART(TXD)
C48
220pF
GPIO2/SPI(SCLK)
GPIO6/PWM1/SPI(CS)
GND
TSW-104-07-G-S
1
Green
U10
GPIO7/PWM0
37
38
39
40
41
42
43
44
GPIO11/VEREF+
C49
0.1µF
GND
GPIO10/VEREF-
9
10
69
70
12
13
55
56
2
C50
30pF
1
Y3
C51
R183
DNP
0
24MHz
5
6
7
8
57
58
59
60
30pF
P1.0/TA0CLK/ACLK
P1.1/TA0.0
P1.2/TA0.1
P1.3/TA0.2
P1.4/TA0.3
P1.5/TA0.4
P1.6/TA1CLK/CBOUT
P1.7/TA1.0
P3.0/UCB0SIMO/UCB0SDA
P3.1/UCB0SOMI/UCB0SCL
P3.2/UCB0CLK/UCA0STE
P3.3/UCA0TXD/UCA0SIMO
P3.4/UCA0RXD/UCA0SOMI
P3.5/TB0.5
P3.6/TB0.6
P3.7/TB0OUTH/SVMOUT
P5.0/A8/VREF+/VEREF+
P5.1/A9/VREF-/VEREFP5.2/XT2IN
P5.3/XT2OUT
P5.4/XIN
P5.5/XOUT
P5.6/TB0.0
P5.7/TB0.1
P7.0/CB8/A12
P7.1/CB9/A13
P7.2/CB10/A14
P7.3/CB11/A15
P7.4/TB0.2
P7.5/TB0.3
P7.6/TB0.4
P7.7/TB0CLK/MCLK
GND
V18
C52
0.47µF
VBUS
VUSB
3V3
GND
67
20
V18
VCORE
65
66
VBUS
VUSB
11
18
50
AVCC1
DVCC1
DVCC2
P2.0/TA1.1
P2.1/TA1.2
P2.2/TA2CLK/SMCLK
P2.3/TA2.0
P2.4/TA2.1
P2.5/TA2.2
P2.6/RTCCLK/DMAE0
P2.7/UCB0STE/UCA0CLK
P4.0/PM_UCB1STE/PM_UCA1CLK
P4.1/PM_UCB1SIMO/PM_UCB1SDA
P4.2/PM_UCB1SOMI/PM_UCB1SCL
P4.3/PM_UCB1CLK/PM_UCA1STE
P4.4/PM_UCA1TXD/PM_UCA1SIMO
P4.5/PM_UCA1RXD/PM_UCA1SOMI
P4.6/PM_NONE
P4.7/PM_NONE
P6.0/CB0/A0
P6.1/CB1/A1
P6.2/CB2/A2
P6.3/CB3/A3
P6.4/CB4/A4
P6.5/CB5/A5
P6.6/CB6/A6
P6.7/CB7/A7
P8.0
P8.1
P8.2
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
29
30
31
32
33
34
35
36
GPIO6/PWM1/SPI(CS)
GPIO3/PWM2
GPIO2/SPI(SCLK)
R190
0
R191
0
45
46
47
48
51
52
53
54
77
78
79
80
1
2
3
4
15
16
17
I2C_SDA
3V3
I2C_SCL
GPIO4/SPI(SIMO)/UART(TXD)
1
21
22
23
24
25
26
27
28
GPIO5/SPI(SOMI)/UART(RXD)
J39
1
3
2
4
D16
SSF-LXH305GD-TR
Green
R67
200
TSW-102-07-G-D
GND
GPIO9/ADC2
3
GND
EFC0/GPIO12/CLOCK
GPIO8/ADC3
1
Q2
2
PASS
C45
S4
Orange
LABEL "PASS" D15
i
R66
60 ohm
C44
22µF
D5
C46
0.1µF
220
PASS
5
VBUS
PUR
1.5k
6
5
8
DM
R7
33
USB Mini Type B
220
GPIO4
U8
VBUS
2
GPIO1
Receptacle for 4x2 header in case any of the USB2ANY GPIOs are to be used. Leave as DNP at assembly.
72
73
74
75
GND
RST/NMI/SBWTDIO
TEST/SBWTCK
76
71
PU.0/DP
PU.1/DM
62
64
PUR
63
VSSU
AVSS1
AVSS2
DVSS1
DVSS2
61
14
68
19
49
DP
3V3
GPIO3/PWM2
DM
PUR
GND
GPIO7/PWM0
R68
33k
GPIO8/ADC3
C53
2200pF
GPIO11/VEREF+
DNP
GPIO9/ADC2
1
3
5
7
2
4
6
8
GPIO10/VEREF-
EFC0/GPIO12/CLOCK
J40
MSP430F5529IPN
C54
0.1µF
C55
0.1µF
GND
GND
Copyright © 2016, Texas Instruments Incorporated
SNLU220 – December 2016
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Using the DS90UB934-Q1EVM Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
23
PCB Schematics
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R72
DNP
2.00k
L21
VFEED1
DNP
LQH3NPN100MJRL
10µH
R73
L11
1000 ohm
R74
2.00k
L13
2.00k
L14
10µH
100µH
C72
0.1µF
C74
0.1µF
GND
L17
1500 ohm
CN1
C73
10µF
C75
10µF
GND
C80
CN1_P
RIN0_P
AC coupling
capacitors should be
0.33uF and 0.015uF
@ back channel rates
of >= 10 Mbps over
coax. (DS90UB953)
RIN0_P
3
4
1
2
3
4
5
0.1µF
59S10H-40ML5-Z
DNP
R76 49.9
DNP
200
1
R75
C82
2
GND
L500
DLW21SN900HQ2L
RIN0_N
CN1_N
C84
RIN0_N
0.047µF
DNP
240pF
GND
ZZ12
Assembly Note
Place Jumper on on pins 3 and 4 for J32
VFEED_POC1
VFEED_POC2
SH-J32.2
VFEED_POC1
ZZ13
SH-J32.1
Assembly Note
Place Jumper on pins 1 and 2 for J32
R77
DNP
2.00k
L22
VFEED2
DNP
LQH3NPN100MJRL
10µH
R78
L12
2
1
Layout Note: Arrange
headers as 3x2 block
1000 ohm
R79
2.00k
L15
2.00k
L16
10µH
100µH
C76
0.1µF
C78
0.1µF
C77
10µF
GND
L18
1500 ohm
CN2
3
1
VFEED1
VFEED2
4
2
TP2
VFEED_POC2
J33
J32
C79
10µF
GND
C81
RIN1_P
CN2_P
RIN1_P
3
4
1
AC coupling
capacitors should be
0.33uF and 0.015uF
@ back channel rates
of >= 10 Mbps over
coax. (DS90UB953)
2
3
4
5
0.1µF
59S10H-40ML5-Z
DNP
1
R80
R81 49.9
DNP
200
2
GND
L501
DLW21SN900HQ2L
C85
DNP
C83
RIN1_N
CN2_N
RIN1_N
0.047µF
240pF
GND
Copyright © 2016, Texas Instruments Incorporated
24
Using the DS90UB934-Q1EVM Evaluation Module
SNLU220 – December 2016
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Copyright © 2016, Texas Instruments Incorporated
PCB Schematics
www.ti.com
TP3
VDD_EXT
5V@2A SW POWER SUPPLY
LABEL "VFEED_POC1"
i
J35
2 VFEED_POC1
4 VFEED_POC2
1
3
VFEED_POC1
VFEED_POC2
i LABEL "VDD5V"
i LABEL "GND"
U3
5V_SW
13
C105
5V_SW
12
L31
0.1µF
C106
100µF
ZZ7
Assembly Note
Place Jumper on pins 1 and 2 for J14
VFEED_LDO1 VFEED_POC1 5V_SW
J14
1
2
3
1
4
6
1
2
GND
11
C107
47µF
C108
10µF
10
C109
0.1µF
VCC
VO
TPS54225PWPR VFB
VIN
VBST
VREG5
SW2
SS
SW1
GND
IN
OUT
ON/OFF
ADJ
NC
NC
C523
0
R91
DNP 29.4k
8 1µF
7
2
DNP
R95
10.0k
C104
22µF
GND
C524
1µF
TP5
GND
3
VDD_EXT
GND
4
ZZ6
Assembly Note
Place Jumper on J13
5
PG
6
8
PGND1
EN
7
R97
1
2
PAD
LABEL "VFEED_EN" i
LABEL "GND" i
C110
3300pF
C111
1µF
R101
3.24k
SH-J13
VFEED_LDO1
9V@1A LDO POWER SUPPLY
R96
0
R98
10.0k
J13
100k
15
ZZ8
Assembly Note
VFEED_LDO2 VFEED_POC2 5V_SW
Place Jumper on pins 1 and 2 for J16
J16
GND
GND
R90
5
2
PGND2
VFEED_POC1
GND
1
9
GND
IN
OUT
1
ON/OFF
ADJ
4
6
NC
NC
J15
1
2
VFEED_LDO1
U4 LM2941LD/NOPB
3
5-146261-1
GND
GND
R99
5
C525
0
R100
8 1µF
DNP 29.4k
7
2
DNP
R102
5.6k
C112
22µF
GND
9
GND
C526
1µF
GND
1
2
3
LABEL "VFEED_LDO2" i
LABEL "VFEED_POC2"i
LABEL "VFEED_SW" i
SH-J16
3
R94 J10
3.24k
5-146261-1
4.7µH
LABEL "VFEED_LDO1" i
LABEL "VFEED_POC1"i
LABEL "VFEED_SW" i
SH-J14
124k
GND
U2 LM2941LD/NOPB
1
LABEL "5V_LDO_EN" i
2
LABEL "GND" i
R93
SH-J85-146261-1
22.1k
R92
14
5V_LDO VDD5V
5V_LDO
5V@1A LDO POWER SUPPLY
R88
0
R89
10.0k
J9
10pF
SH-J8
5-146261-1
1
2
3
LABEL "5V_LDO" i
LABEL "5V_REG" i
LABEL "5V_SW" i
SH-J12
1
2
LABEL "VDD_EXT" i
LABEL "TPS" i
J11
1
2
i TSW-102-07-G-D
i
LABEL "VDD_EXT"
LABEL "VFEED_POC2"
ZZ11
Assembly Note
Place Jumper on pins 1 and 2 for J12
J12
TP4
VDD5V
C100
C102
1µF
9
VDD_EXT
C101
0.1µF
C103
0.1µF
DAP
VDD_EXT
J8
ZZ10
Assembly Note
Place Jumper on J9
DAP
ZZ5
Assembly Note
Place Jumper on J8
J17
R103
VFEED_POC2
10.0k
1
2
R104
3.24k
GND
i LABEL "5V_SW_EN"
i LABEL "GND"
C132
GND
5-146261-1
10µF
GND
GND
J20
i LABEL "GND"
TP9
1
2
LABEL "VDD_EXT" i
LABEL "12V"
i
J24
VDD_EXT
1N5819HW-7-F
D10
40V
5-146261-1
F1
0440002.WR
3
2
C120
22µF
C121
2.2µF
VDD_EXT
C118
0.1µF
TP6
ZZ9
Assembly Note
Place Jumper on J21
4
1
PJ-102A
J21
T1
GND
SH-J21
5-146261-1
J26
J27
5-146261-1
1
R114
3.24k
R118
i LABEL "TPS767 IN"
i LABEL "GND"
TP11
100k
1V8@1A POWER SUPPLY
3V3@1A POWER SUPPLY
5-146261-1
LABEL "VFEED_POC" LABEL "VDDIO"
i
i
R123 R124
2.4k 2.4k
GND
R119
GND
C125
0.1µF
5
6
11
12
D14
Super Red
R125
220
R126
220
1IN
1IN
1OUT
1OUT
2IN
2IN
2OUT
2OUT
TP14
R127
220
GND
GND
GND
4
10
R128
C128
4.7µF
C129
0.1µF
4
6
IN
OUT
ON/OFF
ADJ
NC
NC
GND
GND
8
7
2
C527
1µF
DNP
0
R111
29.4k
DNP
R115
5.6k
C528
1µF
1EN
2EN
C126
0.1µF
1RESET
2RESET
28
22
EP
1GND
2GND
29
3
9
R122
DNP
1
2
7
8
13
14
15
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
16
19
20
21
25
26
27
J28
VDD_1V8
3
2
1
i LABEL "EXP_VDD18"
i LABEL "VDD1V8"
i LABEL "GND"
TP13
TSW-103-07-G-S
TP15
100k
VDD3V3
GND
R129
TPS767D318PWP
FOR INFORMATION ONLY
i
U7B
0
C127
10µF
GND
GND
0
17
18
C119
22µF
GND
R120
23
24
VFEED_LDO2
R109
5
VDD1V8
U7A
0
R121 0
D13
Orange
GND
GND
C124
4.7µF
1
D12
Super Red
1
1
D11
Super Red
VDD5V
VDDIO
2
VFEED_POC1
2
2
VDD5V
2
1
LABEL "5V"
i
VDD_EXT
1
2
5-146261-1
TP10
TP12
ABEL "VDD_EXT"
i
J23
LM2941LD/NOPB
9
1
2
U6
3
1
2
LABEL "VFEED_EN" i
LABEL "GND" i
ACM9070-701-2PL
VFEED_LDO2
9V@1A LDO POWER SUPPLY
R106
0
R107
10.0k
DAP
3
2
1
0
C130
0.1µF
C131
10µF
J29
VDD_3V3
3
2
1
i LABEL "EXP_VDD33"
i LABEL "VDD3V3"
i LABEL "GND"
TSW-103-07-G-S
GND
GND
TPS767D318PWP
Copyright © 2016, Texas Instruments Incorporated
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25
PCB Schematics
J18
5-146261-1
DNP
1
2
VDD5V
R112 0
DNP
www.ti.com
J19
VDD_3V3
3
2
DNP
1
i LABEL "EXP_VDD33"
i LABEL "TPS74801 IN"
i LABEL "GND"
R105
DNP
100k
TSW-103-07-G-S
R110
DNP
0
DNPC113 DNPC114 DNPC115
1µF
4.7µF
0.1µF
1
2
IN
IN
5
EN
DNP
i
R117
DNP
DNPC123 10.0k
4.7µF
7
PG
FB
OUT
DNPOUT
BIAS
SS
DNP
TP8
J25
DNP
U5
4
GND
VDD1V1
TP7
1V1@1.5A POWER SUPPLY
EP
GND
3
8
9
10
R113 DNPC116 DNPC117
C521
DNP
1.87k
0.1µF
10µF
DNP
1µF
11
6
TPS74801TDRCRQ1
DNPC122
0.01µF
2
1DNP
R108
DNP
0
i LABEL "VDD1V1"
i LABEL "VDD1V1 OUT"
5-146261-1
J22
1
2DNP
i LABEL "VDD1V1"
i LABEL "GND"
5-146261-1
C522
DNP
1µF
R116 GND
DNP
4.99k
GND
Copyright © 2016, Texas Instruments Incorporated
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Using the DS90UB934-Q1EVM Evaluation Module
SNLU220 – December 2016
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Copyright © 2016, Texas Instruments Incorporated
Board Layout
www.ti.com
8
Board Layout
Figure 20. Top Overlay
Figure 21. Top Solder
SNLU220 – December 2016
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27
Board Layout
www.ti.com
Figure 22. Top Layer 1
Figure 23. Layer 2
28
Using the DS90UB934-Q1EVM Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
SNLU220 – December 2016
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Board Layout
www.ti.com
Figure 24. Layer 3
Figure 25. Layer 4
SNLU220 – December 2016
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Copyright © 2016, Texas Instruments Incorporated
29
Board Layout
www.ti.com
Figure 26. Layer 5
Figure 27. Bottom Layer 6
30
Using the DS90UB934-Q1EVM Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
SNLU220 – December 2016
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Board Layout
www.ti.com
Figure 28. Bottom Solder
Figure 29. Bottom Overlay
SNLU220 – December 2016
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Using the DS90UB934-Q1EVM Evaluation Module
Copyright © 2016, Texas Instruments Incorporated
31
STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1.
Delivery: TI delivers TI evaluation boards, kits, or modules, including demonstration software, components, and/or documentation
which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms
and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2
Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3
Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
SPACER
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿6丁目24番1号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
SPACER
4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2016, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2016, Texas Instruments Incorporated
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