Texas Instruments | TIC Digital Interface (Rev. A) | Application notes | Texas Instruments TIC Digital Interface (Rev. A) Application notes

Texas Instruments TIC Digital Interface (Rev. A) Application notes
Application Report
SLAA619A – November 2013 – Revised December 2013
TIC Digital Interface
Martin Seeger and Eric Djakam
ABSTRACT
Interfaces for the TIC protocol are mainly based on analog circuits, containing transistor, amplifier, and
comparator stages. They require effort in analog engineering, and the reliability suffers from tolerances,
shifting, and aging analog components.
This application report presents a TIC Digital Interface, which considers an early analog-to-digital
conversion with the help of a ΔΣ-modulator AMC1204 device and, for data processing, a MSP430
microcontroller. Out of the analog TIC signal, the AMC1204 device generates a bit stream, which is used
as clock input for a MSP430 timer module. A transmitted logical “1” leads to a slow-counting frequency,
whereas a “0” leads to a fast-counting frequency. The sampled data is forwarded to the application with a
distinction between cases and a synchronization clock of the MSP430.
Due to its simple design and the internal isolation of the AMC1204 device, the TIC Digital Interface does
not require a transformer in the signal path, unlike analog solutions, which require a transformer.
1
Objective
The goal of the project is to provide an interface for electricity meters. Those meters, used by Electricity of
France (EDF), offer a 2-wire analog interface and allow monitoring of network utilization and power
consumption. The digital interface is designed to convert the analog signal into a digital data stream.
Electricity
Meter
2-Wire
Analog Interface
TI Analog
Front End
Digital Interface
Figure 1.
The following parameters describe the input signal of the analog interface:
• Differential signal
• On-off-keying (OOK) with f = 50 kHz
• Low-Active:
– Logical 1 = Signal off
– Logical 0 = Signal on
• Baud rate: 1200 or 9600 Bd
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TIC Digital Interface
1
Concept Overview
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2
Concept Overview
2.1
System Overview
The proposed interface consists of two components from Texas Instruments:
• ΔΣ-Modulator: AMC1204
• Microcontroller: MSP430
The electricity meter is connected via a 2-wire interface (differential signaling) to the AMC1204 device.
The information, sent by the meter, is transmitted with a baud rate of 1200 Bd or 9600 Bd. The modulator
generates a serial bit stream (see Section 2.2), which is captured by the MSP430. Besides the capturing
this stream, the MSP430 has to process the data and it also provides realtime functionality to generate a
synchronized data stream (see Section 2.3).
AMC1204
MSP430
Analog ± Digital
Modulator
1)
3)
Isolation
Analog
Interface
Output Buffer
2)
Sampling
Electricity
Meter
Logic Unit
Data Capture
and
Synchronization
Customer
Software
Data
Stream
Bit
Stream
Figure 2. System Overview
2.2
Expected Signals and Streams
The relationship of the modulator output to the input difference is described in the AMC1204 device data
sheet:
Modulator Output
+FS (Analog Input)
Difference = 0
–FS (Analog Input)
Analog Input
Figure 3. Analog Input versus Modulator Output
(1)
With this information, the following bit stream is expected:
(1)
2
Texas Instruments, data sheet AMC1204
TIC Digital Interface
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Concept Overview
Data Stream
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“1”
“0”
t
UC
1)
f = 50 kHz
Bit Stream
t
2)
t
Figure 4. Expected Bit Stream from the AMC Modulator
If the amplitude of the input signal is high, the AMC input stage is saturated and the output stage
generates a rectangular signal with f = 50 kHz. With an input signal difference of “0”, the output stage
generates a high-frequency signal, which is expected to range in MHz (depending on the input clock of the
AMC).
2.3
Software Model: Data Sampling and Digital Data Stream
As described in the system overview, the microcontroller MSP430 has two tasks:
1. Sampling the information of the input signal
2. Synchronization and generation of a digital data stream with a baud rate of 1200 or 9600 Bd
For these tasks, two timers are used.
Timer A – Counter Mode for Sampling Data
The clock input of the first timer is connected to the data output pin of the ΔΣ-Modulator AMC1204 device.
Section 2.2) shows that a low-input difference (transmitting a “1”) at the modulator generates a highfrequency signal, which makes the timer count fast. If the input difference is high (transmitting a “0”), the
output signal does not count many edges and timer A counts slowly.
Timer B – Synchronization
The second timer module is used to generate an interrupt event. The event is triggered five times within
the time of a symbol. The following is an example for the higher baud rate:
• Baud rate:
Q
• Time of a transmitted symbol:
7sym
• Oversampling:
n
• Time of Timer A's counter value:
7ISR
9600 Bd
1
Q
1
9600 Bd
104.16 Ps
5
7sym
n
104.16 Ps
5
20.83 Ps
The main clock MCLK of the microcontroller is set to ƒMCLK = 12 MHz. The counter compare value is set to:
• Timer B's counter compare value:
n
7ISR x fMCLK
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20.83 Ps x 12 MHz
250
TIC Digital Interface
3
Prototype
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If the difference between the counter values n(t) to the previous n(t – 1) is higher than a value
THRESHOLD, the value “0” is saved in a local buffer.
Timer B – ISR for Data Processing
If the timer B event was launched five times, a simple average algorithm checks if the last five values were
a “0” or “1”. The algorithm can be improved to provide a more reliable system.
3
Prototype
To build a prototype, the following EVM and launchpad from Texas Instruments were used:
• AMC1204EVM
• MSP430 Launchpad with MSP430G2553
Figure 5. Prototype
EVM: AMC1204
TIC Analog Interface
Launchpad: MSP430
TIC Digital Interface
+3.3 V
(provided by USB)
+5 V
IN±
DATA
P1.0(TAOCLK)
CLKIN
P1.4(SMCLK)
P1.6(GIO)
Figure 6. Prototype Design – EVM Board Connection
The software is written in Code Composer Studio™ 5.4, which can be downloaded for free.
4
TIC Digital Interface
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Prototype
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Figure 7. Code Composer Studio™ 5.4
Verifying the expected waveforms and signals:
Ch.1: CLK_in
provided by MCU
Ch.2: DATA_out
from AMC
Ch.3: Detected
logical value 1
Ch.4: Analog input
signal (50 KHz)
Figure 8. Transmitting a Logical "1"
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Prototype
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Ch.1: CLK_in
provided by MCU
Ch.2: DATA_out
from AMC
Ch.3: Detected
logical value 0
Ch.4: Analog input
signal (50 KHz)
Figure 9. Transmitting a Logical "0"
6
TIC Digital Interface
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Summary
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4
Summary
In this application study, a frontend is considered which uses a ΔΣ-modulator AMC1204 device and a microcontroller of the MSP430 family from
Texas Instruments. A short summary is shown in Figure 10:
INPUT SIGNAL
AMC1204 ± Output Bit Stream
Software Algorithm
Sent by e-meter:
x Differential signal
x On-Off-Keying (OOK)
x F = 50 kHz
x Low-Active
o /RJLFDO³1´= Signal off
o /RJLFDO³0´= Signal on
x Baud rate: 1200 or 9600 Bd
The AMC modulator generates an output bit stream, which
depends on the input difference of IN+ and IN±.
Describing the extreme values, a difference (almost) zero
generates a high-frequency rectangular signal (some MHz),
whereas a sinusoidal waveform input with a high amplitude
generates a rectangular signal with f = 50 kHz.
This signal will be used as input clock of the Timer A
module of the logic unit.
The software, triggered by the synchronization clock Timer B
(oversampling factor = 5), checks the difference of the counted
edges (rising edges) from Timer A between each trigger event.
7KHWUDQVPLWWHG³1´LVGHWHFWHGE\DELJFRXQWHUGLIIHUHQFH
(high-frequency input clock), ZKHUHDVWKHWUDQVPLWWHG³0´RQO\
generates a small counter difference (low-frequency input
clock).
A threshold can be defined to adjust the system.
The data stream is stored in the RAM.
AMC1204
MSP430
IN+
DATA_out
Isolation Barrier
û Mod.
IN±
P1.0
Timer A
Counter Mode
Data
Capture
Software
Algorithm
ISR
Synchronization
CLK_in
P1.4
6 MHz
System Clock
SMCLK
Stored Data
Stream
Timer B
Compare Mode
P1.4 ± Clock Output ± SMCLK
Timer B ± Synchronization Clock
To generate the û bit stream, the SMCLK is lead through
P1.4. The MSP430 main clock is set to 12 MHz, so the
provided clock is SMCLK = CLK / 2 = 6 MHz.
The data, sent by the e-meter, might be transmitted with a data
speed of 1200 or 9600 Bd. Timer B is used to generate a ISR
whose period is derived from the baud rate, to synchronize the
digitalized data stream to the analog input signal.
Figure 10. Concept Overview
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Test Setting and Results
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The TIC Digital Interface was built with official TI evaluation modules: AMC1204 Evaluation Module and
MSP430 LaunchPad Value Line Development Kit. The principle was tested and proved in the laboratory.
Recommended next work packages:
• Test in a real environment: As the TIC digital interface was only tested in the laboratory without an
actual meter, TI recommends to prove this concept with an electricity meter.
• Termination: The principle was tested with a TTL output of the waveform generator. Optional
impedance matching has to be designed.
• Isolation: Referring to the data sheet, the AMC1204 device allows isolation:
– Isolation Voltage: 4250 VPEAK (AMC1204B device)
– Working Voltage: 1200 VPEAK
NOTE: The isolation level must be confirmed with official regulations and specifications.
5
Test Setting and Results
To verify the concept, the system is tested with following setup:
1. Data stream generator: A pseudo-random data stream is used as the trigger input for the waveform
generator (2) – dark blue line (indicated by "Ch 1" label in Figure 11)
2. Waveform generator: With the trigger input, the waveform generator generates the OOK-signal (see
Section 1). The analog signal is used as the input signal for the frontend – turquoise line (indicated by
"Ch 2" label in Figure 11)
3. TI analog front end: connections → see Figure 10; internal delta-sigma stream – pink line (indicated
by "Ch 3" label in Figure 11) between AMC EVM and MSP430 Launchpad
4. Oscilloscope: The oscilloscope measures the following signals:
Ch.1: Generated bit stream – dark blue line
Ch.2: OOK- Signal waveform generator – turquoise line
Ch.3: Delta-sigma stream – pink line
Ch.4: Output data – green testpoint
Ch 2
2) Waveform generator
4) Oscilloscope
Ch 1
1) Data Stream Generator
Ch 3
3) TI Analog Frontend
Ch 4
Figure 11. Test Setup
8
TIC Digital Interface
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Test Setting and Results
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Figure 12 shows the test results:
Ch.1: Generated Bit
Stream (1)
Ch.2: OOK‐ Signal
Waveform‐Gen (2)
Ch.3: Delta‐Sigma
Stream
Ch.4: Output data
Figure 12. Test Results
The oscilloscope shows that the input data are correctly digitalized from the analog OOK signal.
Due to data processing, a latency of ≈100 µs is measured.
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TIC Digital Interface
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Appendix A References With Links
•
•
•
•
•
•
10
Texas Instruments, AMC1204 data sheet
Texas Instruments, AMC1204 Evaluation Module
Texas Instruments, MSP430 LaunchPad Value Line development kit
Texas Instruments, MSP430G2553
Texas Instruments, Code Composer Studio 5.4
EDF, “Sorties de télé-information client des appareils de comptage électroniques utilisés par ERDF"
TIC Digital Interface
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Revision History
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Revision History
Changes from Original (November 2013) to A Revision ................................................................................................ Page
•
Updated interface graphic
...............................................................................................................
1
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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Revision History
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