Texas Instruments | ISO7041 EVM (Rev. A) | User Guides | Texas Instruments ISO7041 EVM (Rev. A) User guides

Texas Instruments ISO7041 EVM (Rev. A) User guides
User's Guide
SLAU797A – June 2017 – Revised June 2019
ISO70xx Low-Power Digital Isolator Evaluation Module
This user’s guide describes the ISO7041 Low-Power Isolator Digital Isolator Evaluation Module (EVM).
This EVM allows designers to evaluate device performance for fast development and analysis of isolated
systems. The EVM supports evaluation of any of the quad-channel Low-Power digital isolators in a 16-pin
SSOP (DBQ) package.
CAUTION
This evaluation module is made available for isolator parameter performance
evaluation only and is not intended for isolation voltage testing. To prevent
damage to the EVM, any voltage applied as a supply or digital input/output
must be maintained within the 0 V to 3.63 V recommended operating range.
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Contents
Introduction ...................................................................................................................
Overview ......................................................................................................................
Pin Configuration of the ISO7041 Low-Power Digital Isolator .........................................................
ISO7041DBQ EVM Board Block Diagram and Image ..................................................................
EVM Setup and Operation ..................................................................................................
Bill of Materials ...............................................................................................................
EVM Schematics and Layout ..............................................................................................
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List of Figures
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ISO7041DBQ EVM Configuration .........................................................................................
ISO7041DBQ EVM Photograph ...........................................................................................
Basic EVM Operation .......................................................................................................
Typical Input and Output Waveforms .....................................................................................
ISO7041DBQ EVM Schematic .............................................................................................
ISO7041DBQ PCB Layout..................................................................................................
ISO7041 Low-Power Digital Isolator Pin Configurations
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List of Tables
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Bill of Materials
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Trademarks
All trademarks are the property of their respective owners.
SLAU797A – June 2017 – Revised June 2019
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ISO70xx Low-Power Digital Isolator Evaluation Module
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1
Introduction
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Introduction
This user’s guide describes EVM operation with respect to the ISO7041 Low-Power digital isolator.
However, the EVM may be reconfigured for evaluation of any of TI’s quad-channel digital isolators in a 16pin SSOP (DBQ) package. This guide also describes the EVM schematic, and typical laboratory setup. A
typical input and output waveform is also presented.
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Overview
The ISO7041 is TI’s new low-power digital isolator device capable of a galvanic isolation rating of up to
4000 VPK. This device is certified to meet reinforced isolation requirements by VDE and CSA. This isolator
provides high electromagnetic immunity and low emissions at low power consumption, while isolating
CMOS or LVCMOS digital I/Os. The ISO7041 digital isolator has logic input and output buffers separated
by a silicon oxide (SiO2) insulation barrier. Used with isolated power supplies, this device blocks high
voltages, isolates grounds, and prevents noise currents on a data bus or other circuits from entering the
local ground and interfering with, or damaging sensitive circuitry. Additionally, the ISO7041 operates on
very low power. ISO7041DBQEVM is designed to allow users to evaluate the ISO7041. The 2-channel
ISO7021 performance can also be evaluated using the ISO7041 installed on the ISO7041DBQEVM. The
ISO7721DEVM can be used to install the ISO7021 for further 2-channel evaluation.
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Pin Configuration of the ISO7041 Low-Power Digital Isolator
Figure 1 shows the ISO7041 low-power quad-channel digital isolator pin configuration.
Figure 1. ISO7041 Low-Power Digital Isolator Pin Configurations
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ISO70xx Low-Power Digital Isolator Evaluation Module
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ISO7041DBQ EVM Board Block Diagram and Image
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ISO7041DBQ EVM Board Block Diagram and Image
Figure 2 shows the board configuration for evaluation of the ISO7041 quad-channel digital isolator.
Figure 2. ISO7041DBQ EVM Configuration
Figure 3 shows the photograph of the EVM.
Figure 3. ISO7041DBQ EVM Photograph
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EVM Setup and Operation
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EVM Setup and Operation
This section describes the setup and operation of the EVM for parameter performance evaluation.
Figure 4 shows the configuration for operating the ISO70xx triple and quad digital isolator EVM using two
power supplies and two voltmeter. Rs1 and Rs2 allow the user to easily measure the low current
consumed by the ISO7041 without the need for specialized equipment. Current consumed by a particular
side of the ISO7041 can simply be calculated by measuring the voltage drop across the respective Rs
resistor and dividing that value by it's resistance. Rs1 and Rs2 will need to be populated with a resistance
that allows the user to accurately measure the voltage across them. This value will typically range
between 400 and 600 ohms. Higher resistances can be used but Vsupply will have to be increased in
order to compensate for the increased voltage drop over Rs1 and Rs2. Please be sure to use high
accuracy resistors of 0.1% tolerance or better for the most accurate measurements and calculations.
Figure 4. Basic EVM Operation
Figure 5 shows typical input and output waveforms of the EVM for a 1-MHz clock. The input is shown as
channel 3, and the output is shown as channel 4.
Figure 5. Typical Input and Output Waveforms
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ISO70xx Low-Power Digital Isolator Evaluation Module
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Bill of Materials
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Bill of Materials
Table 1 shows the bill of materials (BOM) for this EVM.
Table 1. Bill of Materials
Item
Designator
Description
Manufacturer
PartNumber
Quantity
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J1, J2
Header, 2.54 mm, 7 x 2, Gold, SMT
Wurth
61001421121
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2
C1, C4
CAP, CERM, 10 uF, 35 V, +/- 10%,
X5R, 0805
MuRata
GRM21BR6YA106KE
43L
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2
C2, C5
CAP, CERM, 1 µF, 50 V, ±10%,
X5R, 0603
TDK
C1608X5R1E105K08
0AC
2
3
C3, C6
CAP, CERM, 0.1 µF, 25 V, ±5%,
X7R, 0603
AVX
06033C104JAT2A
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4
H1, H2, H3, H4
Bumpon, Hemisphere, 0.44 × 0.20,
Clear
3M
SJ-5303 (CLEAR)
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5
J5, J6
Header, 2.54 mm, 2 x 1, Gold, TH
Wurth Elektronik
61300211121
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6
J3, J4
Header, 100 mil, 3 × 1, Gold, TH
Samtec
HTSW-103-07-G-S
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7
TP1, TP2, TP3,
TP4, TP5, TP6,
TP7, TP8, TP9,
TP10, TP11, and
TP12
Test Point, Miniature, SMT
Keystone
5019
12
8
U1
Ultra-Low Power Four-Channel
Digital Isolator
Texas Instruments
ISO7041DBQ
1
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EVM Schematics and Layout
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EVM Schematics and Layout
The ISO7041DBQ EVM is designed to accommodate any of the ISO70xx Low-Power devices in a 16-pin SSOP. To evaluate any of the ISO70xx
Low-Power devices in a 16-pin SSOP package, replace ISO7741DBQ with the device of interest on the ISO7041DBQ EVM PCB. No other
component requires any modification. Figure 6 shows the ISO7041DBQEVM schematic and Figure 7 shows the printed-circuit board (PCB) layout.
Figure 6. ISO7041DBQ EVM Schematic
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ISO70xx Low-Power Digital Isolator Evaluation Module
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EVM Schematics and Layout
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Figure 7. ISO7041DBQ PCB Layout
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