Texas Instruments | TXB0101 1-Bit Bidirectional Level-Shifting and Voltage Translator With Auto Direction-Sensing and ±15-kV ESD Protection (Rev. D) | Datasheet | Texas Instruments TXB0101 1-Bit Bidirectional Level-Shifting and Voltage Translator With Auto Direction-Sensing and ±15-kV ESD Protection (Rev. D) Datasheet

Texas Instruments TXB0101 1-Bit Bidirectional Level-Shifting and Voltage Translator With Auto Direction-Sensing and ±15-kV ESD Protection (Rev. D) Datasheet
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TXB0101
SCES639D – JANUARY 2007 – REVISED MARCH 2017
TXB0101 1-Bit Bidirectional Level-Shifting and Voltage Translator
With Auto Direction-Sensing and ±15-kV ESD Protection
1 Features
3 Description
•
This 1-bit noninverting translator uses two separate
configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed to
track VCCB. VCCB accepts any supply voltage from
1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.2-V,
1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
VCCA should not exceed VCCB.
1
•
•
•
•
•
•
•
Available in the Texas Instruments NanoFree™
Package
1.2 V to 3.6 V on A Port and
1.65 V to 5.5 V on B Port (VCCA ≤ VCCB)
VCC Isolation Feature – If Either VCC Input is at
GND, All Outputs are in the High-Impedance State
OE Input Circuit Referenced to VCCA
Low Power Consumption, 5 μA Maximum ICC
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– A Port
– 2000 V Human Body Model (A114-B)
– 250 V Machine Model (A115-A)
– 1500 V Charged-Device Model (C101)
– B Port
– 15 kV Human Body Model (A114-B)
– 250 V Machine Model (A115-A)
– 1500 V Charged-Device Model (C101)
When the output-enable (OE) input is low, all outputs
are placed in the high-impedance state.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
To ensure the high-impedance state during power up
or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
NanoFree™ package technology is a major
breakthrough in IC packaging concepts, using the die
as the package.
Device Information(1)
2 Applications
•
•
•
•
PART NUMBER
Handsets
Smartphones
Tablets
Desktop PCs
PACKAGE
BODY SIZE (NOM)
TXB0101DBV
SOT-23 (6)
2.90 mm × 1.60 mm
TXB0101DCK
SC70 (6)
2.00 mm × 1.25 mm
TXB0101DRL
SOT (6)
1.60 mm × 1.20 mm
TXB0101YZP
DSBGA (6)
1.1 mm × 1.20 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Operating Circuit
1.8 V
3.3 V
1.8-V
System
Controller
VCCA
VCCB
OE
3.3-V
System
TXB0101
Data
GND
A
B
GND
Data
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TXB0101
SCES639D – JANUARY 2007 – REVISED MARCH 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specification...........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
1
1
1
2
3
4
Absolute Maximum Ratings ...................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 5
Electrical Characteristics .......................................... 5
Timing Requirements, VCCA = 1.2 V ........................ 6
Timing Requirements, VCCA = 1.5 V ± 0.1 V ........... 6
Timing Requirements, VCCA = 1.8 V ± 0.15 V ......... 6
Timing Requirements, VCCA = 2.5 V ± 0.2 V ........... 6
Timing Requirements, VCCA = 3.3 V ± 0.3 V ......... 6
Switching Characteristics, VCCA = 1.2 V ................ 7
Switching Characteristics, VCCA = 1.5 V ± 0.1 V ... 7
Switching Characteristics, VCCA = 1.8 V ± 0.15 V . 7
Switching Characteristics, VCCA = 2.5 V ± 0.2 V ... 8
Switching Characteristics, VCCA = 3.3 V ± 0.3 V ... 8
Operating Characteristics........................................ 8
6.17 Typical Characteristics ............................................ 9
7
8
Parameter Measurement Information ................ 10
Detailed Description ............................................ 11
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
11
11
11
12
Application and Implementation ........................ 13
9.1 Application Information............................................ 13
9.2 Typical Application ................................................. 13
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support ................. 17
12.1
12.2
12.3
12.4
12.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
17
13 Mechanical, Packaging, and Orderable
Information ........................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (June 2015) to Revision D
Page
•
Added Absolute maximum junction temperature, TJ in Absolute Maximum Ratings ............................................................ 4
•
Added TXB0101 Port A and Port B specifications in ESD Ratings table............................................................................... 4
•
Added Receiving Notification of Documentation Updates section ....................................................................................... 17
Changes from Revision B (May 2012) to Revision C
Page
•
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
•
Removed Ordering Information table .................................................................................................................................... 1
Changes from Revision A (November 2008) to Revision B
•
2
Page
Added notes to pin out graphics............................................................................................................................................. 3
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TXB0101
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SCES639D – JANUARY 2007 – REVISED MARCH 2017
5 Pin Configuration and Functions
DBV Package
6-Pin SOT-23
Top View
DCK Package
6-Pin SC70
Top View
VCCA
1
6
VCCB
GND
2
5
OE
A
3
VCCA
1
6
VCCB
GND
2
5
OE
A
3
4
B
B
4
DRL Package
6-Pin SOT
Top View
VCCA
1
6
VCCB
GND
2
5
OE
A
3
4
B
YZP Package
6-Ball DSBGA
Bottom View
A
C1
3 4 C2
B
GND
VCCA
B1
2 5 B2
A1
1 6
OE
VCCB
A2
A.
See mechanical drawings for dimensions.
B.
Pullup resistors are not required on both sides for Logic I/O.
C.
If pullup or pulldown resistors are needed, the resistor value must be over 50 kΩ.
D.
50 kΩ is a safe recommended value, if the customer can accept higher Vol or lower Voh, smaller pullup or pulldown
resistor is allowed, the draft estimation is Vol = Vccout × 4.5 k / (4.5 k + Rpu) and Voh = Vccout × Rdw / (4.5 k +
Rdw).
E.
If pull up resistors are needed, please refer to the TXS0101 or contact TI.
F.
For detailed information, please refer to application note SCEA043.
Pin Functions
PIN
NO.
NAME
TYPE
DESCRIPTION
1
VCCA
—
A-port supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V and VCCA ≤ VCCB
2
GND
—
Ground
3
A
I/O
Input/output A. Referenced to VCCA.
4
B
I/O
Input/output B. Referenced to VCCB.
5
OE
I
6
VCCB
—
3-state output enable. Pull OE low to place all outputs in 3-state mode.
Referenced to VCCA.
B-port supply voltage. 1.65 V ≤ VCCB ≤ 5.5 V
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SCES639D – JANUARY 2007 – REVISED MARCH 2017
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6 Specification
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
VCCA
Supply voltage
–0.5
4.6
VCCB
Supply voltage
–0.5
6.5
VI
Input voltage (2)
–0.5
6.5
V
VO
Voltage applied to any output in the high-impedance or power-off state (2)
–0.5
6.5
V
VO
Voltage applied to any output in the high or low state (2)
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCCA, VCCB, or GND
±100
mA
TJMAX
Absolute maximum junction temperature
150
°C
Tstg
Storage temperature
150
°C
(1)
(2)
(3)
(3)
–65
UNIT
V
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative Voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
UNIT
TXB0101 Port A
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1500
V
TXB0101 Port B
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
V(ESD)
(1)
(2)
Electrostatic discharge
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±15
kV
±1500
V
JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
See
(1) (2)
.
VCCA
VCCA
VCCB
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
Δt/Δv
Input transition
rise or fall rate
TA
(1)
(2)
(3)
4
VCCB
MIN
MAX
1.2
3.6
1.65
5.5
Data inputs
1.2 V to 3.6 V
1.65 V to 5.5 V
VCCI × 0.65 (3)
VCCI
OE
1.2 V to 3.6 V
1.65 V to 5.5 V
VCCA × 0.65
5.5
Data inputs
1.2 V to 5.5 V
1.65 V to 5.5 V
0
VCCI × 0.35 (3)
OE
1.2 V to 3.6 V
1.65 V to 5.5 V
0
VCCA × 0.35
A-port inputs
1.2 V to 3.6 V
1.65 V to 5.5 V
40
B-port inputs
1.2 V to 3.6 V
1.65 V to 3.6 V
40
4.5 V to 5.5 V
30
Operating free-air temperature
–40
85
UNIT
V
V
V
ns/V
°C
The A and B sides of an unused data I/O pair must be held in the same state, i.e., both at VCCI or both at GND.
VCCA must be less than or equal to VCCB and must not exceed 3.6 V.
VCCI is the supply voltage associated with the input port.
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6.4 Thermal Information
TXB0101
THERMAL METRIC
RθJA
(1)
DCK
(SC70)
DRL (SOT)
YZP
(DSBGA)
6 PINS
6 PINS
6 PINS
6 PINS
UNIT
192.3
266.9
204.2
105.8
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
164.8
80.4
76.4
1.6
°C/W
RθJB
Junction-to-board thermal resistance
38.6
99.1
38.7
10.8
°C/W
ψJT
Junction-to-top characterization parameter
43.7
1.5
3.4
3.1
°C/W
ψJB
Junction-to-board characterization parameter
38.1
98.3
38.5
10.8
°C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance
N/A
N/A
N/A
N/A
°C/W
(1)
Junction-to-ambient thermal resistance
DBV (SOT23)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (1) (2)
PARAMETER
TEST
CONDITIONS
VCCA
VCCB
VOLA
IOL = 20 μA
VOHB
IOH = –20 μA
1.65 V to 5.5 V
VOLB
IOL = 20 μA
1.65 V to 5.5 V
Ioff
IOZ
TYP
–40°C to 85°C
MAX
MIN
TYP MAX
1.1
IOH = –20 μA
OE
MIN
1.2 V
VOHA
II
TA = 25°C
1.4 V to 3.6 V
V
VCCA – 0.4
1.2 V
0.9
1.4 V to 3.6 V
0.4
VCCB – 0.4
V
V
μA
1.2 V to 3.6 V
1.65 V to 5.5 V
±1
±2
0V
0 V to 5.5 V
±1
±2
B port
0 V to 3.6 V
0V
±1
±2
1.2 V to 3.6 V
1.65 V to 5.5 V
±1
±2
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
3
3.6 V
0V
2
OE = GND
VI = VCCI or GND,
IO = 0
ICCA
0V
5.5 V
1.65 V to 5.5 V
VI = VCCI or GND,
IO = 0
1.4 V to 3.6 V
1.65 V to 5.5 V
5
3.6 V
0V
–2
0V
5.5 V
ICCA + ICCB
VI = VCCI or GND,
IO = 0
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
VI = VCCI or GND,
IO = 0,
OE = GND
1.2 V
1.65 V to 5.5 V
ICCZA
1.4 V to 3.6 V
1.65 V to 5.5 V
VI = VCCI or GND,
IO = 0,
OE = GND
1.2 V
1.65 V to 5.5 V
ICCZB
1.4 V to 3.6 V
1.65 V to 5.5 V
1.2 V to 3.6 V
1.65 V to 5.5 V
1.2 V to 3.6 V
1.65 V to 5.5 V
Ci
Cio
(1)
(2)
OE
A port
B port
μA
μA
0.06
1.2 V
ICCB
V
0.4
A port
A or B port
UNIT
μA
–2
3.4
μA
2
3.5
8
μA
0.05
3
μA
3.3
5
2.5
3
5
6
11
13
μA
pF
pF
VCCI is the supply voltage associated with the input port.
VCCO is the supply voltage associated with the output port.
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6.6 Timing Requirements, VCCA = 1.2 V
TA = 25°C, VCCA = 1.2 V
VCCB = 1.8 V
Data rate
tw
Pulse duration
Data inputs
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
UNIT
TYP
TYP
TYP
TYP
20
20
20
20
Mbps
50
50
50
50
ns
6.7 Timing Requirements, VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
Data rate
tw
Pulse duration
VCCB = 2.5 V
± 0.2 V
MAX
MIN
MAX
40
Data inputs
VCCB = 3.3 V
± 0.3 V
MIN
MAX
40
25
VCCB = 5 V
± 0.5 V
MIN
40
25
40
25
UNIT
MAX
25
Mbps
ns
6.8 Timing Requirements, VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
Data rate
tw
Pulse duration
VCCB = 2.5 V
± 0.2 V
MAX
MIN
MAX
60
Data inputs
17
VCCB = 3.3 V
± 0.3 V
MIN
VCCB = 5 V
± 0.5 V
MAX
60
MIN
60
17
60
17
UNIT
MAX
17
Mbps
ns
6.9 Timing Requirements, VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
VCCB = 2.5 V
± 0.2 V
MIN
Data rate
tw
Pulse duration
VCCB = 3.3 V
± 0.3 V
MAX
MIN
MAX
100
Data inputs
VCCB = 5 V
± 0.5 V
MIN
100
10
100
10
UNIT
MAX
10
Mbps
ns
6.10 Timing Requirements, VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
VCCB = 3.3 V
± 0.3 V
MIN
Data rate
tw
6
Pulse duration
VCCB = 5 V
± 0.5 V
MAX
MIN
100
Data inputs
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10
UNIT
MAX
100
10
Mbps
ns
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SCES639D – JANUARY 2007 – REVISED MARCH 2017
6.11 Switching Characteristics, VCCA = 1.2 V
TA = 25°C, VCCA = 1.2 V
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
B
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
UNIT
TYP
TYP
TYP
TYP
B
6.9
5.7
5.3
5.5
A
7.4
6.4
6
5.8
A
1
1
1
1
B
1
1
1
1
A
18
15
14
14
B
20
17
16
16
trA, tfA
A-port rise and fall times
4.2
4.2
4.2
4.2
trB, tfB
B-port rise and fall times
2.1
1.5
1.2
1.1
ns
20
20
20
20
Mbps
tpd
ten
OE
tdis
OE
Max data rate
ns
μs
ns
ns
6.12 Switching Characteristics, VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
B
1.4
12.9
1.2
10.1
A
0.9
14.2
0.7
12
VCCB = 5 V
± 0.5 V
UNIT
MAX
MIN
MAX
1.1
10
0.8
9.9
0.4
11.7
0.3
13.7
A
1
1
1
1
B
1
1
1
1
ns
μs
A
5.9
31
5.7
25.9
5.6
23
5.7
22.4
B
5.4
30.3
4.9
22.8
4.8
20
4.9
19.5
trA, tfA
A-port rise and fall times
1.4
5.1
1.4
5.1
1.4
5.1
1.4
5.1
ns
trB, tfB
B-port rise and fall times
0.9
4.5
0.6
3.2
0.5
2.8
0.4
2.7
ns
Max data rate
40
40
40
40
ns
Mbps
6.13 Switching Characteristics, VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.6
11
1.4
7.7
1.3
6.8
1.2
6.5
A
1.5
12
1.3
8.4
1
7.6
0.9
7.1
A
1
1
1
1
B
1
1
1
1
A
5.9
31
5.1
21.3
5
19.3
5
17.4
B
5.4
30.3
4.4
20.8
4.2
17.9
4.3
16.3
trA, tfA
A-port rise and fall times
1
4.2
1.1
4.1
1.1
4.1
1.1
4.1
trB, tfB
B-port rise and fall times
0.9
4.5
0.6
3.2
0.5
2.8
0.4
2.7
Max data rate
60
60
60
60
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ns
μs
ns
ns
ns
Mbps
7
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SCES639D – JANUARY 2007 – REVISED MARCH 2017
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6.14 Switching Characteristics, VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
B
1.1
A
1.2
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
6.3
1
5.2
0.9
4.7
6.6
1.1
5.1
0.9
4.4
A
1
1
1
B
1
1
1
A
5.1
21.3
4.6
15.2
4.6
13.2
B
4.4
20.8
3.8
16
3.9
13.9
trA, tfA
A-port rise and fall times
0.8
3
0.8
3
0.8
3
trB, tfB
B-port rise and fall times
0.7
3
0.5
2.8
0.4
2.7
Max data rate
100
100
ns
μs
ns
ns
ns
100
Mbps
6.15 Switching Characteristics, VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
B
0.9
4.7
0.8
4
A
1
4.9
0.9
4.5
A
1
1
B
1
1
A
4.6
15.2
4.3
12.1
B
3.8
16
3.4
13.2
ns
μs
ns
trA, tfA
A-port rise and fall times
0.7
2.5
0.7
2.5
ns
trB, tfB
B-port rise and fall times
0.5
2.3
0.4
2.7
ns
Max data rate
100
100
Mbps
6.16 Operating Characteristics
TA = 25°C
VCCA
1.2 V
1.2 V
1.5 V
1.8 V
2.5 V
2.5 V
3.3 V
2.5 V
5V
3.3 V
to
5V
VCCB
PARAMETER
TEST CONDITIONS
5V
CpdA
CpdB
CpdA
CpdB
8
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
B-port input, A-port output
CL = 0, f = 10 MHz,
tr = tf = 1 ns,
OE = VCCA
(outputs enabled)
CL = 0, f = 10 MHz,
tr = tf = 1 ns,
OE = GND
(outputs disabled)
1.8 V
1.8 V
1.8 V
UNIT
TYP
TYP
TYP
TYP
TYP
TYP
7.8
8
8
7
7
8
TYP
8
12
11
11
11
11
11
11
38.1
28
29
29
29
29
30
25.4
18
17
17
18
20
21
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.02
0.01
0.01
0.01
0.01
0.01
0.01
0.03
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pF
pF
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6.17 Typical Characteristics
6
25°C (Room Temp)
-40°C
85°C
5
A Port I/O Capacitance (pF)
OE Pin Input Capacitance (pF)
6
4
3
2
1
5
4
3
2
25°C (Room Temp)
-40°C
85°C
1
0
0
0
0.5
1
1.5
2
2.5
3
3.5
0
4
VCCA (V)
0.5
1
1.5
D001
VCCB = 3.3 V
2
2.5
VCCA (V)
3
3.5
4
D002
VCCB = 3.3 V
Figure 1. Input Capacitance for OE pin (CI) vs Power Supply
(VCCA)
Figure 2. Capacitance for A Port I/O Pins (CiO) vs Power
Supply (VCCA)
B Port I/O Capacitance (pF)
12
10
8
6
4
25°C (Room Temp)
-40°C
85°C
2
0
0
0.5
1
1.5
2
2.5
3
VCCB (V)
3.5
4
4.5
5
5.5
D003
VCCA = 1.8 V
Figure 3. Capacitance for B Port I/O Pins (CiO) vs Power Supply (VCCB)
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7 Parameter Measurement Information
2 × VCCO
From Output
Under Test
50 kΩ
From Output
Under Test
15 pF
15 pF
1 MΩ
Open
50 kΩ
LOAD CIRCUIT FOR
ENABLE/DISABLE
TIME MEASUREMENT
LOAD CIRCUIT FOR MAX DATA RATE,
PULSE DURATION PROPAGATION
DELAY OUTPUT RISE AND FALL TIME
MEASUREMENT
S1
TEST
S1
tPZL/tPLZ
tPHZ/tPZH
2 × VCCO
Open
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
tPHL
tw
Output
VCCO/2
0.9
VCCO
0.1
VCCO
tr
VOH
VCCI
VCCO/2
tf
VOL
Input
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
A.
B.
C.
D.
E.
F.
G.
VCCI/2
CL includes probe and jig capacitance.
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 W, dv/dt ≥ 1 V/ns.
The outputs are measured one at a time, with one transition per measurement.
tPLH and tPHL are the same as tpd.
VCCI is the VCC associated with the input port.
V CCO is the VCC associated with the output port.
All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuits and Voltage Waveforms
10
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8 Detailed Description
8.1 Overview
The TXB0101 device is a 1-bit directionless level-shifting and voltage translator specifically designed for
translating logic voltage levels. The A port accepts I/O voltages ranging from 1.2 V to 3.6 V, while the B port is
able to accept I/O voltages from 1.65 V to 5.5 V. The device is a buffered architecture with edge rate
accelerators (one-shots) to improve the overall data rate. This device can only translate push-pull CMOS logic
outputs. If for open-drain signal translation, see TI TXS010X products.
8.2 Functional Block Diagram
VCCA
VCCB
OE
One-Shot
4 NŸ
A
B
One-Shot
4 NŸ
8.3 Feature Description
8.3.1 Architecture
The TXB0101 architecture (see Figure 5) does not require a direction-control signal to control the direction of
data flow from A to B or from B to A. In a DC state, the output drivers of the TXB0101 can maintain a high or low,
but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts
flowing the opposite direction.
The output one-shots detect rising or falling edges on the A or B ports. During a rising edge, the one-shot turns
on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly,
during a falling edge, the one-shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up
the high-to-low transition. The typical output impedance during output transition is 70 Ω at VCCO = 1.2 V to 1.8 V,
50 Ω at VCCO = 1.8 V to 3.3 V, and 40 Ω at VCCO = 3.3 V to 5 V.
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Feature Description (continued)
VCCA
VCCB
One
Shot
T1
4k
One
Shot
T2
A
B
One
Shot
T3
4k
T4
One
Shot
Figure 5. Architecture of TXB0101 I/O Cell
8.3.2 Power Up
During operation, ensure that VCCA ≤ VCCB at all times. During power up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first. The TXB0101 has circuitry that disables all
output ports when either VCC is switched off (VCCA/B = 0 V) and are placed in high-impedance state.
8.3.3 Enable and Disable
The TXB0101 has an OE input that is used to disable the device by setting OE = low, which places all I/Os in the
high-impedance (Hi-Z) state. The disable time (tdis) indicates the delay between when OE goes low and when the
outputs are actually disabled (Hi-Z). The enable time (ten) indicates the amount of time the user must allow for
the one-shot circuitry to become operational after OE is taken high.
8.3.4 Pullup or Pulldown Resistors on I/O Lines
The TXB0101 is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0101 have lowDC drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must be
kept higher than 50 kΩ to ensure that they do not contend with the output drivers of the TXB0101.
For the same reason, the TXB0101 should not be used in applications such as I2C or 1-Wire where an opendrain driver is connected on the bidirectional data I/O. For these applications, use a device from the TI TXS010X
series of level translators.
8.4 Device Functional Modes
The TXB0101 device has two functional modes, enabled and disabled. To disable the device set the OE input
low, which places all I/Os in a high-impedance state. Setting the OE input high will enable the device.
12
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TXB0101 can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another. It can only translate push-pull CMOS logic outputs. If for open-drain
signal translation, see TI TXS010X products. Any external pulldown or pullup resistors are recommended larger
than 50 kΩ.
9.2 Typical Application
1.8 V
3.3 V
1.8-V
System
Controller
VCCA
VCCB
OE
3.3-V
System
TXB0101
Data
A
GND
B
Data
GND
GND
Figure 6. Typical Application Circuit
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1. And make sure that VCCA ≤ VCCB.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
1.2 V to 3.6 V
Output voltage range
1.65 V to 5.5 V
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9.2.1.1 Input Driver Requirements
Typical IIN vs VIN characteristics of the TXB0101 are shown in Figure 7. For proper operation, the device driving
the data I/Os of the TXB0101 must have drive strength of at least ±2 mA.
IIN
VT/4 kΩ
VIN
–(VD – VT)/4 kΩ
A. VT is the input threshold voltage of the TXB0101 (typically VCCI/2.
B. VD is the supply voltage of the external driver.
Figure 7. Typical IIN vs VIN Curve
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
– Use the supply voltage of the device that is driving the TXB0101 device to determine the input voltage
range. For a valid logic HIGH the value must exceed the VIH of the input port. For a valid logic LOW the
value must be less than the VIL of the input port.
• Output voltage range
– Use the supply voltage of the device that the TXB0101 device is driving to determine the output voltage
range.
– External pullup or pulldown resistors are not recommended. If mandatory, TI recommends the value
should be larger than 50 kΩ.
• An external pulldown or pullup resistor decreases the output VOH and VOL. Use Equation 1 and Equation 2 to
draft estimate the VOH and VOL as a result of an external pulldown and pullup resistor.
VOH = VCCx × RPD / (RPD + 4.5 kΩ)
VOL = VCCx × 4.5 kΩ / (RPU + 4.5 kΩ)
(1)
where
•
•
•
•
14
VCCx is the output port supply voltage on either VCCA or VCCB
RPD is the value of the external pulldown resistor
RPU is the value of the external pullup resistor
4.5 kΩ is the counting the variation of the serial resistor 4 kΩ in the I/O line.
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9.2.3 Application Curve
2 V/div
200 ns/div
VCCA = 1.8 V (waveform captured at pin 3)
VCCB = 3.3 V (Waveform captured at pin 4)
Figure 8. Level-Translation of a 2.5-MHz Signal
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10 Power Supply Recommendations
During operation, ensure that VCCA ≤ VCCB at all times. During power up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first. The TXB0101 has circuitry that disables all
output ports when either VCC is switched off (VCCA/B = 0 V). The output-enable (OE) input circuit is designed so
that it is supplied by VCCA and when the (OE) input is low, all outputs are placed in the high-impedance state. To
ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to
GND through a pulldown resistor and must not be enabled until VCCA and VCCB are fully ramped and stable. The
minimum value of the pulldown resistor to ground is determined by the current-sourcing capability of the driver
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
• Bypass capacitors should be used on power supplies. And should be placed as close as possible to the VCCA,
VCCB pin and GND pin.
• Short trace lengths should be used to avoid excessive loading.
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one shot duration, approximately 10 ns, ensuring that any reflection encounters low impedance at the
source driver.
11.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to Power Plane
VIA to GND Plane (Inner Layer)
Bypass Capacitor
Bypass Capacitor
1
VCCB
VCCA
6
Keep OE low until VCCA and VCCB
are powered up
GND
3
A
TXB0101
OE
5
B
4
VCCA
To/From
Controller/System
2
To/From
Controller/System
Figure 9. Layout Example Recommendation
16
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
NanoFree, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
30-Nov-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TXB0101DBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
(NFCF, NFCR)
TXB0101DBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
(NFCF, NFCR)
TXB0101DBVTG4
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
(NFCF, NFCR)
TXB0101DCKR
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
27O
TXB0101DCKRG4
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
27O
TXB0101DCKT
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TXB0101DCKTG4
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
27O
TXB0101DRLR
ACTIVE
SOT-5X3
DRL
6
4000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
27R
TXB0101DRLT
ACTIVE
SOT-5X3
DRL
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
27R
TXB0101YZPR
ACTIVE
DSBGA
YZP
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
(277, 27N)
27O
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
30-Nov-2018
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
TXB0101DBVR
SOT-23
3000
180.0
8.4
DBV
6
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.23
3.17
1.37
4.0
8.0
Q3
TXB0101DBVT
SOT-23
DBV
6
250
180.0
8.4
3.23
3.17
1.37
4.0
8.0
Q3
TXB0101DCKR
SC70
DCK
6
3000
179.0
8.4
2.2
2.5
1.2
4.0
8.0
Q3
TXB0101DCKT
SC70
DCK
6
250
179.0
8.4
2.2
2.5
1.2
4.0
8.0
Q3
TXB0101DRLR
SOT-5X3
DRL
6
4000
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
TXB0101DRLT
SOT-5X3
DRL
6
250
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
TXB0101YZPR
DSBGA
YZP
6
3000
178.0
9.2
1.02
1.52
0.63
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TXB0101DBVR
SOT-23
DBV
6
3000
202.0
201.0
28.0
TXB0101DBVT
SOT-23
DBV
6
250
202.0
201.0
28.0
TXB0101DCKR
SC70
DCK
6
3000
203.0
203.0
35.0
TXB0101DCKT
SC70
DCK
6
250
203.0
203.0
35.0
TXB0101DRLR
SOT-5X3
DRL
6
4000
202.0
201.0
28.0
TXB0101DRLT
SOT-5X3
DRL
6
250
202.0
201.0
28.0
TXB0101YZPR
DSBGA
YZP
6
3000
220.0
220.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
6
2X 0.95
1.9
1.45 MAX
3.05
2.75
5
2
4
0.50
6X
0.25
0.2
C A B
3
(1.1)
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214840/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
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EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X (0.95)
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214840/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X(0.95)
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DRL0006A
SOT - 0.6 mm max height
SCALE 8.000
PLASTIC SMALL OUTLINE
1.7
1.5
PIN 1
ID AREA
1
A
6
4X 0.5
1.7
1.5
NOTE 3
2X 1
4
3
B
1.3
1.1
6X
0.3
0.1
0.6 MAX
0.05
TYP
0.00
C
SEATING PLANE
6X
0.18
0.08
0.05 C
SYMM
SYMM
6X
6X
0.4
0.2
0.27
0.15
0.1
0.05
C A B
4223266/A 09/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MIN
AROUND
0.05 MAX
AROUND
SOLDER MASK
OPENING
METAL
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
SOLDERMASK DETAILS
4223266/A 09/2016
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4223266/A 09/2016
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
YZP0006
DSBGA - 0.5 mm max height
SCALE 9.000
DIE SIZE BALL GRID ARRAY
B
A
E
BALL A1
CORNER
D
C
0.5 MAX
SEATING PLANE
0.19
0.15
BALL TYP
0.05 C
0.5 TYP
C
SYMM
1
TYP
B
0.5
TYP
D: Max = 1.418 mm, Min =1.358 mm
E: Max = 0.918 mm, Min =0.858 mm
A
6X
0.015
0.25
0.21
C A
B
1
2
SYMM
4219524/A 06/2014
NanoFree Is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
TM
3. NanoFree package configuration.
www.ti.com
EXAMPLE BOARD LAYOUT
YZP0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
6X ( 0.225)
1
2
A
(0.5) TYP
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
SCALE:40X
( 0.225)
METAL
0.05 MAX
METAL
UNDER
MASK
0.05 MIN
( 0.225)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4219524/A 06/2014
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SBVA017 (www.ti.com/lit/sbva017).
www.ti.com
EXAMPLE STENCIL DESIGN
YZP0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
6X ( 0.25)
(R0.05) TYP
2
1
A
(0.5)
TYP
SYMM
B
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:40X
4219524/A 06/2014
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
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