Texas Instruments | SN5545xB, SN7545xB Dual-Peripheral Drivers for High-Current, High-Speed Switching (Rev. D) | Datasheet | Texas Instruments SN5545xB, SN7545xB Dual-Peripheral Drivers for High-Current, High-Speed Switching (Rev. D) Datasheet

Texas Instruments SN5545xB, SN7545xB Dual-Peripheral Drivers for High-Current, High-Speed Switching (Rev. D) Datasheet
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SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
SN5545xB, SN7545xB Dual-Peripheral Drivers for High-Current, High-Speed Switching
1 Features
3 Description
•
•
•
The SN5545xB and SN7545xB devices are dualperipheral drivers designed for use in systems that
employ TTL logic. This family is functionally
interchangeable with and replaces the SN75450
family and the SN75450A family devices
manufactured previously. The speed of the devices is
equal to that of the SN75450 family, and the parts are
designed to ensure freedom from latch-up. Diodeclamped inputs simplify circuit design.
1
•
•
•
•
•
Characterized for Use to 300 mA
High-Voltage Outputs up to 30 V
No Output Latch-Up at 20 V (After Conducting
300 mA)
High-Speed Switching
Open-Collector Outputs
Circuit Flexibility for Varied Applications
TTL-Compatible Diode-Clamped Inputs
Standard Supply Voltages
2 Applications
•
•
•
•
•
•
High-Speed Logic Buffers
Power Drivers
Lamp Drivers
LED Drivers
Line Drivers
Memory Drivers
The SNx5451B, SNx5452B, SNx5453B, and
SNx5454B devices are dual peripheral AND, NAND,
OR, and NOR drivers, respectively (assuming
positive logic), with the output of the logic gates
internally connected to the bases of the npn output
transistors.
The SN5545xB drivers are characterized for
operation over the full military range of –55°C to
125°C. The SN7545xB drivers are characterized for
operation from 0°C to 70°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
SN7545xBP
PDIP (8)
9.81 mm × 6.35 mm
SN7545xBD
SOIC (8)
4.90 mm × 3.90 mm
SN7545xBPS
SO (8)
6.20 mm x 5.30 mm
SN5545xBJG
CDIP (8)
9.60 mm × 6.67 mm
SN5545xBFK
LCCC (20)
8.89 mm × 8.89 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SN75451B Logic Diagram
3
1
1Y
1A
2
1B
5
6
2Y
2A
7
2B
4
GND
Copyright © 2016 Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
8
9
1
1
1
2
3
3
4
Absolute Maximum Ratings ...................................... 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics........................................... 5
Switching Characteristics, VCC = 5 V, TA = 25°C ..... 5
Dissipation Ratings ................................................... 5
Typical Characteristics .............................................. 6
Parameter Measurement Information .................. 6
Detailed Description .............................................. 9
9.1 Overview ................................................................... 9
9.2 Functional Block Diagrams ....................................... 9
9.3 Feature Description................................................. 10
9.4 Device Functional Modes........................................ 10
10 Application and Implementation........................ 13
10.1 Application Information.......................................... 13
10.2 Typical Application ................................................ 13
11 Power Supply Recommendations ..................... 14
12 Layout................................................................... 14
12.1 Layout Guidelines ................................................. 14
12.2 Layout Example .................................................... 14
13 Device and Documentation Support ................. 15
13.1
13.2
13.3
13.4
13.5
13.6
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
15
15
15
15
15
15
14 Mechanical, Packaging, and Orderable
Information ........................................................... 15
4 Revision History
Changes from Revision C (May 2016) to Revision D
•
Page
Replaced image SN75451B Logic Diagram ........................................................................................................................... 1
Changes from Revision B (January 1999) to Revision C
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
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SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
5 Device Comparison Table
DEVICE
LOGIC OF COMPLETE CIRCUIT
OPERATING FREE AIR TEMPERATURE RANGE
SN55451B
AND
–55°C to 125°C
SN55452B
NAND
–55°C to 125°C
SN55453B
OR
–55°C to 125°C
SN55454B
NOR
–55°C to 125°C
SN75451B
AND
0°C to 70°C
SN75452B
NAND
0°C to 70°C
SN75453B
OR
0°C to 70°C
SN75454B
NOR
0°C to 70°C
6 Pin Configuration and Functions
JG, D, P, or PS Package
8-Pin CDIP, SOIC, PDIP, or SO
Top View
8
2
7
3
6
4
5
NC
1A
NC
VCC
NC
1
VCC
2B
2A
2Y
NC
1B
NC
1Y
NC
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
2B
NC
2A
NC
NC
GND
NC
2Y
NC
1A
1B
1Y
GND
FK Package
20-Pin LCCC
Top View
NC – No internal connection
Pin Functions
PIN
I/O
DESCRIPTION
CDIP, SOIC, PDIP,
SO
LCCC
1A
1
2
I
Channel 1 Logic Input A
1B
2
5
I
Channel 1 Logic Input B
1Y
3
7
O
Channel 1 Driver
2A
6
15
I
Channel 2 Logic Input A
2B
7
17
I
Channel 2 Logic Input B
2Y
5
12
O
Channel 2 Driver
GND
4
10
—
Ground
NC
—
1, 3, 4, 6, 8,
9, 11, 13,
14, 16, 18,
19
—
No Internal Connection
VCC
8
20
—
Supply Voltage
NAME
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SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VCC
Supply voltage, (see
VI
Input voltage
(2)
)
Inter-emitter voltage (see Note
VO
(3)
)
Off-state output voltage
IOK
Continuous collector or output current, (see Note
(4)
)
Peak collector or output current, II (tw ≤ 10 ms, duty cycle ≤ 50%, see Note
(5)
)
Operating free-air temperature
5.5
V
5.5
V
30
V
400
mA
500
mA
SN5545xB
–55
125
SN7545xB
0
70
°C
SN5545xB FK package
260
°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
SN5545xB JG package
100
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
SN7545xB D or P package
260
°C
150
°C
150
°C
Operating virtual junction temperature
Tstg
Storage temperature
(2)
(3)
(4)
(5)
V
Case temperature for 60 seconds
TJ
(1)
UNIT
7
See Dissipation
Ratings
Continuous total power dissipation
TA
MAX
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltage values are with respect to network GND, unless otherwise specified.
This is the voltage between two emitters of a multiple-emitter transistor.
This value applies when the base-emitter resistance (RBE) is equal to or less than 500 Ω.
Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.
7.2 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
TA
Operating free-air temperature
MIN
NOM
MAX
SN5545xB
4.5
5
5.5
SN7545xB
4.75
5
5.25
2
UNIT
V
V
0.8
SN5545xB
–50
125
SN7545xB
0
70
V
°C
7.3 Thermal Information
SN7545xB
THERMAL METRIC (1)
D (SOIC)
P (PDIP)
PS (SO)
8 PINS
8 PINS
8 PINS
122.2
63.7
119.6
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
68.4
53.6
71.5
°C/W
RθJB
Junction-to-board thermal resistance
62.4
40.8
68.7
°C/W
ψJT
Junction-to-top characterization parameter
23.2
31.1
31.6
°C/W
ψJB
Junction-to-board characterization parameter
62.0
40.8
67.7
°C/W
RθJA
(1)
4
Junction-to-ambient thermal resistance
UNIT
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
7.4 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
Input clamp voltage
VOL
VCC = MIN, II = – 12 mA
MAX
UNIT
V
–1.2
–1.5
SN5545xB
0.25
0.5
SN7545xB
0.25
0.4
VCC = MIN, VIL = 0.8 V, IOL =
300 mA
SN5545xB
0.5
0.8
SN7545xB
0.5
High-level output current
VCC = MIN, VIH
30 V
II
Input current at maximum
input voltage
VCC = MAX, VI = 5.5 V
IIH
High-level input current
VCC = MAX, VI = 2.4 V
IIL
Low-level input current
VCC = MAX, VI = 0.4 V
V
0.7
= MIN, VOH = SN5545xB
SN7545xB
IOH
300
µA
100
1
VCC = MAX, VI = 5 V
Supply current, outputs high
VCC = MAX, VI = 0 V
VCC = MAX, VI = 0 V
ICCL
TYP
VCC = MIN, VIL = 0.8 V, IOL =
100 mA
Low-level output voltage
ICCH
MIN
Supply current, outputs low
VCC = MAX, VI = 5 V
mA
40
µA
–1
–1.6
mA
SNx5451B
7
11
SNx5453B
8
11
SNx5452B
11
14
SNx5454B
13
17
SNx5451B
52
65
SNx5453B
54
68
SNx5452B
56
71
SNx5454B
61
79
mA
mA
7.5 Switching Characteristics, VCC = 5 V, TA = 25°C
over operating free-air temperature range (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
Propagation delay time, low-to-highlevel output
tPLH
IO ≈ 200 mA, CL = 15 pF,
RL = 50 Ω, L See Figure 2
TYP (2)
MAX
SNx5451B,
SNx5453B
18
25
SNx5452B
26
35
SNx5454B
27
35
SNx5451B,
SNx5453B
18
25
SNx5452B,
SNx5454B
24
35
MIN
Propagation delay time, high-to-lowlevel output
IO ≈ 200 mA, CL = 15 pF,
RL = 50 Ω, L See Figure 2
tTLH
Transition time, low-to-high-level
output
IO ≈ 200 mA, CL = 15 pF,
RL = 50 Ω, L See Figure 2
5
8
tTHL
Transition time, high-to-low-level
output
IO ≈ 200 mA, CL = 15 pF,
RL = 50 Ω, L See Figure 2
7
12
VOH
High level output voltage after
switching
VS = 20 V, IO 9 300 mA,
See Figure 2
tPHL
(1)
(2)
ns
SN5545xB
SN7545xB
UNIT
VS – 6.5
mV
VS – 6.5
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at VCC = 5 V, TA = 25°C.
7.6 Dissipation Ratings
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 125°C
POWER RATING
D
725 mW
5.8 mW/°C
464
—
FK
1375 mW
11.0 mW/°C
880
275 mW
JG
1050 mW
8.4 mW/°C
672
210 mW
P
1000 mW
8.0 mW/°C
640
—
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SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
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VCE(sat)
VCE(sat) – Collector-Emitter Saturation Voltage – V
7.7 Typical Characteristics
0.6
0.5
IC
= 10
IB
See Note A
0.4
TA = 70°C
0.3
TA = 0°C
0.2
TA = 25°C
0.1
0
10
20
40
70 100
200
IC – Collector Current – mA
400
NOTE A: These parameters must be measured using pulse techniques,
tw = 300 ms, duty cycle ≤ 2%.
Figure 1. Transistor Collector-Emitter Saturation Voltage vs Collector Current
8 Parameter Measurement Information
Input
10 V
2.4 V
’451B
’452B
RL = 50 W
Output
Pulse
Generator
(see Note A)
Circuit
Under
Test
’453B
’454B
GND
CL = 15 pF
(see Note B)
SUB
0.4 V
A.
The pulse generator has the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
Figure 2. Test Circuit, Complete Drivers
6
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SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
Parameter Measurement Information (continued)
≤ 5 ns
≤ 10 ns
90%
Input
’451B
’453B
3V
90%
1.5 V
1.5 V
10%
10%
0V
0.5 ms
≤ 5 ns
≤ 10 ns
3V
Input
’452B
’454B
90%
90%
1.5 V
1.5 V
10%
10%
tPHL
90%
VOH
90%
50%
10%
Output
0V
tPLH
50%
10%
VOL
tTLH
tTHL
A.
The pulse generator has the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
Figure 3. Waveforms, Complete Drivers
VS = 20 V
Input
2.4 V
’451B
’452B
2 mH
5V
1N3064
65 W
Output
Pulse
Generator
(see Note A)
Circuit
Under
Test
’453B
’454B
GND
CL = 15 pF
(see Note B)
SUB
0.4 V
A.
The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
Figure 4. Test Circuit for Latch-Up Test of Complete Drivers
Copyright © 1967–2017, Texas Instruments Incorporated
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Parameter Measurement Information (continued)
≤ 5 ns
≤ 10 ns
90%
Input
’451B
’453B
1.5 V
1.5 V
10%
10%
40 ms
≤ 5 ns
Input
’452B
’454B
90%
1.5 V
10%
3V
90%
0V
≤ 10 ns
3V
90%
1.5 V
10%
0V
VOH
Output
VOL
A.
The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, ZO = 50 Ω.
B.
CL includes probe and jig capacitance.
Figure 5. Voltage Waveforms for Latch-Up Test of Complete Drivers
8
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SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
9 Detailed Description
9.1 Overview
The SN7545xB and SN5545xB devices provide dual-output drivers with AND, NAND, NOR, or OR logic inputs. If
each logic input is set to the appropriate voltage level, then the output driver will turn on, pulling the driver to
ground and allowing current to flow.
9.2 Functional Block Diagrams
3
1
1Y
1A
2
1B
5
6
2Y
2A
7
2B
4
GND
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Figure 6. SNx5451B Logic Diagram (Positive Logic)
3
1Y
1
1A
2
1B
5
2Y
6
2A
7
2B
4
GND
Copyright © 2016 Texas Instruments Incorporated
Figure 7. SNx5452B Logic Diagram (Positive Logic)
3
1
1Y
1A
2
1B
5
2Y
6
2A
7
2B
4
GND
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Figure 8. SNx5453B Logic Diagram (Positive Logic)
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Functional Block Diagrams (continued)
3
1
1Y
1A
2
1B
5
2Y
6
2A
7
2B
4
GND
Copyright © 2016 Texas Instruments Incorporated
Figure 9. SNx5454B Logic Diagram (Positive Logic)
9.3 Feature Description
The SNx5451B devices allow for high current driving up to 300 mA. This family of devices have AND, NAND,
OR, or NOR input logic gates to allow for a wide variety of applications. The SN7545xB devices are rated for a
commercial temperature range of 0°C to 70°C, and the SN5545xB devices are rated for a military temperature
range of –65°C to 125°C.
9.4 Device Functional Modes
Table 1, Table 2, Table 3, and Table 4 list the functional modes of the SNx545xB.
1
&
1A
3
2
1Y
1B
6
2A
5
7
2Y
2B
Figure 10. SNx5451B Logic Symbol
Table 1. SNx5451B Function Table
Y
(1)
A
B
L
L
L (on state)
L (on state)
L
H
H
L
L (on state)
H
H
H (off state)
(1)
Positive logic: Y = AB or NOT(A + B)
10
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SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
1
&
1A
3
1Y
2
1B
6
2A
5
7
2Y
2B
Figure 11. SNx5452B Logic Symbol
Table 2. SNx5452B Function Table
A
(1)
B
Y
(1)
L
L
H (off state)
L
H
H (off state)
H
L
H (off state)
H
H
L (on state)
Positive logic: Y = AB or A + B
1
≥1
1A
2
3
1Y
1B
6
2A
5
7
2Y
2B
Figure 12. SNx5453B Logic Symbol
Table 3. SNx5453B Function Table
A
(1)
B
Y
(1)
L
L
L (on state)
L
H
H (off state)
H
L
H (off state)
H
H
H (off state)
Positive logic: Y = AB or NOT(A + B)
1
1A
≥1
2
3
1Y
1B
6
2A
7
2Y
2B
Figure 13. SNx5454B Logic Symbol
Table 4. SNx5454B Function Table
(1)
Y
(1)
A
B
L
L
H (off state)
L
H
L (on state)
H
L
L (on state)
H
H
L (on state)
Positive logic: Y = A+B or A B
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VCC
4 kW
1.6 kW
VCC
1.6 kW
1.6 kW
4 kW
130W
130W
Y
Y
A
A
B
500W
B
1 kW
500W
1 kW
GND
1 kW
Resistor values shown are nominal.
GND
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Resistor values shown are nominal.
Copyright © 2016 Texas Instruments Incorporated
Figure 14. SNx5451B Schematic (Each Driver)
Figure 15. SNx5452B Schematic (Each Driver)
VCC
4 kW
1.6 kW
4 kW
4 kW
130 W
Y
A
2 kW
4
kW
2 kW
VCC
1.6
kW
130W
Y
A
B
B
1 kW
1 kW
500W
500 W
GND
1 kW
GND
Resistor values shown are nominal.
Resistor values shown are nominal.
Copyright © 2016 Texas Instruments Incorporated
Copyright © 2016 Texas Instruments Incorporated
Figure 16. SNx5453B Schematic (Each Driver)
12
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Figure 17. SNx5454B Schematic (Each Driver)
Copyright © 1967–2017, Texas Instruments Incorporated
Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
Typically the SN75451B device drives a high-voltage or high-current peripheral from an MCU or logic device that
cannot tolerate these conditions. The following design is a common application of the SN75451B device, driving
an LED using one channel and a high voltage peripheral using the other. In this configuration, the LED will turn
on whenever the high voltage peripheral is on.
10.2 Typical Application
3.3-V or 5-V Logic
VSUP
VSUP
1A
VCC
1B
2B
1Y
2A
GND
2Y
24 V
RLOAD
Copyright © 2016, Texas Instruments Incorporated
Figure 18. SN75451B Driving an LED and a High Voltage Peripheral
10.2.1 Design Requirements
Each of the inputs to the logic gate should never float. If one of the inputs is floating, then the logic gate could be
in an unknown state. Be sure to connect ground or VCC to any unused input channels.
10.2.2 Detailed Design Procedure
1. Recommended Input Conditions:
– For specified high and low levels, see VIH and VIL in Recommended Operating Conditions.
– The input voltage must not exceed the VI specified in Absolute Maximum Ratings.
2. Recommended Output Conditions:
– It is recommended that the load current not exceed 300 mA.
– The load current must never exceed the IOK noted in Absolute Maximum Ratings.
Copyright © 1967–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
13
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
www.ti.com
Typical Application (continued)
10.2.3 Application Curves
70
0.40
60
One Output Low
50
Outputs High
VOL -Low-level Output Voltaget (V)
ICC - Supply Current (mA)
Outputs Low
40
30
20
10
0
Vcc = 4.75 V
0.35
Vcc = 5 V
0.30
Vcc = 5.25 V
0.25
0.20
0.15
0.10
0.05
0.00
0
1
2
3
4
5
0
VCC - Supply Voltage (V)
50
100
150
200
250
300
IOK - Collector Current (mA)
C001
C001
Figure 19. SN75451B Typical Supply Current vs Supply
Voltage
Figure 20. SN75451B Typical Low-Level Output Voltage vs
Collector Current
11 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in
Recommended Operating Conditions. The VCC pin should have a bypass capacitor to prevent power disturbance.
A 0.1-µF capacitor is suitable for this device.
12 Layout
12.1 Layout Guidelines
Thin traces can be used on the input due to the low-current logic that is used to drive the SNx545xB devices.
Take care to separate the input channels to eliminate crosstalk. These traces are recommended for the output to
be able to drive high currents. Be sure to connect ground or VCC to any unused input channels, and use a
bypass capacitor on the VCC pin to prevent any power glitches.
12.2 Layout Example
0.1 F
1A
1B
1Y
GND
1
8
2
7
3
6
4
5
VCC
2B
2A
2Y
Figure 21. SN75451BD Layout
14
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Copyright © 1967–2017, Texas Instruments Incorporated
Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
www.ti.com
SLRS021D – DECEMBER 1967 – REVISED JANUARY 2017
13 Device and Documentation Support
13.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 5. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
SN55451B
Click here
Click here
Click here
Click here
Click here
SN55452B
Click here
Click here
Click here
Click here
Click here
SN55453B
Click here
Click here
Click here
Click here
Click here
SN55454B
Click here
Click here
Click here
Click here
Click here
SN75451B
Click here
Click here
Click here
Click here
Click here
SN75452B
Click here
Click here
Click here
Click here
Click here
SN75453B
Click here
Click here
Click here
Click here
Click here
SN75454B
Click here
Click here
Click here
Click here
Click here
13.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 1967–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: SN55451B SN55452B SN55453B SN55454B SN75451B SN75452B SN75453B SN75454B
15
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9563301Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629563301Q2A
SNJ55
453BFK
5962-9563301QPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9563301QPA
SNJ55453B
77049012A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
77049012A
SNJ55
452BFK
7704901PA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
7704901PA
SNJ55452B
77049022A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
77049022A
SNJ55
451BFK
7704902PA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
7704902PA
SNJ55451B
JM38510/12902BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/12902BPA
JM38510/12903BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/12903BPA
JM38510/12905BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/12905BPA
M38510/12902BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/12902BPA
M38510/12903BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/12903BPA
M38510/12905BPA
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/12905BPA
SN55451BJG
ACTIVE
CDIP
JG
8
50
TBD
A42
N / A for Pkg Type
-55 to 125
SN55451BJG
SN55452BJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
SN55452BJG
SN55453BJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
SN55453BJG
SN55454BJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
SN55454BJG
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2018
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN75451BD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75451B
SN75451BDE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75451B
SN75451BDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75451B
SN75451BDRE4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75451B
SN75451BDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75451B
SN75451BP
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75451BP
SN75451BPE4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75451BP
SN75451BPS
ACTIVE
SO
PS
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75451BPSR
ACTIVE
SO
PS
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
A451B
SN75452BD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75452B
SN75452BDE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75452B
SN75452BDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75452B
SN75452BDRE4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75452B
SN75452BDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75452B
SN75452BP
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75452BP
SN75452BPE4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75452BP
SN75452BPS
ACTIVE
SO
PS
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75452BPSR
ACTIVE
SO
PS
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Addendum-Page 2
A451B
A452B
0 to 70
A452B
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2018
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN75452BPSRG4
ACTIVE
SO
PS
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
A452B
SN75453BD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75453B
SN75453BDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75453B
SN75453BDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75453B
SN75453BP
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75453BP
SN75453BPE4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75453BP
SN75453BPSR
ACTIVE
SO
PS
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
A453B
SN75454BD
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75454B
SN75454BDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
75454B
SN75454BP
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75454BP
SN75454BPE4
ACTIVE
PDIP
P
8
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
0 to 70
SN75454BP
SN75454BPSR
ACTIVE
SO
PS
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
A454B
SNJ55451BFK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
77049022A
SNJ55
451BFK
SNJ55451BJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
7704902PA
SNJ55451B
SNJ55452BFK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
77049012A
SNJ55
452BFK
SNJ55452BJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
7704901PA
SNJ55452B
SNJ55453BFK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629563301Q2A
SNJ55
Addendum-Page 3
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
26-Sep-2018
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
453BFK
SNJ55453BJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
9563301QPA
SNJ55453B
SNJ55454BJG
ACTIVE
CDIP
JG
8
1
TBD
A42
N / A for Pkg Type
-55 to 125
SNJ55
454BJG
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 4
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
26-Sep-2018
OTHER QUALIFIED VERSIONS OF SN55451B, SN55452B, SN55453B, SN55454B, SN75451B, SN75452B, SN75453B, SN75454B :
• Catalog: SN75451B, SN75452B, SN75453B, SN75454B
• Military: SN55451B, SN55452B, SN55453B, SN55454B
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Military - QML certified for Military and Defense Applications
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Dec-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN75451BDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
SN75452BDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
SN75453BDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
SN75454BDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Dec-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN75451BDR
SOIC
D
8
2500
340.5
338.1
20.6
SN75452BDR
SOIC
D
8
2500
340.5
338.1
20.6
SN75453BDR
SOIC
D
8
2500
340.5
338.1
20.6
SN75454BDR
SOIC
D
8
2500
340.5
338.1
20.6
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
A
.004 [0.1] C
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.150
[3.81]
.189-.197
[4.81-5.00]
NOTE 3
4X (0 -15 )
4
5
B
8X .012-.020
[0.31-0.51]
.010 [0.25]
C A B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 -8
.016-.050
[0.41-1.27]
DETAIL A
(.041)
[1.04]
TYPICAL
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
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EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
.0028 MAX
[0.07]
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED
METAL
.0028 MIN
[0.07]
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
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EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
6X (.050 )
[1.27]
SYMM
5
4
(R.002 ) TYP
[0.05]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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