Texas Instruments | SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs (Rev. E) | Datasheet | Texas Instruments SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs (Rev. E) Datasheet

Texas Instruments SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs (Rev. E) Datasheet
Product
Folder
Sample &
Buy
Technical
Documents
Support &
Community
Tools &
Software
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
SN74AVCH4T245 4-Bit Dual-Supply Bus Transceiver
With Configurable Level-Shifting, Voltage Translation, and 3-State Outputs
1 Features
3 Description
•
This 4-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The A port
is designed to track VCCA. VCCA accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed to
track VCCB. VCCB accepts any supply voltage from 1.2
V to 3.6 V. The SN74AVCH4T245 is optimized to
operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is
operational with VCCA/VCCB as low as 1.2 V. This
allows for universal low voltage bidirectional
translation between any of the 1.2V, 1.5V, 1.8V, 2.5V,
and 3.3V voltage nodes.
Control Inputs VIH/VIL Levels are Referenced to
VCCA Voltage
Fully Configurable Dual-Rail Design Allows Each
Port to Operate Over the Full 1.2V to 3.6V PowerSupply Range
I/Os Are 4.6V Tolerant
Ioff Supports Partial Power-Down-Mode Operation
Bus Hold on Data Inputs Eliminates the Need for
External pull-up/pull-down Resistors
Max Data Rates
– 380 Mbps (1.8 V to 3.3 V Translation)
– 200 Mbps (<1.8 V to 3.3 V Translation)
– 200 Mbps (Translate to 2.5 V or 1.8 V)
– 150 Mbps (Translate to 1.5 V)
– 100 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 8000 V Human Body Model (A114-A)
– 200 V Machine Model (A115-A)
– 1000 V Charged-Device Model (C101)
1
•
•
•
•
•
•
•
The SN74AVCH4T245 device control pins (1DIR,
2DIR, 1OE, and 2OE) are supplied by VCCA.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
2 Applications
•
•
•
•
The SN74AVCH4T245 is designed for asynchronous
communication between two data buses. The logic
levels of the direction-control (DIR) input and the
output-enable (OE) input activate either the B-port
outputs or the A-port outputs or place both output
ports into the high-impedance mode. The device
transmits data from the A bus to the B bus when the
B-port outputs are activated, and from the B bus to
the A bus when the A-port outputs are activated. The
input circuitry on both A and B ports is always active
and must have a logic HIGH or LOW level applied to
prevent excess ICC and ICCZ.
Personal Electronics
Industrial
Enterprise
Telecom
Device Information(1)
PART NUMBER
Logic Diagram (Positive Logic) for 1/2 of
AVCH4T245
SN74AVCH4T245
DIR
OE
PACKAGE
BODY SIZE (NOM)
UQFN (16)
1.80 mm × 2.60 mm
VQFN (16)
3.50 mm × 4.00 mm
TVSOP (16)
4.40 mm × 3.60 mm
TSSOP (16)
4.40 mm × 5.00 mm
SOIC (16)
3.91 mm × 9.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
A1
B1
A2
B2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Description (continued).........................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
8
1
1
1
2
3
4
5
Absolute Maximum Ratings ..................................... 5
ESD Ratings.............................................................. 5
Recommended Operating Conditions ...................... 5
Thermal Information .................................................. 6
Electrical Characteristics........................................... 7
Switching Characteristics, VCCA = 1.2 V ................... 9
Switching Characteristics, VCCA = 1.5 V ± 0.1 V..... 10
Switching Characteristics, VCCA = 1.8 V ± 0.15 V... 11
Switching Characteristics, VCCA = 2.5 V ± 0.2 V..... 12
Switching Characteristics, VCCA = 3.3 V ± 0.3 V... 13
Operating Characteristics...................................... 14
Typical Characteristics .......................................... 15
Parameter Measurement Information ................ 16
9
Detailed Description ............................................ 17
9.1
9.2
9.3
9.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
17
17
17
18
10 Application and Implementation........................ 19
10.1 Application Information.......................................... 19
10.2 Typical Application ............................................... 19
11 Power Supply Recommendations ..................... 21
12 Layout................................................................... 21
12.1 Layout Guidelines ................................................. 21
12.2 Layout Example .................................................... 22
13 Device and Documentation Support ................. 23
13.1
13.2
13.3
13.4
13.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
23
23
23
23
23
14 Mechanical, Packaging, and Orderable
Information ........................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (June 2007) to Revision E
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
•
Changed Pin Functions table. ............................................................................................................................................... 4
2
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
5 Description (continued)
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state. The bus-hold circuitry on the powered-up side always stays active.
Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pull-up or pull-down
resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry on the powered-up side always
stays active.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
3
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
6 Pin Configuration and Functions
D, DGV, or PW Packages
16-Pin SOIC, TVSOP, or TSSOP
Top View
12
6
11
7
10
8
9
2B1
5
16 15 14 13
1OE
VCCB
VCCA
1
12
2B2
2
11
GND
3
10
GND
1DIR
4
9
2A2
5
6
7
8
2A1
13
1B1
14
4
1B2
3
VCCB
1OE
2OE
1B1
1B2
2B1
2B2
GND
1A2
15
2OE
16
2
1A1
1
2DIR
VCCA
1DIR
2DIR
1A1
1A2
2A1
2A2
GND
RSV Package
16-Pin UQFN
Top View
VCCB
1
16
4
15 1OE
14 2OE
13 1B1
5
6
12 1B2
11 2B1
2
3
10 2B2
8
9
GND
7
GND
1DIR
2DIR
1A1
1A2
2A1
2A2
VCCA
RGY Package
16-Pin VQFN
Top View
Pin Functions
PIN
I/O
DESCRIPTION
SOIC, TVSOP,
TSSOP, VQFN
UQFN
1A1
4
6
I/O
Input/output 1A1. Referenced to VCCA.
1A2
5
7
I/O
Input/output 1A2. Referenced to VCCA.
1B1
13
15
I/O
Input/output 1B1. Referenced to VCCB.
1B2
12
14
I/O
Input/output 1B2. Referenced to VCCB.
1DIR
2
4
I
Direction-control input for 1 ports
1OE
15
1
I
3-state output-mode enables. Pull OE high to place ‘1’ outputs in 3-state mode.
Referenced to VCCA.
2A1
6
8
I/O
Input/output 2A1. Referenced to VCCA.
2A2
7
9
I/O
Input/output 2A2. Referenced to VCCA.
2B1
11
13
I/O
Input/output 2B1. Referenced to VCCB.
2B2
10
12
I/O
Input/output 2B2. Referenced to VCCB.
2DIR
3
5
I
Direction-control input for 2 ports
2OE
14
16
I
3-state output-mode enables. Pull OE high to place 2 outputs in 3-state mode.
Referenced to VCCA.
GND
8, 9
10, 11
—
Ground
VCCA
1
3
—
A-port power supply voltage. 1.2 V ≤ VCCA ≤ 3.6 V
VCCB
16
2
—
B-port power supply voltage. 1.2 V ≤ VCCB ≤ 3.6 V
NAME
4
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
VCCA
Supply voltage
VCCB
Supply voltage
Input voltage (2)
VI
(1)
MIN
MAX
UNIT
–0.5
4.6
V
V
–0.5
4.6
I/O ports (A port)
–0.5
4.6
I/O ports (B port)
–0.5
4.6
Control inputs
–0.5
4.6
–0.5
4.6
V
VO
Voltage applied to any output
in the high-impedance or power-off state (2)
A port
B port
–0.5
4.6
VO
Voltage applied to any output
in the high or low state (2) (3)
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCCA, VCCB, or GND
±100
mA
150
°C
Tstg
(1)
(2)
(3)
Storage temperature
–65
V
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input voltage and output negativeVoltage ratings may be exceeded if the input and output current ratings are observed.
The output positiveVoltage rating may be exceeded up to 4.6V maximum if the output current rating is observed.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±8000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
Machine model
±200
UNIT
V
JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
see
(1) (2) (3) (4) (5)
MIN
MAX
VCCA
Supply voltage
VCCI
1.2
3.6
V
VCCB
Supply voltage
1.2
3.6
V
VIH
VIL
VIH
(1)
(2)
(3)
(4)
(5)
High-level
input voltage
Low-level
input voltage
High-level
input voltage
Data inputs (4)
Data inputs
(4)
DIR
(referenced to VCCA) (5)
VCCO
1.2 V to 1.95 V
VCCI × 0.65
1.95 V to 2.7 V
1.6
2.7 V to 3.6 V
2
V
1.2 V to 1.95 V
VCCI × 0.35
1.95 V to 2.7 V
0.7
2.7 V to 3.6 V
0.8
1.2 V to 1.95 V
VCCA × 0.65
1.95 V to 2.7 V
1.6
2.7 V to 3.6 V
2
UNIT
V
V
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
5
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
Recommended Operating Conditions (continued)
see (1)(2)(3)(4)(5)
VCCI
Low-level
input voltage
VIL
VI
DIR
(referenced to VCCA) (5)
VCCO
MIN
1.2 V to 1.95 V
VCCA × 0.35
1.95 V to 2.7 V
0.7
2.7 V to 3.6 V
0.8
Input voltage
VO
Output voltage
IOH
0
3.6
Active state
0
VCCO
3-state
0
3.6
High-level output current
IOL
MAX
Low-level output current
Δt/Δv
Input transition rise or fall rate
TA
Operating free-air temperature
1.2 V
–3
1.4 V to 1.6 V
–6
1.65 V to 1.95 V
–8
2.3 V to 2.7 V
–9
3 V to 3.6 V
–12
1.2 V
3
1.4 V to 1.6 V
6
1.65 V to 1.95 V
8
2.3 V to 2.7 V
9
3 V to 3.6 V
12
–40
UNIT
V
V
V
mA
mA
5
ns/V
85
°C
7.4 Thermal Information
SN74AVCH4T245
THERMAL METRIC
(1)
D (SOIC)
DGV
(TVSOP)
PW
(TSSOP)
RGY
(VQFN)
RSV
(UQFN)
UNIT
16 PINS
16 PINS
16 PINS
16 PINS
16 PINS
(2)
85.5
126.0
112.0
37.5
146.9
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
46.9
50.8
46.8
54.5
53.6
°C/W
RθJB
Junction-to-board thermal resistance
43.0
57.7
57.1
15.6
75.6
°C/W
ψJT
Junction-to-top characterization parameter
13.4
5.7
5.7
0.5
13.5
°C/W
ψJB
Junction-to-board characterization parameter
42.7
57.2
56.5
15.8
75.6
°C/W
—
—
—
3.5
—
°C/W
RθJA
Junction-to-ambient thermal resistance
RθJC(bot) Junction-to-case (bottom) thermal resistance
(1)
(2)
6
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
The package thermal impedance is calculated in accordance with JESD 51-7.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
7.5 Electrical Characteristics
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted). (1) (2)
PARAMETER
TEST CONDITIONS
MIN
IOH = –100 μA; VCCA = 1.2 V to 3.6 V; VCCB = 1.2 V to 3.6
V; VI = VIH
VOH
IOH = –8 mA; VCCA = 1.65 V; VCCB = 1.65 V; VI = VIH
IOH = –9 mA; VCCA = 2.3 V; VCCB = 2.3 V; VI = VIH
IOH = –12 mA; VCCA = 3 V; VCCB = 3 V; VI = VIH
V
1.2
1.75
2.3
0.2
IOL = 3 mA; VCCA = 1.2 V; VCCB = 1.2 V; VI = VIL
0.15
IOL = 6 mA; VCCA = 1.4 V; VCCB = 1.4 V; VI = VIL
0.35
IOL = 8 mA; VCCA = 1.65 V; VCCB = 1.65 V; VI = VIL
0.45
IOL = 9 mA; VCCA = 2.3 V; VCCB = 2.3 V; VI = VIL
0.55
IOL = 12 mA; VCCA = 3 V; VCCB = 3 V; VI = VIL
II
DIR input
VI = VCCA or GND; VCCA = 1.2 V to 3.6
V; VCCB = 1.2 V to 3.6 V
(3)
±0.025
TA = –40°C to
85°C
(4)
VI = 0.49 V; VCCA = 1.4 V; VCCB = 1.4 V
15
VI = 0.58 V; VCCA = 1.65 V; VCCB = 1.65 V
25
VI = 0.7 V; VCCA = 2.3 V; VCCB = 2.3 V
45
VI = 0.8 V; VCCA = 3.3 V; VCCB = 3.3 V
100
–15
VI = 1.07 V; VCCA = 1.65 V; VCCB = 1.65 V
–25
(1)
(2)
(3)
(4)
(5)
μA
–45
–100
VCCA = 1.2 V;
VCCB = 1.2 V
VI = 0 to VCCI
μA
–25
VI = 0.91 V; VCCA = 1.4 V; VCCB = 1.4 V
VI = 2 V; VCCA = 3.3 V; VCCB = 3.3 V
(5)
μA
25
VI = 1.6 V; VCCA = 2.3 V; VCCB = 2.3 V
IBHLO
±0.25
±1
VI = 0.78 V; VCCA = 1.2 V; VCCB = 1.2 V
IBHH
V
0.7
TA = 25°C
VI = 0.42 V; VCCA = 1.2 V; VCCB = 1.2 V
IBHL
UNIT
0.95
1.05
IOL = 100 μA; VCCA = 1.2 V to 3.6 V; VCCB = 1.2 V to 3.6 V;
VI = VIL
VOL
MAX
VCCO – 0.2
IOH = –3 mA; VCCA = 1.2 V; VCCB = 1.2 V; VI = VIH
IOH = –6 mA; VCCA = 1.4 V; VCCB = 1.4 V; VI = VIH
TYP
50
VCCA = 1.6 V;
VCCB = 1.6 V
125
VCCA = 1.95 V;
VCCB = 1.95 V
200
VCCA = 2.7 V;
VCCB = 2.7 V
300
VCCA = 3.6 V;
VCCB = 3.6 V
500
µA
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND
and then raising it to VIL max.
The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to
VCC and then lowering it to VIH min.
An external driver must source at least IBHLO to switch this node from low to high.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
7
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
Electrical Characteristics (continued)
All typical limits apply over TA = 25°C, and all maximum and minimum limits apply over TA = –40°C to 85°C (unless otherwise
noted).(1)(2)
PARAMETER
TEST CONDITIONS
MIN
VCCA = 1.2 V;
VCCB = 1.2 V
IBHHO
(6)
VI = 0 to VCCI
VCCA = 1.6 V;
VCCB = 1.6 V
–125
VCCA = 1.95 V;
VCCB = 1.95 V
–200
VCCA = 2.7 V;
VCCB = 2.7 V
–300
VCCA = 3.6 V;
VCCB = 3.6 V
–500
±0.1
±0.1
B port
VI or VO = 0 to 3.6 V; VCCA = 0 V to 3.6 TA = 25°C
V; VCCB = 0 V
TA = –40°C to
85°C
VO = VCCO or GND, VI = VCCI or GND;
OE = VIH; VCCA = 3.6 V; VCCB = 3.6 V
±0.5
TA = 25°C
±5
B port
VO = VCCO or GND, VI = VCCI or GND; OE = don't care;
VCCA = 0 V; VCCB = 3.6 V
±5
A port
VO = VCCO or GND, VI = VCCI or GND; OE = don't care;
VCCA = 3.6 V; VCCB = 0 V
±5
VI = VCCI or GND, IO = 0
ICCB
VI = VCCI or GND, IO = 0
VCCA = 0 V; VCCB
= 3.6 V
–2
VCCA = 3.6 V;
VCCB = 0 V
8
VCCA = 1.2 V to
3.6 VVCCB = 1.2
V to 3.6 V
8
VCCA = 0 V; VCCB
= 3.6 V
8
Control inputs
VI = 3.3 V or GND; VCCA = 3.3 V; VCCB = 3.3 V
Cio
A or B port
VO = 3.3 V or GND; VCCA = 3.3 V; VCCB = 3.3 V
µA
µA
–2
VI = VCCI or GND, IO = 0; VCCA = 1.2 V to 3.6 V; VCCB =
1.2 V to 3.6 V
Ci
µA
8
VCCA = 3.6 V;
VCCB = 0 V
ICCA +
ICCB
µA
±2.5
±5
ICCA
8
±1
±5
VCCA = 1.2 V to
3.6 VVCCB = 1.2
V to 3.6 V
(6)
(7)
±1
TA = –40°C to
85°C
(7)
UNIT
µA
VI or VO = 0 to 3.6 V; VCCA = 0 V; VCCB TA = 25°C
= 0 V to 3.6 V
TA = –40°C to
85°C
A or B port
MAX
–50
A port
Ioff
IOZ
TYP
16
µA
3.5
4.5
pF
6
7
pF
An external driver must sink at least IBHHO to switch this node from high to low.
For I/O ports, the parameter IOZ includes the input leakage current.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
7.6 Switching Characteristics, VCCA = 1.2 V
over recommended operating free-air temperature range (for parameter descriptions, see Figure 3)
PARAMETER
tPLH, tPHL
tPLH, tPHL
tPZH, tPZL
FROM
(INPUT)
A
B
OE
TO
(OUTPUT)
B
A
A
VCCB
TYP
VCCB = 1.2 V
3.4
VCCB = 1.5 V ± 0.1 V
2.9
VCCB = 1.8 V ± 0.15 V
2.7
VCCB = 2.5 V ± 0.2 V
2.6
VCCB = 3.3 V ± 0.3 V
2.8
VCCB = 1.2 V
3.6
VCCB = 1.5 V ± 0.1 V
3.1
VCCB = 1.8 V ± 0.15 V
2.8
VCCB = 2.5 V ± 0.2 V
2.6
VCCB = 3.3 V ± 0.3 V
2.6
VCCB = 1.2 V
5.6
VCCB = 1.5 V ± 0.1 V
4.7
VCCB = 1.8 V ± 0.15 V
4.3
VCCB = 2.5 V ± 0.2 V
3.9
VCCB = 3.3 V ± 0.3 V
3.7
VCCB = 1.2 V
tPZH, tPZL
tPHZ, tPLZ
tPHZ, tPLZ
OE
OE
OE
B
A
B
UNIT
VCCB = 1.5 V ± 0.1 V
4.3
3.9
VCCB = 2.5 V ± 0.2 V
3.6
VCCB = 3.3 V ± 0.3 V
3.6
VCCB = 1.2 V
6.2
VCCB = 1.5 V ± 0.1 V
5.2
VCCB = 1.8 V ± 0.15 V
5.2
VCCB = 2.5 V ± 0.2 V
4.3
VCCB = 3.3 V ± 0.3 V
4.8
VCCB = 1.2 V
5.9
VCCB = 1.5 V ± 0.1 V
5.1
VCCB = 1.8 V ± 0.15 V
5
VCCB = 2.5 V ± 0.2 V
4.7
VCCB = 3.3 V ± 0.3 V
5.5
Submit Documentation Feedback
Product Folder Links: SN74AVCH4T245
ns
ns
5
VCCB = 1.8 V ± 0.15 V
Copyright © 2004–2015, Texas Instruments Incorporated
ns
ns
ns
ns
9
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
7.7 Switching Characteristics, VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range (for parameter descriptions, see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB
MIN
VCCB = 1.2 V
tPHL, tPLH
A
B
B
A
OE
A
6.3
VCCB = 1.8 V ± 0.15 V
0.3
5.2
VCCB = 2.5 V ± 0.2 V
0.4
4.2
VCCB = 3.3 V ± 0.3 V
0.4
OE
B
OE
A
VCCB = 1.5 V ± 0.1 V
0.7
0.5
6
VCCB = 2.5 V ± 0.2 V
0.4
5.7
VCCB = 3.3 V ± 0.3 V
0.3
5.6
10
OE
B
6.3
1.4
9.6
VCCB = 1.8 V ± 0.15 V
1.1
9.5
VCCB = 2.5 V ± 0.2 V
0.7
9.4
VCCB = 3.3 V ± 0.3 V
0.4
ns
9.4
4.5
VCCB = 1.5 V ± 0.1 V
1.4
9.6
VCCB = 1.8 V ± 0.15 V
1.1
7.7
VCCB = 2.5 V ± 0.2 V
0.9
5.8
VCCB = 3.3 V ± 0.3 V
0.9
5.6
ns
5.6
VCCB = 1.5 V ± 0.1 V
1.8
10.2
VCCB = 1.8 V ± 0.15 V
1.5
10.2
VCCB = 2.5 V ± 0.2 V
1.3
10.2
VCCB = 3.3 V ± 0.3 V
1.6
ns
10.2
5.2
VCCB = 1.5 V ± 0.1 V
1.9
10.3
VCCB = 1.8 V ± 0.15 V
1.9
9.1
VCCB = 2.5 V ± 0.2 V
1.4
7.4
VCCB = 3.3 V ± 0.3 V
1.2
7.6
Submit Documentation Feedback
ns
4.9
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPHZ, tPLZ
4.2
VCCB = 1.8 V ± 0.15 V
VCCB = 1.2 V
tPHZ, tPLZ
ns
3.3
VCCB = 1.2 V
tPZH, tPZL
UNIT
3.2
0.3
VCCB = 1.2 V
tPZH, tPZL
MAX
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPLH, tPHL
TYP
ns
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
7.8 Switching Characteristics, VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (for parameter descriptions, see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB
MIN
VCCB = 1.2 V
tPLH, tPHL
A
B
B
A
OE
A
6
VCCB = 1.8 V ± 0.15 V
0.1
4.9
VCCB = 2.5 V ± 0.2 V
0.1
3.9
VCCB = 3.3 V ± 0.3 V
0.3
OE
B
OE
A
VCCB = 1.5 V ± 0.1 V
0.6
5.3
0.5
4.9
VCCB = 2.5 V ± 0.2 V
0.3
4.6
VCCB = 3.3 V ± 0.3 V
0.3
4.5
OE
B
1
7.4
VCCB = 1.8 V ± 0.15 V
1
7.3
VCCB = 2.5 V ± 0.2 V
0.6
7.3
VCCB = 3.3 V ± 0.3 V
0.4
7.2
VCCB = 1.5 V ± 0.1 V
1.2
9.2
1
7.4
VCCB = 2.5 V ± 0.2 V
0.8
5.3
VCCB = 3.3 V ± 0.3 V
0.8
4.6
ns
5.4
VCCB = 1.5 V ± 0.1 V
1.6
8.6
VCCB = 1.8 V ± 0.15 V
1.8
8.7
VCCB = 2.5 V ± 0.2 V
1.3
8.7
VCCB = 3.3 V ± 0.3 V
1.6
ns
8.7
5
VCCB = 1.5 V ± 0.1 V
1.7
9.9
VCCB = 1.8 V ± 0.15 V
1.6
8.7
VCCB = 2.5 V ± 0.2 V
1.2
6.9
VCCB = 3.3 V ± 0.3 V
1
6.9
Submit Documentation Feedback
Product Folder Links: SN74AVCH4T245
ns
4.1
VCCB = 1.8 V ± 0.15 V
Copyright © 2004–2015, Texas Instruments Incorporated
ns
4.4
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPHZ, tPLZ
3.9
VCCB = 1.8 V ± 0.15 V
VCCB = 1.2 V
tPHZ, tPLZ
ns
3
VCCB = 1.2 V
tPZH, tPZL
UNIT
2.9
0.1
VCCB = 1.2 V
tPZH, tPZL
MAX
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPLH, tPHL
TYP
ns
11
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
7.9 Switching Characteristics, VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range (for parameter descriptions, see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB
MIN
VCCB = 1.2 V
tPLH, tPHL
A
B
B
A
OE
A
5.7
VCCB = 1.8 V ± 0.15 V
0.1
4.6
VCCB = 2.5 V ± 0.2 V
0.2
3.5
VCCB = 3.3 V ± 0.3 V
0.1
OE
B
OE
A
VCCB = 1.5 V ± 0.1 V
0.6
4.2
0.4
3.9
VCCB = 2.5 V ± 0.2 V
0.2
3.4
VCCB = 3.3 V ± 0.3 V
0.2
3.3
OE
B
0.7
6.5
VCCB = 1.8 V ± 0.15 V
0.7
5.2
VCCB = 2.5 V ± 0.2 V
0.6
4.8
VCCB = 3.3 V ± 0.3 V
0.4
12
OE
B
4.8
VCCB = 1.5 V ± 0.1 V
0.9
VCCB = 1.8 V ± 0.15 V
0.8
7
VCCB = 2.5 V ± 0.2 V
0.6
4.8
VCCB = 3.3 V ± 0.3 V
0.6
4
8.8
ns
4.7
VCCB = 1.5 V ± 0.1 V
1
8.4
VCCB = 1.8 V ± 0.15 V
1
8.4
VCCB = 2.5 V ± 0.2 V
1
6.2
VCCB = 3.3 V ± 0.3 V
1
ns
6.6
4.5
VCCB = 1.5 V ± 0.1 V
1.5
9.4
VCCB = 1.8 V ± 0.15 V
1.3
8.2
VCCB = 2.5 V ± 0.2 V
1.1
6.2
VCCB = 3.3 V ± 0.3 V
0.9
5.2
ns
4.5
VCCB = 1.5 V ± 0.1 V
1.5
8.8
VCCB = 1.8 V ± 0.15 V
1.3
8.2
VCCB = 2.5 V ± 0.2 V
1.1
6.2
VCCB = 3.3 V ± 0.3 V
0.9
5.2
Submit Documentation Feedback
ns
3.8
VCCB = 1.2 V
tPLZ
ns
4
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPHZ
3.6
VCCB = 1.8 V ± 0.15 V
VCCB = 1.2 V
tPHZ, tPLZ
ns
2.7
VCCB = 1.2 V
tPZH, tPZL
UNIT
2.8
0.1
VCCB = 1.2 V
tPZH, tPZL
MAX
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPLH, tPHL
TYP
ns
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
7.10 Switching Characteristics, VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (for parameter descriptions, see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB
MIN
VCCB = 1.2 V
tPLH, tPHL
A
B
B
A
OE
A
5.6
VCCB = 1.8 V ± 0.15 V
0.1
4.5
VCCB = 2.5 V ± 0.2 V
0.1
3.3
VCCB = 3.3 V ± 0.3 V
0.1
OE
B
OE
A
VCCB = 1.5 V ± 0.1 V
0.6
4.2
0.4
3.4
VCCB = 2.5 V ± 0.2 V
0.2
3
VCCB = 3.3 V ± 0.3 V
0.1
2.8
OE
B
0.6
8.7
VCCB = 1.8 V ± 0.15 V
0.6
5.2
VCCB = 2.5 V ± 0.2 V
0.6
3.8
VCCB = 3.3 V ± 0.3 V
0.4
3.8
VCCB = 1.5 V ± 0.1 V
0.8
8.7
0.6
6.8
VCCB = 2.5 V ± 0.2 V
0.5
4.7
VCCB = 3.3 V ± 0.3 V
0.5
3.8
ns
4.8
VCCB = 1.5 V ± 0.1 V
0.7
9.3
VCCB = 1.8 V ± 0.15 V
0.7
8.3
VCCB = 2.5 V ± 0.2 V
0.7
5.6
VCCB = 3.3 V ± 0.3 V
0.7
ns
6.6
5.3
VCCB = 1.5 V ± 0.1 V
1.4
9.3
VCCB = 1.8 V ± 0.15 V
1.2
8.1
VCCB = 2.5 V ± 0.2 V
1
6.4
VCCB = 3.3 V ± 0.3 V
0.8
6.2
Submit Documentation Feedback
Product Folder Links: SN74AVCH4T245
ns
3.7
VCCB = 1.8 V ± 0.15 V
Copyright © 2004–2015, Texas Instruments Incorporated
ns
3.8
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPHZ, tPLZ
2.9
VCCB = 1.8 V ± 0.15 V
VCCB = 1.2 V
tPHZ, tPLZ
ns
2.6
VCCB = 1.2 V
tPZH, tPZL
UNIT
2.9
0.1
VCCB = 1.2 V
tPZH, tPZL
MAX
VCCB = 1.5 V ± 0.1 V
VCCB = 1.2 V
tPLH, tPHL
TYP
ns
13
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
7.11 Operating Characteristics
TA = 25°C
PARAMETER
Outputs
enabled
TEST
CONDITIONS
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
A to B
Outputs
disabled
CpdA
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
(1)
Outputs
enabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
B to A
Outputs
disabled
Outputs
enabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
A to B
Outputs
disabled
CpdB
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
(1)
Outputs
enabled
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
B to A
Outputs
disabled
(1)
14
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
VCCA
TYP
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1.5
VCCA = VCCB = 3.3 V
2
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
12
VCCA = VCCB = 1.5 V
12.5
VCCA = VCCB = 1.8 V
13
VCCA = VCCB = 2.5 V
14
VCCA = VCCB = 3.3 V
15
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
12
VCCA = VCCB = 1.5 V
12.5
VCCA = VCCB = 1.8 V
13
VCCA = VCCB = 2.5 V
14
VCCA = VCCB = 3.3 V
15
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
2
VCCA = VCCB = 1.2 V
1
VCCA = VCCB = 1.5 V
1
VCCA = VCCB = 1.8 V
1
VCCA = VCCB = 2.5 V
1
VCCA = VCCB = 3.3 V
1
UNIT
pF
pF
pF
pF
pF
pF
pF
pF
Power dissipation capacitance per transceiver. Refer to TI application report, CMOS Power Consumption and Cpd Calculation
(SCAA035)
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
3.6
3.6
3.2
3.2
2.8
2.8
2.4
2.4
VOH Voltage (V)
VOL Voltage (V)
7.12 Typical Characteristics
2.0
1.6
2.0
1.6
1.2
1.2
0.8
0.8
-40 °C
25 °C
85 °C
0.4
-40 °C
25 °C
85 °C
0.4
0
0
0
20
40
60
80
IOL Current (mA)
Figure 1. Low-Level Output Voltage (VOL)
vs Low-Level Current (IOL)
100
0
20
40
60
80
100
IOH Current (mA)
Figure 2. High-Level Output Voltage (VOH)
vs High-Level Current (IOH)
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
15
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
8 Parameter Measurement Information
2 × VCCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2
Input
VCCO
CL
RL
VTP
1.2 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
15 pF
15 pF
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
VCCA/2
0V
tPLZ
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VOH
VCCO/2
VOL
VCCO/2
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
VCCO/2
VOL + VTP
VOL
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns,
dv/dt ≥1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. t PZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
Figure 3. Load Circuit and Voltage Waveforms
16
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
9 Detailed Description
9.1 Overview
The SN74AVCH4T245 is a 4-bit, dual-supply noninverting bidirectional voltage level translation device. Ax pins
and control pins (1DIR, 2DIR,1OE, and 2OE) are supported by VCCA, and Bx pins are supported by VCCB. The A
port is able to accept I/O voltages ranging from 1.2 V to 3.6 V, while the B port can accept I/O voltages from 1.2
V to 3.6 V. A high on DIR allows data transmission from Ax to Bx and a low on DIR allows data transmission
from Bx to Ax when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-impedance
state. Refer to the AVC Logic Family Technology and Applications Application Report SCEA006).
9.2 Functional Block Diagram
DIR
OE
A1
B1
A2
B2
Figure 4. Logic Diagram (Positive Logic) for 1/2 of SN74AVCH4T245
9.3 Feature Description
9.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2V to 3.6V PowerSupply Range
Both VCCA and VCCB can be supplied at any voltage between 1.2 V and 3.6 V; thus, making the device suitable
for translating between any of the low voltage nodes (1.2 V, 1.8 V, 2.5 V, and 3.3 V).
9.3.2 Supports High Speed Translation
The SN74AVCH4T245 device can support high data rate applications. The translated signal data rate can be up
to 380 Mbps when the signal is translated from 1.8 V to 3.3 V.
9.3.3 Ioff Supports Partial-Power-Down Mode Operation
Ioff will prevent backflow current by disabling I/O output circuits when device is in partial-power-down mode.
9.3.4 Bus-Hold Circuitry
This device has active bus-hold circuitry that holds unused or undriven inputs at a valid logic state. Use of pull-up
or pull-down resistors with the bus-hold circuitry is not recommended. (Refer to the Bus-Hold Circuit Application
Report (SCLA015). Pullup and pulldown resistors are not recommended on the inputs of devices with bus-hold.
Unused inputs can be left floating.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
17
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
Feature Description (continued)
9.3.5 Vcc Isolation Feature
The VCC isolation feature ensures that if either VCCA or VCCB are at GND (or < 0.4V), both ports will be in a highimpedance state (IOZ shown in Electrical Characteristics). This prevents false logic levels from being presented
to either bus.
9.4 Device Functional Modes
Table 1 lists the functional modes of the SN74AVCH4T245.
Table 1. Function Table (Each 2-Bit Section)
CONTROL
INPUTS (1)
OE
(1)
18
OUTPUT CIRCUITS
OPERATION
DIR
A PORT
B PORT
L
L
Enabled
Hi-Z
B data to A bus
L
H
Hi-Z
Enabled
A data to B bus
H
X
Hi-Z
Hi-Z
Isolation
Input circuits of the data I/Os are always active.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The SN74AVCH4T245 device can be used in level-shifting applications for interfacing devices or systems
operating at different interface voltages with one another. The SN74AVCH4T245 device is ideal for use in
applications where a push-pull driver is connected to the data I/Os. The max data rate can be up to 380 Mbps
when device translates a signal from 1.8 V to 3.3 V.
10.2 Typical Application
1.2 V
3.3 V
0.1 μC
0.1 μC
VCCA
1 µF
VCCB
1OE
2OE
1DIR
2DIR
1.2 V
Controller
SN74AVCH4T245
Data
GND
1A1
1B1
1A2
1B2
2A1
2B1
2A2
2B2
GND
3.3 V
System
Data
GND
Figure 5. Typical Application Diagram
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
19
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
Typical Application (continued)
10.2.1 Design Requirements
For the design example shown in Typical Application, use the parameters listed in Table 2.
Table 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
1.2 V to 3.6 V
Output voltage range
1.2 V to 3.6 V
10.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
– Use the supply voltage of the device that is driving the SN74AVCH4T245 device to determine the input
voltage range. For a valid logic high, the value must exceed the VIH of the input port. For a valid logic low,
the value must be less than the VIL of the input port.
• Output voltage range
– Use the supply voltage of the device that the SN74AVCH4T245 device is driving to determine the output
voltage range.
10.2.3 Application Curve
Input (1.2 V)
Output (3.3 V)
Figure 6. Translation Up (1.2 V to 3.3 V) at 2.5 MHz
20
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
11 Power Supply Recommendations
The SN74AVCH4T245 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCA accepts
any supply voltage from 1.2 V to 3.6 V and VCCB accepts any supply voltage from 1.2 V to 3.6 V. The A port and
B port are designed to track VCCA and VCCB respectively allowing for low voltage bidirectional translation between
any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The output-enable (OE) input circuit is designed so that it is supplied by VCCA and when the OE input is high, all
outputs are placed in the high-impedance state. To ensure the high-impedance state of the outputs during power
up or power down, the OE input pin must be tied to VCCA through a pull-up resistor and must not be enabled until
VCCA and VCCB are fully ramped and stable. The minimum value of the pull-up resistor to VCCA is determined by
the current-sinking capability of the driver.
VCCA or VCCB can be powered up first. If the SN74AVCH4T245 is powered up in a permanently enabled state,
pull-up resistors are recommended at the input. This ensures proper/glitch-free power-up. (Refer to Designing
with SN74LVCXT245 and SN74LVCHXT245 Family of Direction Controlled Voltage Translators/Level-Shifters
Application Note (SLVA746).)
12 Layout
12.1 Layout Guidelines
To
•
•
•
ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
Bypass capacitors should be used on power supplies.
Short trace lengths should be used to avoid excessive loading.
Place pads on the signal paths for loading capacitors or pull-up resistors to help adjust rise and fall times of
signals, depending on the system requirements.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
21
SN74AVCH4T245
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
www.ti.com
12.2 Layout Example
LEGEND
VIA to Power Plane
Polygonal Copper Pour
VIA to GND Plane (Inner Layer)
VCCB
VCCA
Bypass Capacitor
Bypass Capacitor
VCCA
1
VCCA
VCCB
16
2
1DIR
1OE
15
3
2DIR
2OE
14
From
Controller
4
1A1
1B1
13
To
System
From
Controller
5
1A2
1B2
12
To
System
To
Controller
6
2A1
2B1
11
From
System
To
Controller
7
2A2
2B2
10
From
System
8
GND
GND
9
Keep OE high until VCCA and
VCCB are powered up
SN74AVCH4T245
Figure 7. Layout Recommendation
22
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
SN74AVCH4T245
www.ti.com
SCES577E – JUNE 2004 – REVISED NOVEMBER 2015
13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation, see the following:
• Designing with SN74LVCXT245 and SN74LVCHXT245
Translators/Level-Shifters, SLVA746
• Bus-Hold Circuit, SCLA015
• AVC Logic Family Technology and Applications, SCEA006
Family
of
Direction
Controlled
Voltage
13.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Documentation Feedback
Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: SN74AVCH4T245
23
PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
74AVCH4T245PWRG4
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
74AVCH4T245PWTE4
ACTIVE
TSSOP
PW
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
74AVCH4T245PWTG4
ACTIVE
TSSOP
PW
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
74AVCH4T245RGYRG4
ACTIVE
VQFN
RGY
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
WS245
74AVCH4T245RSVR-NT
ACTIVE
UQFN
RSV
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
ZWV
74AVCH4T245RSVRG4
ACTIVE
UQFN
RSV
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
ZWV
SN74AVCH4T245D
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVCH4T245
SN74AVCH4T245DGVR
ACTIVE
TVSOP
DGV
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
SN74AVCH4T245DR
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVCH4T245
SN74AVCH4T245DT
ACTIVE
SOIC
D
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVCH4T245
SN74AVCH4T245PW
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
SN74AVCH4T245PWE4
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
SN74AVCH4T245PWR
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
SN74AVCH4T245PWT
ACTIVE
TSSOP
PW
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WS245
SN74AVCH4T245RGYR
ACTIVE
VQFN
RGY
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
WS245
SN74AVCH4T245RSVR
ACTIVE
UQFN
RSV
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
ZWV
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2018
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AVCH4T245 :
• Enhanced Product: SN74AVCH4T245-EP
NOTE: Qualified Version Definitions:
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Dec-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
2.8
0.7
4.0
8.0
Q1
74AVCH4T245RSVR-NT
UQFN
RSV
16
3000
180.0
8.4
2.0
SN74AVCH4T245DGVR
TVSOP
DGV
16
2000
330.0
12.4
6.8
4.0
1.6
8.0
12.0
Q1
SN74AVCH4T245DR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
SN74AVCH4T245PWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74AVCH4T245PWT
TSSOP
PW
16
250
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74AVCH4T245RGYR
VQFN
RGY
16
3000
330.0
12.4
3.8
4.3
1.5
8.0
12.0
Q1
SN74AVCH4T245RSVR
UQFN
RSV
16
3000
180.0
12.4
2.1
2.9
0.75
4.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Dec-2018
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74AVCH4T245RSVR-NT
UQFN
RSV
16
3000
203.0
203.0
35.0
SN74AVCH4T245DGVR
TVSOP
DGV
16
2000
367.0
367.0
35.0
SN74AVCH4T245DR
SOIC
D
16
2500
333.2
345.9
28.6
SN74AVCH4T245PWR
TSSOP
PW
16
2000
367.0
367.0
35.0
SN74AVCH4T245PWT
TSSOP
PW
16
250
367.0
367.0
35.0
SN74AVCH4T245RGYR
VQFN
RGY
16
3000
355.0
350.0
50.0
SN74AVCH4T245RSVR
UQFN
RSV
16
3000
203.0
203.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
PW0016A
TSSOP - 1.2 mm max height
SCALE 2.500
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
TYP
6.2
A
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1
2X
5.1
4.9
NOTE 3
4.55
8
9
B
0.30
0.19
0.1
C A B
16X
4.5
4.3
NOTE 4
1.2 MAX
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0 -8
0.75
0.50
DETAIL A
A 20
TYPICAL
4220204/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
16X (1.5)
(R0.05) TYP
1
16
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4220204/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
16X (1.5)
SYMM
(R0.05) TYP
1
16X (0.45)
16
SYMM
14X (0.65)
8
9
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220204/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
RSV0016A
UQFN - 0.55 mm max height
SCALE 5.000
ULTRA THIN QUAD FLATPACK - NO LEAD
1.85
1.75
B
A
PIN 1 INDEX AREA
2.65
2.55
C
0.55
0.45
SEATING PLANE
0.05 C
0.05
0.00
2X 1.2
SYMM
5
(0.13) TYP
8
15X
4
0.45
0.35
9
SYMM
2X 1.2
12X 0.4
1
12
16
0.55
0.45
16X
0.25
0.15
0.07
0.05
C A B
13
PIN 1 ID
(45 X 0.1)
4220314/B 05/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
RSV0016A
UQFN - 0.55 mm max height
ULTRA THIN QUAD FLATPACK - NO LEAD
SYMM
(0.7)
16
SEE SOLDER MASK
DETAIL
13
12
1
16X (0.2)
SYMM
12X (0.4)
(R0.05) TYP
(2.4)
9
4
15X (0.6)
8
5
(1.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 25X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK DEFINED
SOLDER MASK DETAILS
4220314/B 05/2019
NOTES: (continued)
3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
RSV0016A
UQFN - 0.55 mm max height
ULTRA THIN QUAD FLATPACK - NO LEAD
(0.7)
13
16
16X (0.2)
12
1
SYMM
12X (0.4)
(2.4)
(R0.05) TYP
4
9
15X (0.6)
5
8
SYMM
(1.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 25X
4220314/B 05/2019
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising