Texas Instruments | 6-Bit Bidirectional Voltage-Level Translator, TXB0106 (Rev. B) | Datasheet | Texas Instruments 6-Bit Bidirectional Voltage-Level Translator, TXB0106 (Rev. B) Datasheet

Texas Instruments 6-Bit Bidirectional Voltage-Level Translator, TXB0106 (Rev. B) Datasheet
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TXB0106
SCES709B – SEPTEMBER 2008 – REVISED JUNE 2015
TXB0106 6-Bit Bidirectional Level-Shifting and Voltage Translator
With Auto-Direction Sensing and ±15-kV ESD Protection
1 Features
3 Description
•
This 6-bit noninverting translator uses two separate
configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed to
track VCCB. VCCB accepts any supply voltage from
1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.2 V, 1.5
V, 1.8 V, 2.5 V, 3.3 V, and 5 V voltage nodes. VCCA
should not exceed VCCB.
1
•
•
•
•
•
•
1.2 V to 3.6 V on A Port and 1.65 to 5.5 V on
B Port (VCCA≤ VCCB)
VCC Isolation Feature – If Either VCC Input Is at
GND, All Outputs Are in the High-Impedance
State
OE Input Circuit Referenced to VCCA
Low-Power Consumption, 4 μA Max ICC
Ioff Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– A Port
– 2500 V Human Body Model (A114-B)
– 150 V Machine Model (A115-A)
– 1500 V Charged-Device Model (C101)
– B Port
– ±15 kV Human Body Model (A114-B)
– 150 V Machine Model (A115-A)
– 1500 V Charged-Device Model (C101)
When the output-enable (OE) input is low, all outputs
are placed in the high-impedance state.
The TXB0106 is designed so that the OE input circuit
is supplied by VCCA.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
To ensure the high-impedance state during power up
or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
2 Applications
•
•
•
•
Device Information(1)
PART NUMBER
Headset
Smartphone
Tablet
Desktop PC
TXB0106
PACKAGE
BODY SIZE (NOM)
TSSOP (16)
5.00 mm × 4.40 mm
VQFN (16)
4.00 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Typical Application Block Diagram for TXB010X
VCCA
Processor
VCCB
Peripheral
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TXB0106
SCES709B – SEPTEMBER 2008 – REVISED JUNE 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
4
4
4
5
5
6
6
6
6
6
6
7
7
8
8
8
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions ......................
Thermal Information ..................................................
Electrical Characteristics ..........................................
Timing Requirements: VCCA = 1.2 V ........................
Timing Requirements: VCCA = 1.5 V ± 0.1 V ............
Timing Requirements: VCCA = 1.8 V ± 0.15 V ..........
Timing Requirements: VCCA = 2.5 V ± 0.2 V ............
Timing Requirements: VCCA = 3.3 V ± 0.3 V ..........
Switching Characteristics: VCCA = 1.2 V .................
Switching Characteristics: VCCA = 1.5 V ± 0.1 V ....
Switching Characteristics: VCCA = 1.8 V ± 0.15 V ..
Switching Characteristics: VCCA = 2.5 V ± 0.2 V ....
Switching Characteristics: VCCA = 3.3 V ± 0.3 V ....
Operating Characteristics........................................
6.17 Typical Characteristics ............................................ 9
7
8
Parameter Measurement Information ................ 10
Detailed Description ............................................ 10
8.1 Overview ................................................................. 10
8.2 Functional Block Diagram ....................................... 11
8.3 Feature Description................................................. 12
9
Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application ................................................. 15
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 17
11.1 Layout Guidelines ................................................. 17
11.2 Layout Example .................................................... 17
12 Device and Documentation Support ................. 18
12.1
12.2
12.3
12.4
12.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (May 2012) to Revision B
•
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Original (September 2008) to Revision A
•
2
Page
Page
Added notes to pin out graphics............................................................................................................................................. 3
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Product Folder Links: TXB0106
TXB0106
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SCES709B – SEPTEMBER 2008 – REVISED JUNE 2015
5 Pin Configuration and Functions
16-PIN TSSOP and VQFN
PW PACKAGE
(TOP VIEW)
3
14
4
13
5
12
6
11
7
10
8
9
B1
VCCB
B2
B3
B4
B5
B6
GND
B1
15
A1
16
1
16
VCCA
2
15
VCCB
A2
3
14
B2
A3
4
13
B3
A4
5
12
B4
A5
6
11
B5
A6
7
10
B6
Exposed
Center Pad
8
9
GND
A2
A3
A4
A5
A6
OE
1
2
OE
A1
VCCA
RGY PACKAGE
(TOP VIEW)
A.
The exposed center pad, if used, must be connected as a secondary ground or left electrically open.
B.
Pull up resistors are not required on both sides for Logic I/O.
C.
If pull up or pull down resistors are needed, the resistor value must be over 50 kΩ.
D.
50 kΩ is a safe recommended value, if the customer can accept higher Vol or lower Voh, smaller pull up or pull down
resistor is allowed, the draft estimation is VOL = VCCOUT × 4.5 k/(4.5 k + RPU) and VOH = VCCOUT × RDW/(4.5 k + RDW).
E.
If pull up resistors are needed, please refer to the TXS0108 (different package with TXB0106) or contact TI.
F.
For detailed information, please refer to application note SCEA043.
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
A1
Input/output 1. Referenced to VCCA.
2
VCCA
-
3
A2
I/O
Input/output 2. Referenced to VCCA.
4
A3
I/O
Input/output 3. Referenced to VCCA.
5
A4
I/O
Input/output 4. Referenced to VCCA.
6
A5
I/O
Input/output 5. Referenced to VCCA.
7
A6
I/O
Input/output 6. Referenced to VCCA.
8
OE
-
Output enable. Pull OE low to place all outputs in Tri-state mode. Referenced to VCCA.
9
GND
-
Ground
10
B6
I/O
Input/output 6. Referenced to VCCB.
11
B5
I/O
Input/output 5. Referenced to VCCB.
12
B4
I/O
Input/output 4. Referenced to VCCB.
13
B3
I/O
Input/output 3. Referenced to VCCB.
14
B2
I/O
Input/output 2. Referenced to VCCB.
15
VCCB
-
16
B1
I/O
A-port supply voltage. 1.2 V ≤ VCCA≤ 3.6 V, VCCA≤ VCCB.
B-port supply voltage. 1.65 V ≤ VCCB ≤ 5.5 V.
Input/output 1. Referenced to VCCB.
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TXB0106
SCES709B – SEPTEMBER 2008 – REVISED JUNE 2015
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VCCA
Supply voltage
–0.5
4.6
V
VCCB
Supply voltage
–0.5
6.5
V
VI
Input voltage (2)
–0.5
6.5
V
VO
Voltage applied to any output in the high-impedance or power-off state (2)
–0.5
6.5
V
VO
Voltage applied to any output in the high or low state (2)
A inputs
–0.5
VCCA + 0.5
B inputs
–0.5
VCCB + 0.5
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCCA, VCCB, or GND
±100
mA
(3)
V
TJ
Junction Temperature
-40
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
V(ESD)
Electrostatic
discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS001 (1)
A Port
2500
B Port
±15000
Charged-device model (CDM), per JEDEC specification
JESD22-C101 (2)
A Port
(1)
(2)
JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
(2)
VCCA
VCCA
VCCB
High-level input voltage
VIL
Low-level input voltage
Δt/Δv
Input transition
rise or fall rate
4
VCCB
Supply voltage
VIH
(1)
(2)
(3)
V
150
B Port
6.3 Recommended Operating Conditions (1)
TA
1500
B Port
A Port
Machine model (A115-A)
UNIT
Data inputs
OE
1.2 V to 3.6 V
Data inputs
1.2 V to 5.5 V
OE
1.2 V to 3.6 V
A-port inputs
1.2 V to 3.6 V
B-port inputs
1.2 V to 3.6 V
1.65 V to 5.5 V
1.65 V to 5.5 V
MIN
MAX
1.2
3.6
1.65
5.5
VCCI× 0.65 (3)
VCCI
VCCA× 0.65
5.5
0
VCCI× 0.35 (3)
0
VCCA× 0.35
1.65 V to 5.5 V
40
1.65 V to 3.6 V
40
4.5 V to 5.5 V
30
Operating free-air temperature
–40
85
UNIT
V
V
V
ns/V
°C
The A and B sides of an unused data I/O pair must be held in the same state, i.e., both at VCCI or both at GND.
VCCA must be less than or equal to VCCB and must not exceed 3.6 V.
VCCI is the supply voltage associated with the input port.
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6.4 Thermal Information
TXB0106
THERMAL METRIC (1)
PW (TSSOP)
RGY (VQFN)
16 PINS
16 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
107.2
40.7
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
34.9
54.1
°C/W
RθJB
Junction-to-board thermal resistance
13.3
20.9
°C/W
ψJT
Junction-to-top characterization parameter
0.5
1.1
°C/W
ψJB
Junction-to-board characterization parameter
13.3
20.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.7
6.7
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (1) (2)
PARAMETER
TEST
CONDITIONS
VCCA
VCCB
1.2 V
IOH = –20 μA
VOLA
IOL = 20 μA
VOHB
IOH = –20 μA
1.65 V to 5.5 V
VOLB
IOL = 20 μA
1.65 V to 5.5 V
OE
Ioff
IOZ
MAX
0.9
1.4 V to 3.6 V
0.4
VCCB– 0.4
V
V
μA
±1
±2
A port
0V
0 V to 5.5 V
±1
±2
B port
0 V to 3.6 V
0V
±1
±2
OE = GND
1.2 V to 3.6 V
1.65 V to 5.5 V
±1
±2
VI = VCCI or GND,
IO = 0
1.4 V to 3.6 V
3.6 V
0V
0V
5.5 V
VI = VCCI or GND,
IO = 0
1.4 V to 3.6 V
ICCA + ICCB
VI = VCCI or GND,
IO = 0
1.2 V
ICCZA
VI = VCCI or GND,
IO = 0,
OE = GND
ICCZB
VI = VCCI or GND,
IO = 0,
OE = GND
ICCB
OE
A port
B port
1.65 V to 5.5 V
1.65 V to 5.5 V
3.6 V
0V
0V
5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
1.2 V
1.4 V to 3.6 V
μA
μA
0.06
5
2
μA
2
3.4
5
–2
μA
2
3.5
10
μA
0.05
1.65 V to 5.5 V
1.2 V
1.4 V to 3.6 V
V
0.4
1.65 V to 5.5 V
A or B port
UNIT
V
VCCA– 0.4
1.2 V
1.2 V
(1)
(2)
MIN
1.2 V to 3.6 V
ICCA
Cio
–40°C to 85°C
MAX
1.4 V to 3.6 V
1.2 V
CI
TYP
1.1
VOHA
II
TA = 25°C
MIN
5
μA
3.3
1.65 V to 5.5 V
1.2 V to 3.6 V
1.65 V to 5.5 V
1.2 V to 3.6 V
1.65 V to 5.5 V
5
5
5.5
5
6.5
8
10
μA
pF
pF
VCCI is the supply voltage associated with the input port.
VCCO is the supply voltage associated with the output port.
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6.6 Timing Requirements: VCCA = 1.2 V
TA = 25°C, VCCA = 1.2 V
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
NOM
NOM
NOM
NOM
20
20
20
20
Mbps
50
50
50
50
ns
Data rate
tw
Pulse duration
Data inputs
UNIT
6.7 Timing Requirements: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
MAX
Data rate
tw
VCCB = 2.5 V
± 0.2 V
MIN
MAX
50
Pulse duration
Data inputs
VCCB = 3.3 V
± 0.3 V
MIN
MAX
50
20
VCCB = 5 V
± 0.5 V
MIN
50
20
50
20
UNIT
MAX
20
Mbps
ns
6.8 Timing Requirements: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
MAX
Data rate
tw
VCCB = 2.5 V
± 0.2 V
MIN
MAX
52
Pulse duration
Data inputs
VCCB = 3.3 V
± 0.3 V
MIN
MAX
60
19
VCCB = 5 V
± 0.5 V
MIN
60
17
60
17
UNIT
MAX
17
Mbps
ns
6.9 Timing Requirements: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
VCCB = 2.5 V
± 0.2 V
MIN
MAX
Data rate
tw
VCCB = 3.3 V
± 0.3 V
MIN
MAX
70
Pulse duration
Data inputs
VCCB = 5 V
± 0.5 V
MIN
100
14
100
10
UNIT
MAX
10
Mbps
ns
6.10 Timing Requirements: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
VCCB = 3.3 V
± 0.3 V
MIN
Data rate
tw
VCCB = 5 V
± 0.5 V
MAX
MIN
100
Pulse duration
Data inputs
10
UNIT
MAX
100
10
Mbps
ns
6.11 Switching Characteristics: VCCA = 1.2 V
TA = 25°C, VCCA = 1.2 V
PARAMETER
tpd
TO
(OUTPUT)
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
TYP
TYP
TYP
TYP
A
B
9.5
7.9
7.6
8.5
B
A
9.2
8.8
8.4
8
A
1
1
1
1
B
1
1
1
1
A
20
17
17
18
B
20
16
15
15
A-port rise and fall times
4.1
4.4
4.1
3.9
ten
OE
tdis
OE
trA, tfA
6
FROM
(INPUT)
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UNIT
ns
μs
ns
ns
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Switching Characteristics: VCCA = 1.2 V (continued)
TA = 25°C, VCCA = 1.2 V
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
TYP
TYP
TYP
TYP
UNIT
trB, tfB
B-port rise and fall times
5
5
5.1
5.1
ns
tSK(O)
Channel-to-channel skew
2.4
1.7
1.9
7
ns
20
20
20
20
Mbps
Max data rate
6.12 Switching Characteristics: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.4
12.9
1.2
10.1
1.1
10
0.8
9.9
A
0.9
14.2
0.7
12
0.4
11.7
0.3
13.7
A
1
1
1
1
B
1
1
1
1
ns
μs
A
6.6
33
6.4
25.3
6.1
23.1
5.9
24.6
B
6.6
35.6
5.8
25.6
5.5
22.1
5.6
20.6
A-port rise and fall times
0.8
6.5
0.8
6.3
0.8
6.3
0.8
6.3
ns
trB, tfB
B-port rise and fall times
1
7.3
0.7
4.9
0.7
4.6
0.6
4.6
ns
tSK(O)
Channel-to-channel skew
trA, tfA
Max data rate
2.6
1.9
50
50
1.6
50
1.3
50
ns
ns
Mbps
6.13 Switching Characteristics: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.6
11
1.4
7.7
1.3
6.8
1.2
6.5
A
1.5
12
1.2
8.4
0.8
7.6
0.5
7.1
A
1
1
1
1
B
1
1
1
1
ns
μs
A
5.9
26.7
5.6
21.6
5.4
18.9
4.8
18.7
B
6.1
33.9
5.2
23.7
5
19.9
5
17.6
trA, tfA
A-port rise and fall times
0.7
5.1
0.7
5
1
5
0.7
5
ns
trB, tfB
B-port rise and fall times
1
7.3
0.7
5
0.7
3.9
0.6
3.8
ns
tSK(O)
Channel-to-channel skew
0.6
ns
Max data rate
0.8
52
0.7
60
0.6
60
60
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Mbps
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6.14 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
B
1.1
A
1
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
6.4
1
5.3
0.9
4.7
7
0.6
5.6
0.3
4.4
A
1
1
1
B
1
1
1
A
5
16.9
4.9
15
4.5
13.8
B
4.8
21.8
4.5
17.9
4.4
15.2
ns
μs
ns
trA, tfA
A-port rise and fall times
0.8
3.6
0.6
3.6
0.5
3.5
ns
trB, tfB
B-port rise and fall times
0.6
4.9
0.7
3.9
0.6
3.2
ns
tSK(O)
Channel-to-channel skew
0.3
ns
0.4
Max data rate
0.3
70
100
100
Mbps
6.15 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
B
0.9
4.9
0.8
4
A
0.5
5.4
0.2
4
A
1
1
B
1
1
ns
μs
A
4.5
13.9
4.1
12.4
B
4.1
17.3
4
14.4
A-port rise and fall times
0.5
3
0.5
3
ns
trB, tfB
B-port rise and fall times
0.7
3.9
0.6
3.2
ns
tSK(O)
Channel-to-channel skew
trA, tfA
0.4
Max data rate
ns
0.3
100
ns
100
Mbps
6.16 Operating Characteristics
TA = 25°C
VCCA
1.2 V
1.2 V
1.5 V
1.8 V
2.5 V
2.5 V
3.3 V
5V
3.3 V
to
5V
VCCB
PARAMETER
TEST CONDITIONS
5V
CpdA
CpdB
CpdA
CpdB
8
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
B-port input, A-port output
A-port input, B-port output
B-port input, A-port output
CL = 0, f = 10 MHz,
tr = tf = 1 ns,
OE = VCCA
(outputs enabled)
CL = 0, f = 10 MHz,
tr = tf = 1 ns,
OE = GND
(outputs disabled)
1.8 V
1.8 V
1.8 V
2.5 V
UNIT
TYP
TYP
TYP
TYP
TYP
TYP
TYP
9
8
7
7
7
7
8
12
11
11
11
11
11
11
35
26
27
27
27
27
28
26
19
18
18
18
20
21
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.01
0.03
0.01
0.01
0.01
0.01
0.01
0.01
0.03
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pF
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6.17 Typical Characteristics
6
40
25qC (Room Temperature)
85qC
5
A Port I/O Capacitance (pF)
OE Pin Input Capacitance (pF)
6
4
3
2
1
0
5
4
3
2
40
25qC (Room Temperature)
85qC
1
0
0
0.5
1
1.5
2
2.5
3
3.5
4
VCCA (V)
0
0.5
1
1.5
D001
VCCB= 3.3 V
2
2.5
VCCA (V)
3
3.5
4
D002
VCCB= 3.3 V
Figure 1. Input capacitance for OE pin (CI) vs
Power Supply (VCCA)
Figure 2. Capacitance for A port I/O pins (CiO) vs Power
Supply (VCCA)
B Port I/O Capacitance (pF)
12
10
8
6
4
40
25qC (Room Temperature)
85qC
2
0
0
0.5
1
1.5
2
2.5 3
VCCB (V)
3.5
4
4.5
5
5.5
D003
VCCA= 1.8 V
Figure 3. Capacitance for B port I/O pins (CiO) vs Power Supply (VCCB)
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7 Parameter Measurement Information
2 × VCCO
From Output
Under Test
50 kW
From Output
Under Test
15 pF
15 pF
1 MW
Open
50 kW
TEST
tPZL/tPLZ
tPHZ/tPZH
LOAD CIRCUIT FOR
ENABLE/DISABLE
TIME MEASUREMENT
LOAD CIRCUIT FOR MAX DATA RATE,
PULSE DURATION PROPAGATION
DELAY OUTPUT RISE AND FALL TIME
MEASUREMENT
S1
S1
2 × VCCO
Open
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
tPHL
tw
Output
VCCO/2
0.9 y VCCO
0.1 y VCCO
VOH
tf
tr
VCCI
VCCO/2
VOL
Input
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
A.
B.
C.
D.
E.
F.
G.
VCCI/2
CL includes probe and jig capacitance.
All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.
The outputs are measured one at a time, with one transition per measurement.
tPLH and tPHL are the same as tpd.
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuits and Voltage Waveforms
8 Detailed Description
8.1 Overview
The TXB0106 device is a 6-bit, directionless voltage-level translator specifically designed for translating logic
voltage levels. The A port is able to accept I/O voltages ranging from 1.2 V to 3.6 V, while the B port can accept
I/O voltages from 1.65 V to 5.5 V. The device is a buffered architecture with edge-rate accelerators (one-shots)
to improve the overall data rate. This device can only translate push-pull CMOS logic outputs. If for open-drain
signal translation, please refer to TI’s TXS010X products.
10
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8.2 Functional Block Diagram
VCCB
VCCA
OE
One-Shot
4 kΩ
A1
B1
One-Shot
4 kΩ
One-Shot
4 kΩ
A2
B2
One-Shot
4 kΩ
One-Shot
4 kΩ
A3
B3
One-Shot
4 kΩ
One-Shot
4 kΩ
A4
B4
One-Shot
4 kΩ
One-Shot
4 kΩ
A5
B5
One-Shot
4 kΩ
One-Shot
4 kΩ
A6
B6
One-Shot
4 kΩ
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8.3 Feature Description
8.3.1 Architecture
The TXB0106 architecture (see Figure 5) does not require a direction-control signal to control the direction of
data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0106 can maintain a high or low,
but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts
flowing the opposite direction.
The output one-shots detect rising or falling edges on the A or B ports. During a rising edge, the one-shot turns
on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly,
during a falling edge, the one-shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up
the high-to-low transition. The typical output impedance during output transition is 70 Ω at VCCO = 1.2 V to 1.8 V,
50 Ω at VCCO = 1.8 V to 3.3 V, and 40 Ω at VCCO = 3.3 V to 5 V.
VCCA
VCCB
One
Shot
T1
4 kΩ
One
Shot
T2
A
B
One
Shot
T3
4 kΩ
T4
One
Shot
Figure 5. Architecture of TXB0106 I/O Cell
8.3.2 Input Driver Requirements
Typical IIN vs VIN characteristics of the TXB0106 are shown in Figure 6. For proper operation, the device driving
the data I/Os of the TXB0106 must have drive strength of at least ±2 mA.
12
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Feature Description (continued)
IIN
VT/4 kΩ
VIN
–(VD –V T)/4 kΩ
A.
VT is the input threshold voltage of the TXB0106 (typically VCCI/ 2).
B.
VD is the supply voltage of the external driver.
Figure 6. Typical IIN vs VIN Curve
8.3.3 Power Up
During operation, ensure that VCCA ≤ VCCB at all times. During power-up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first. The TXB0106 has circuitry that disables all
output ports when either VCC is switched off (VCCA/B = 0 V).
8.3.4 Output Load Considerations
TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading
and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths should be kept short enough
such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity
by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay
on for approximately 10 ns. The maximum capacitance of the lumped load that can be driven also depends
directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is
driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic ICC,
load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the
capacitance that the TXB0106 output sees, so it is recommended that this lumped-load capacitance be
considered to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level
affects.
8.3.5 Enable and Disable
The TXB0106 has an OE input that is used to disable the device by setting OE = low, which places all I/Os in the
high-impedance (Hi-Z) state. The disable time (tdis) indicates the delay between when OE goes low and when the
outputs actually get disabled (Hi-Z). The enable time (ten) indicates the amount of time the user must allow for the
one-shot circuitry to become operational after OE is taken high.
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Feature Description (continued)
8.3.6 Pullup or Pulldown Resistors on I/O Lines
The TXB0106 is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0106 have low
dc drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must be
kept higher than 50 kΩ to ensure that they do not contend with the output drivers of the TXB0106.
For the same reason, the TXB0106 should not be used in applications such as I2C or 1-Wire where an opendrain driver is connected on the bidirectional data I/O. For these applications, use a device from the TI TXS01xx
series of level translators.
8.3.7 Device Functional Modes
The TXB0106 device has two functional modes, enabled and disabled. To disable the device, set the OE input to
low, which places all I/Os in a high impedance state. Setting the OE input to high will enable the device.
14
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TXB0106 can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another. It can only translate push-pull CMOS logic outputs. If for open-drain
signal translation, please refer to TI TXS010X products. Any external pulldown or pullup resistors are
recommended larger than 50 kΩ.
9.2 Typical Application
1.8 V
3.3 V
VCCA
VCCB
OE
TXB0106
1.8 -V
System
Controller
A1
A2
B1
B2
3.3-V
System
Data
A3
A4
A5
A6
B3
B4
B5
B6
Data
Figure 7. Typical Operating Circuit
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1. And make sure that VCCA ≤ VCCB.
Table 1. Design Parameters
DESIGN PARAMETERS
EXAMPLE VALUE
Input voltage range
1.2 V to 3.6 V
Output voltage range
1.65 V to 5.5 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
- Use the supply voltage of the device that is driving the TXB0106 device to determine the input voltage
range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low the
value must be less than the VIL of the input port.
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• Output voltage range
- Use the supply voltage of the device that the TXB0106 device is driving to determine the output voltage
range.
- Don’t recommend to have the external pullup or pulldown resistors. If mandatory, it is recommended
the value should be larger than 50 kΩ.
• An external pulldown or pullup resistor decreases the output VOH and VOL. Use the below equations to draft
estimate the VOH and VOL as a result of an external pulldown and pullup resistor.
VOH = VCCx × RPD / (RPD + 4.5 kΩ)
VOL = VCCx × 4.5 kΩ / (RPU + 4.5 kΩ)
Where
• VCCx is the output port supply voltage on either VCCA or VCCB
• RPD is the value of the external pull down resistor
• RPU is the value of the external pull up resistor
• 4.5 kΩ is the counting the variation of the serial resistor 4 kΩ in the I/O line.
9.2.3 Application Curves
Figure 8. Level-Translation of a 2.5-MHz Signal
10 Power Supply Recommendations
During operation, ensure that VCCA ≤ VCCB at all times. During power-up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first. The TXB0106 has circuitry that disables all
output ports when either VCC is switched off (VCCA/B = 0 V). The output-enable (OE) input circuit is designed so
that it is supplied by VCCA and when the (OE) input is low, all outputs are placed in the high-impedance state. To
ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to
GND through a pulldown resistor and must not be enabled until VCCA and VCCB are fully ramped and stable. The
minimum value of the pulldown resistor to ground is determined by the current-sourcing capability of the driver.
16
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11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
• Bypass capacitors should be used on power supplies. And should be placed as close as possible to the VCCA,
VCCB pin and GND pin
• Short trace-lengths should be used to avoid excessive loading.
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one-shot duration, approximately 10 ns, ensuring that any reflection encounters low impedance at the
source driver.
11.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to Power Plane
VIA to GND Plane (Inner Layer)
To
Controller
1
A1
B1
16
2
VCCA
VCCB
15
To
System
Bypass Capacitor 0.1uF
Bypass Capacitor 0.1uF
To
Controller
3
A2
To
Controller
4
A3
To
Controller
5
To
Controller
6
To
Controller
7
B2
14
To
System
B3
13
To
System
A4
B4
12
To
System
A5
B5
11
To
System
B6
10
To
System
GND
9
TXB0106PW
8
A6
OE
Keep OE low until VCCA and
VCCB are powered up
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12 Device and Documentation Support
12.1 Documentation Support
For related documentation see the following:
A Guide to Voltage Translation With TXB-Type Translators, SCEA043
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TXB0106PWR
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
YE06
TXB0106RGYR
ACTIVE
VQFN
RGY
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
YE06
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
OTHER QUALIFIED VERSIONS OF TXB0106 :
• Automotive: TXB0106-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Feb-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TXB0106PWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
TXB0106RGYR
VQFN
RGY
16
3000
330.0
12.4
3.8
4.3
1.5
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Feb-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TXB0106PWR
TXB0106RGYR
TSSOP
PW
16
2000
367.0
367.0
35.0
VQFN
RGY
16
3000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
PW0016A
TSSOP - 1.2 mm max height
SCALE 2.500
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
TYP
6.2
A
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1
2X
5.1
4.9
NOTE 3
4.55
8
9
B
0.30
0.19
0.1
C A B
16X
4.5
4.3
NOTE 4
1.2 MAX
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0 -8
0.75
0.50
DETAIL A
A 20
TYPICAL
4220204/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
16X (1.5)
(R0.05) TYP
1
16
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4220204/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
16X (1.5)
SYMM
(R0.05) TYP
1
16X (0.45)
16
SYMM
14X (0.65)
8
9
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220204/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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