Texas Instruments | SN54AC00-SP Radiation Hardened Quad 2 Input NAND Gate (Rev. B) | Datasheet | Texas Instruments SN54AC00-SP Radiation Hardened Quad 2 Input NAND Gate (Rev. B) Datasheet

Texas Instruments SN54AC00-SP Radiation Hardened Quad 2 Input NAND Gate (Rev. B) Datasheet
Product
Folder
Sample &
Buy
Technical
Documents
Support &
Community
Tools &
Software
SN54AC00-SP
SCHS367B – OCTOBER 2008 – REVISED FEBRUARY 2015
SN54AC00-SP Radiation Hardened Quad 2 Input NAND Gate
1 Features
3 Description
•
The SN54AC00 device contains four independent 2input NAND gates. Each gate performs the Boolean
function of Y = A • B or Y = A + B in positive logic.
1
•
•
•
•
5962R87549:
– Radiation Hardness Assurance (RHA) up to
TID 100 krad (Si)
– SEL/SEU Immune to 86 MeV
5962-87549:
– Total Ionizing Dose 50 krad (Si)
2-V to 6-V VCC Operation
Inputs Accept Voltages to 6 V
Max tpd of 7 ns at 5 V
2 Applications
•
•
•
PART NUMBER
SN54AC00-SP
PACKAGE
BODY SIZE (NOM)
CDIP (14)
5.97 mm × 9.21 mm
CFP (14)
6.67 mm × 19.56 mm
KGD (0)
Not applicable
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SPACER
Satellite Payloads
Satellite Power on Reset Logic
RHA Known Good Die (KGD) Offering for Space
Hybrids
Pin Functions (Each Gate)
INPUTS
A
B
OUTPUT
Y
H
H
L
L
X
H
Logic Diagram (Positive Logic)
A
Device Information(1)
Y
J OR W PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
4B
4A
4Y
3B
3A
3Y
B
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54AC00-SP
SCHS367B – OCTOBER 2008 – REVISED FEBRUARY 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Bare Die Information .............................................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
4
4
4
5
Absolute Maximum Ratings ......................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
6.5 Switching Characteristics, VCC = 3.3 V..................... 6
6.6 Switching Characteristics, VCC = 5 V........................ 6
6.7 Operating Characteristics.......................................... 6
7
8
Parameter Measurement Information .................. 6
Device and Documentation Support.................... 7
8.1 Trademarks ............................................................... 7
8.2 Electrostatic Discharge Caution ................................ 7
8.3 Glossary .................................................................... 7
9
Mechanical, Packaging, and Orderable
Information ............................................................. 7
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2013) to Revision B
Page
•
Added KGD package information .......................................................................................................................................... 1
•
Added Device and Documentation Support section and Mechanical, Packaging, and Orderable Information section ........ 1
•
Added Bare Die Information, image, and Bond Pad Coordinates in Microns ....................................................................... 3
•
Added parameter information for KGD to Switching Characteristics, VCC = 3.3 V and Switching Characteristics, VCC
= 5 V ...................................................................................................................................................................................... 6
Changes from Original (October 2008) to Revision A
Page
•
Changed Features bullets ...................................................................................................................................................... 1
•
Deleted Ordering Information table ........................................................................................................................................ 1
2
Submit Documentation Feedback
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: SN54AC00-SP
SN54AC00-SP
www.ti.com
SCHS367B – OCTOBER 2008 – REVISED FEBRUARY 2015
5 Bare Die Information
DIE THICKNESS
BACKSIDE FINISH
BACKSIDE
POTENTIAL
BOND PAD
METALLIZATION COMPOSITION
BOND PAD THICKNESS
15 mils
Silicon with backgrind
Floating
TiW/AlCu2
15800 nm
Bond Pad Coordinates in Microns
DESCRIPTION
PAD NUMBER
X MIN
Y MIN
X MAX
Y MAX
1A
1
96.3
510.5
201.3
615.5
1B
2
95
94
200
199
1Y
3
508
94
613
199
2A
4
1149
94
1254
199
2B
5
1562
94
1667
199
2Y
6
1841.5
145.5
1946.5
250.5
GND
7
1841.5
445.5
1946.5
550.5
3Y
8
1841
783
1946
888
3A
9
1750.5
991
1855.5
1096
3B
10
1176.5
991
1281.5
1096
4Y
11
921
991
1026
1096
4A
12
736
991
841
1096
4B
13
95
991
200
1096
VCC
14
102.5
692
207.5
797
Submit Documentation Feedback
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: SN54AC00-SP
3
SN54AC00-SP
SCHS367B – OCTOBER 2008 – REVISED FEBRUARY 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VCC
MIN
MAX
UNIT
Supply voltage
–0.5
7
V
(2)
–0.5
VCC + 0.5
V
–0.5
VCC + 0.5
V
VI
Input voltage
VO
Output voltage (2)
IIK
Input clamp current
VI < 0 or VI > VCC
±20
mA
IOK
Output clamp current
VO < 0 or VO > VCC
±20
mA
IO
Continuous output current
VO = 0 to VCC
±50
mA
±200
mA
150
°C
150
°C
Continuous current through VCC or GND
TJ
Junction temperature
Tstg
Storage temperature
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6.2 Recommended Operating Conditions
VCC
MIN
MAX
2
6
Supply voltage
VCC = 3 V
VIH
High-level input voltage
UNIT
V
2.1
VCC = 4.5 V
3.15
VCC = 5.5 V
3.85
VCC = 3 V
V
0.9
VIL
Low-level input voltage
VCC = 4.5 V
1.35
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
VCC = 5.5 V
IOH
High-level output current
IOL
Low-level output current
Δt/Δv
Input transition rise or fall rate
TA
Operating free-air temperature
V
1.65
VCC = 3 V
12
VCC = 4.5 V
24
VCC = 5.5 V
24
VCC = 3 V
12
VCC = 4.5 V
24
VCC = 5.5 V
24
8
–55
125
mA
mA
ns/V
°C
6.3 Thermal Information
SN54AC00-SP
THERMAL METRIC
(1) (2)
J
W
14 PINS
14 PINS
RθJA
Junction-to-ambient thermal resistance
83.1
125.4
RθJC(top)
Junction-to-case (top) thermal resistance
26.6
30.85
RθJB
Junction-to-board thermal resistance
47.9
43.4
ψJT
Junction-to-top characterization parameter
N/A
N/A
ψJB
Junction-to-board characterization parameter
N/A
N/A
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
(1)
(2)
4
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The package thermal impedance is calculated in accordance with JESD 51-7 and Mil Std 883 method 1012.1 (see www.JEDEC.org).
Submit Documentation Feedback
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: SN54AC00-SP
SN54AC00-SP
www.ti.com
SCHS367B – OCTOBER 2008 – REVISED FEBRUARY 2015
6.4 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 μA
VOH
IOH = –12 mA
IOH = –24 mA
IOH = –50 mA
(1)
IOL = 50 μA
VOL
IOL = 12 mA
IOL = 24 mA
IOL = 50 mA
(1)
VCC
TA = 25°C
MIN
TYP
MAX
MIN
3V
2.9
2.9
4.5 V
4.4
4.4
5.5 V
5.4
5.4
3V
2.56
2.4
4.5 V
3.86
3.7
5.5 V
4.86
4.7
5.5 V
MAX
UNIT
V
3.85
3V
0.1
0.1
4.5 V
0.1
0.1
5.5 V
0.1
0.1
3V
0.36
0.5
4.5 V
0.36
0.5
5.5 V
0.36
0.5
5.5 V
V
1.65
II
VI = VCC or GND
5.5 V
±0.1
±1
μA
ICC
VI = VCC or GND, IO = 0
5.5 V
4
40
μA
Ci
VI = VCC or GND
(1)
5V
2.6
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
Submit Documentation Feedback
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: SN54AC00-SP
5
SN54AC00-SP
SCHS367B – OCTOBER 2008 – REVISED FEBRUARY 2015
www.ti.com
6.5 Switching Characteristics, VCC = 3.3 V
over recommended operating free-air temperature range, VCC = 3.3 V ±0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A or B
Y
A or B
Y
tPLH
tPHL
tPLH (KGD only) (1)
tPHL (KGD only)
(1)
(1)
TA = 25°C
MIN
TYP
MAX
MIN
MAX
2
7
9.5
1
11
1.5
5.5
8
1
9
1
7
9.5
1
11
1
5.5
9.5
1
11
UNIT
ns
ns
Specification limits for KGD are based on SMD 5962-8754903
6.6 Switching Characteristics, VCC = 5 V
over recommended operating free-air temperature range, VCC = 5 V ±0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A or B
Y
A or B
Y
tPLH
tPHL
tPLH (KGD only) (1)
tPHL (KGD only)
(1)
(1)
TA = 25°C
MIN
TYP
MAX
MIN
MAX
1.5
6
8
1
8.5
1.5
4.5
6.5
1
7
1.5
6
8
1
8.5
1.5
4.5
8
1
8.5
UNIT
ns
ns
Specification limits for KGD are based on SMD 5962-8754903
6.7 Operating Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
TYP
CL = 50 pF, ƒ = 1 MHz
UNIT
40
pF
7 Parameter Measurement Information
TEST
S1
tPLH/tPHL
Open
CL = 50 pF
(see Note A)
500 Ω
S1
Open
50% VCC
50% VCC
0V
tPHL
tPLH
2 × VCC
From Output
Under Test
VCC
Input
(see Note B)
In-Phase
Output
50% VCC
tPLH
tPHL
500 Ω
Out-of-Phase
Output
LOAD CIRCUIT
VOH
50% VCC
VOL
50% VCC
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
Submit Documentation Feedback
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: SN54AC00-SP
SN54AC00-SP
www.ti.com
SCHS367B – OCTOBER 2008 – REVISED FEBRUARY 2015
8 Device and Documentation Support
8.1 Trademarks
All trademarks are the property of their respective owners.
8.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
8.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
9 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Submit Documentation Feedback
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: SN54AC00-SP
7
PACKAGE OUTLINE
J0014A
CDIP - 5.08 mm max height
SCALE 0.900
CERAMIC DUAL IN LINE PACKAGE
PIN 1 ID
(OPTIONAL)
A
4X .005 MIN
[0.13]
.015-.060 TYP
[0.38-1.52]
1
14
12X .100
[2.54]
14X .014-.026
[0.36-0.66]
14X .045-.065
[1.15-1.65]
.010 [0.25] C A B
.754-.785
[19.15-19.94]
8
7
B
.245-.283
[6.22-7.19]
.2 MAX TYP
[5.08]
C
.13 MIN TYP
[3.3]
SEATING PLANE
.308-.314
[7.83-7.97]
AT GAGE PLANE
.015 GAGE PLANE
[0.38]
0 -15
TYP
14X .008-.014
[0.2-0.36]
4214771/A 05/2017
NOTES:
1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.
www.ti.com
EXAMPLE BOARD LAYOUT
J0014A
CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE
(.300 ) TYP
[7.62]
SEE DETAIL A
SEE DETAIL B
1
14
12X (.100 )
[2.54]
SYMM
14X ( .039)
[1]
8
7
SYMM
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE: 5X
.002 MAX
[0.05]
ALL AROUND
(.063)
[1.6]
METAL
( .063)
[1.6]
SOLDER MASK
OPENING
METAL
(R.002 ) TYP
[0.05]
.002 MAX
[0.05]
ALL AROUND
SOLDER MASK
OPENING
DETAIL A
DETAIL B
SCALE: 15X
13X, SCALE: 15X
4214771/A 05/2017
www.ti.com
IMPORTANT NOTICE
Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its
semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers
should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated
circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and
services.
Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced
documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements
different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers
remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have
full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products
used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with
respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous
consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and
take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will
thoroughly test such applications and the functionality of such TI products as used in such applications.
TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,
including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to
assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any
way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource
solely for this purpose and subject to the terms of this Notice.
TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI
products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,
enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically
described in the published documentation for a particular TI Resource.
Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that
include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE
TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY
RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or
endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR
REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO
ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM,
INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF
PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,
DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN
CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949
and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.
Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such
products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards
and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must
ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in
life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.
Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2017, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Related manuals

Download PDF

advertising