Texas Instruments | SINGLE, SCHMITT-TRIGGER INVERTER GATE (Rev. P) | Datasheet | Texas Instruments SINGLE, SCHMITT-TRIGGER INVERTER GATE (Rev. P) Datasheet

Texas Instruments SINGLE, SCHMITT-TRIGGER INVERTER GATE (Rev. P) Datasheet
SN74AHCT1G14
www.ti.com
SCLS322P – MARCH 1996 – REVISED JUNE 2013
SINGLE SCHMITT-TRIGGER INVERTER GATE
Check for Samples: SN74AHCT1G14
FEATURES
1
•
•
•
•
•
•
Operating Range 4.5-V to 5.5-V
Max tpd of 8 ns at 5-V
Low Power Consumption, 10-μA Max ICC
±8-mA Output Drive at 5-V
Inputs Are TTL-Voltage Compatible
Latch-Up Performance Exceeds 250 mA Per
JESD 17
DBV OR DCK PACKAGE
(TOP VIEW)
NC
A
GND
1
5
VCC
4
Y
2
3
NC – No internal connection
See mechanical drawings for dimensions.
DESCRIPTION
description/ordering information The SN74AHCT1G14 contains a single inverter gate. The device performs the
Boolean function Y = A.
The device functions as an independent inverter gate, but because of the Schmitt action, gates may have
different input threshold levels for positive- (VT+) and negative-going (VT–) signals.
FUNCTION TABLE
INPUTS
OUTPUT
A
Y
H
L
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
A
2
4
Y
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1996–2013, Texas Instruments Incorporated
SN74AHCT1G14
SCLS322P – MARCH 1996 – REVISED JUNE 2013
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VALUE
UNIT
Supply voltage range, VCC
–0.5 to 7
V
Input voltage range, VI (2)
–0.5 to 7
V
Output voltage range, VO (2)
–0.5 to VCC + 0.5
V
Input clamp current, IIK (VI < 0)
–20
mA
Output clamp current, IOK (VO < 0 or VO > VCC)
±20
mA
Continuous output current, IO (VO = 0 to VCC)
±25
mA
Continuous current through VCC or GND
±50
mA
Package thermal impedance, θJA (3)
DBV package
206
DCK package
252
Storage temperature range, Tstg
(1)
(2)
(3)
°C/W
–65 to 150
°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS (1)
MIN
MAX
UNIT
VCC
Supply voltage
4.5
5.5
V
VI
Input voltage
0
5.5
V
VO
Output voltage
0
VCC
V
IOH
High-level output current
–8
mA
IOL
Low-level output current
8
mA
TA
Operating free-air temperature
125
°C
(1)
2
–40
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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Copyright © 1996–2013, Texas Instruments Incorporated
Product Folder Links :SN74AHCT1G14
SN74AHCT1G14
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SCLS322P – MARCH 1996 – REVISED JUNE 2013
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
Recommended
PARAMETER
TEST CONDITIONS
TA = 25°C
VCC
MIN
UNIT
MAX
MIN
MIN
MAX
4.5 V
0.9
2
0.9
0.9
2.0
5.5 V
1.1
2
1.1
1.1
2.0
VT–
Negative-going
input threshold
votlage
4.5 V
0.5
1.6
0.5
0.5
1.6
5.5 V
0.6
1.5
0.6
0.6
1.5
ΔVT
Hysteresis (VT+ –
VT–)
4.5 V
0.4
1.4
0.4
0.4
1.4
5.5 V
0.5
1.6
0.4
0.5
1.6
4.4
4.4
3.88
3.7
VOL
II
IOH = –50 mA
IOH = –8 mA
IOL = 50 mA
Ci
VI = VCC or GND
3.94
0 V to 5.5
V
VI = 5.5 V or GND
VI = VCC or
GND,
4.5
4.5 V
IOL = 8 mA
ICC
4.4
4.5 V
IO = 0
5.5 V
5V
2
MAX
TA = –40°C to
125°C
VT+
Positive-going
input threshold
voltage
VOH
TYP
TA = –40°C to 85°C
V
V
V
V
0.1
0.1
0.1
0.36
0.44
0.55
±0.1
±1
±1
µA
1
10
10
µA
10
10
10
pF
V
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
OUTPUT
CAPACITANCE
A
Y
CL = 15 pF
A
Y
CL = 50 pF
Recommended
TA = –40°C to
85°C
TA = 25°C
MIN
TA = –40°C to
125°C
MAX
MIN
UNIT
TYP
MAX
4
7
1
8
1
MAX
9
4
7
1
8
1
9
5.5
8
1
9
1
10
5.5
8
1
9
1
10
ns
ns
OPERATING CHARACTERISTICS
VCC = 5 V, TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
No load,
f = 1 MHz
TYP
12
UNIT
pF
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Product Folder Links :SN74AHCT1G14
3
SN74AHCT1G14
SCLS322P – MARCH 1996 – REVISED JUNE 2013
www.ti.com
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
RL = 1 kΩ
From Output
Under Test
Test
Point
VCC
Open
S1
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
3V
1.5 V
Input
1.5 V
th
tsu
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
3V
1.5 V
Input
1.5 V
0V
tPHL
tPLH
In-Phase
Output
50% VCC
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
VOH
50% VCC
VOL
1.5 V
1.5 V
0V
tPLZ
tPZL
≈VCC
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
tPZH
tPLH
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
3V
Output
Control
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
A.
CL includes probe and jig capacitance.
B.
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output
control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output
control.
C.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf
≤ 3 ns.
D.
The outputs are measured one at a time with one input transition per measurement.
E.
All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
4
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Copyright © 1996–2013, Texas Instruments Incorporated
Product Folder Links :SN74AHCT1G14
SN74AHCT1G14
www.ti.com
SCLS322P – MARCH 1996 – REVISED JUNE 2013
REVISION HISTORY
Changes from Revision O (January 2003) to Revision P
Page
•
Changed document format from Quicksilver to DocZone. .................................................................................................... 1
•
Extended operating temperature range to 125°C ................................................................................................................. 2
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Copyright © 1996–2013, Texas Instruments Incorporated
Product Folder Links :SN74AHCT1G14
5
PACKAGE OPTION ADDENDUM
www.ti.com
4-Apr-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
74AHCT1G14DBVRG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
B14G
74AHCT1G14DBVTE4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
B14G
74AHCT1G14DCKTE4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
BF3
74AHCT1G14DCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
BF3
SN74AHCT1G14DBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(B143, B14G, B14J,
B14L, B14S)
SN74AHCT1G14DBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(B143, B14G, B14J,
B14L, B14S)
SN74AHCT1G14DCK3
ACTIVE
SC70
DCK
5
3000
Pb-Free
(RoHS)
CU SNBI
Level-1-260C-UNLIM
-40 to 125
BFY
SN74AHCT1G14DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(BF3, BFG, BFJ, BF
L, BFS)
SN74AHCT1G14DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
(BF3, BFG, BFJ, BF
L, BFS)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
4-Apr-2019
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
74AHCT1G14DBVRG4
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
SOT-23
DBV
5
3000
178.0
9.0
3.23
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.17
1.37
4.0
8.0
Q3
74AHCT1G14DCKTG4
SC70
DCK
5
250
178.0
9.2
2.4
2.4
1.22
4.0
8.0
Q3
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
178.0
9.0
3.23
3.17
1.37
4.0
8.0
Q3
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
178.0
9.2
3.3
3.23
1.55
4.0
8.0
Q3
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
180.0
8.4
3.23
3.17
1.37
4.0
8.0
Q3
SN74AHCT1G14DBVT
SOT-23
DBV
5
250
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
SN74AHCT1G14DBVT
SOT-23
DBV
5
250
178.0
9.2
3.3
3.23
1.55
4.0
8.0
Q3
SN74AHCT1G14DBVT
SOT-23
DBV
5
250
178.0
9.0
3.3
3.2
1.4
4.0
8.0
Q3
SN74AHCT1G14DCKR
SC70
DCK
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
SN74AHCT1G14DCKR
SC70
DCK
5
3000
178.0
9.2
2.4
2.4
1.22
4.0
8.0
Q3
SN74AHCT1G14DCKR
SC70
DCK
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
SN74AHCT1G14DCKT
SC70
DCK
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
SN74AHCT1G14DCKT
SC70
DCK
5
250
178.0
9.2
2.4
2.4
1.22
4.0
8.0
Q3
SN74AHCT1G14DCKT
SC70
DCK
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74AHCT1G14DBVRG4
74AHCT1G14DCKTG4
SOT-23
DBV
5
3000
180.0
180.0
18.0
SC70
DCK
5
250
180.0
180.0
18.0
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
SN74AHCT1G14DBVR
SOT-23
DBV
5
3000
202.0
201.0
28.0
SN74AHCT1G14DBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
SN74AHCT1G14DBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
SN74AHCT1G14DBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
SN74AHCT1G14DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
SN74AHCT1G14DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
SN74AHCT1G14DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
SN74AHCT1G14DCKT
SC70
DCK
5
250
180.0
180.0
18.0
SN74AHCT1G14DCKT
SC70
DCK
5
250
180.0
180.0
18.0
SN74AHCT1G14DCKT
SC70
DCK
5
250
180.0
180.0
18.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
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