Texas Instruments | SN74AUP1T98 Single-Supply Voltage-Level Translator With 9 Gate Logic Functions (Rev. I) | Datasheet | Texas Instruments SN74AUP1T98 Single-Supply Voltage-Level Translator With 9 Gate Logic Functions (Rev. I) Datasheet

Texas Instruments SN74AUP1T98 Single-Supply Voltage-Level Translator With 9 Gate Logic Functions (Rev. I) Datasheet
SN74AUP1T98
www.ti.com
SCES614I – OCTOBER 2004 – REVISED MAY 2013
SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR
WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS
Check for Samples: SN74AUP1T98
FEATURES
1
•
2
•
•
•
•
•
•
•
•
•
•
•
•
•
Available in the Texas Instruments NanoStar™
Packages
Single-Supply Voltage Translator
1.8 V to 3.3 V (at VCC = 3.3 V)
2.5 V to 3.3 V (at VCC = 3.3 V)
1.8 V to 2.5 V (at VCC = 2.5 V)
3.3 V to 2.5 V (at VCC = 2.5 V)
Nine Configurable Gate Logic Functions
Schmitt-Trigger Inputs Reject Input Noise and
Provide Better Output Signal Integrity
Ioff Supports Partial-Power-Down Mode With
Low Leakage Current (0.5 μA)
Very Low Static and Dynamic Power
Consumption
Pb-Free Packages Available: SOT-23 (DBV),
SC-70 (DCK), and WCSP (NanoStar)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
Related Devices: SN74AUP1T97,
SN74AUP1T57, and SN74AUP1T58
DBV OR DCK PACKAGE
(TOP VIEW)
B
GND
A
1
6
2
5
3
4
C
VCC
Y
DRY OR DSF PACKAGE
(TOP VIEW)
B
1
6
C
GND
2
5
VCC
A
3
4
Y
YFP OR YZP PACKAGE
(TOP VIEW)
B
GND
A
A1
1 6
A2
B1
2 5
B2
C
VCC
C1
3 4
C2
Y
DESCRIPTION
AUP technology is the industry's lowest-power logic technology designed for use in battery-operated or battery
backed-up equipment. The SN74AUP1T98 is designed for logic-level translation applications with input switching
levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply.
The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and
ensures normal operation between this range.
Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise
immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger
inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.
The SN74AUP1T98 can be easily configured to perform a required gate function by connecting A, B, and C
inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be
performed.
Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile
applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of
the device. No damage occurs to the device under these conditions.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2013, Texas Instruments Incorporated
SN74AUP1T98
SCES614I – OCTOBER 2004 – REVISED MAY 2013
www.ti.com
The SN74AUP1T98 is designed with optimized current-drive capability of 4 mA to reduce line reflections,
overshoot, and undershoot caused by high-drive outputs.
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package.
ORDERING INFORMATION
For package and ordering information, see the Package Option Addendum at the end of this document.
FUNCTION SELECTION TABLE
LOGIC FUNCTION
5
2-input NAND gate
6
2-input NOR gate with one inverted input
7
2-input NAND gate with one inverted input
7
2-input NAND gate with one inverted input
8
2-input NOR gate with one inverted input
8
2-input NOR gate
9
Inverter
10
Noninverted buffer
11
Static-Power Consumption
(µA)
Dynamic-Power Consumption
(pF)
3
80%
2.5
60%
3.3-V
LVC
Logic†
40%
Voltage − V
100%
80%
3.3-V
40%
Logic†
20%
20%
AUP
0%
†
0%
AUP
Switching Characteristics
at 25 MHz†
3.5
100%
60%
2
1.5
1
Input
Output
0.5
0
−0.5
Single, dual, and triple gates
0
5
10
15
20 25 30
Time − ns
35
40
45
† AUP1G08 data at C = 15 pF
L
Figure 1. AUP – The Lowest-Power Family
2
FIGURE NO.
2-to-1 data selector
Figure 2. Excellent Signal Integrity
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
SN74AUP1T98
www.ti.com
SCES614I – OCTOBER 2004 – REVISED MAY 2013
3.3 V
3.3 V
VIH = 1.19 V
VIL = 0.5 V
VIH = 1.19 V
VIL = 0.5 V
1.8-V
System
2.5-V
System
3.3-V
System
3.3-V
System
SN74AUP1T98
SN74AUP1T98
2.5 V
2.5 V
VIH = 1.10 V
VIL = 0.35 V
VIH = 1.10 V
VIL = 0.35 V
1.8-V
System
2.5-V
System
3.3-V
System
SN74AUP1T98
2.5-V
System
SN74AUP1T98
Figure 3. Possible Voltage-Translation Combinations
3.3 V
1.8-V
System
3.3-V
System
SN74AUP1T98
VOH min
VT+ max = VIH min = 1.19 V
VT− min = VIL max = 0.5 V
VOL max
Input Switching Waveform
Output Switching Waveform
Figure 4. Switching Thresholds for 1.8-V to 3.3-V Translation
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
3
SN74AUP1T98
SCES614I – OCTOBER 2004 – REVISED MAY 2013
www.ti.com
FUNCTION TABLE
INPUTS
A
OUTPUT
Y
L
L
H
L
H
H
H
L
L
H
H
L
H
L
L
H
H
L
H
L
H
H
L
H
H
H
H
L
C
B
L
L
L
L
LOGIC DIAGRAM (POSITIVE LOGIC)
A
3
4
B
C
1
Y
6
LOGIC CONFIGURATIONS
VCC
C
B
B
Y
A
A
1
6
2
5
3
4
C
Y
GND
Figure 5. 157+04: 2-to-1 Data Selector With Inverted Output
When C is L, Y = B
When C is H, Y = A
VCC
C
Y
A
A
1
6
2
5
3
4
C
Y
GND
Figure 6. 00: 2-Input NAND Gate
4
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
SN74AUP1T98
www.ti.com
SCES614I – OCTOBER 2004 – REVISED MAY 2013
VCC
C
Y
A
C
Y
A
A
1
6
2
5
3
4
C
Y
GND
Figure 7. 14+02/14+08: 2-Input NOR Gate With One Inverted Input
2-Input NAND Gate With One Inverted Input
VCC
C
Y
B
B
C
Y
B
1
6
2
5
3
4
C
Y
GND
Figure 8. 14+00/14+32: 2-Input NAND Gate With One Inverted Input
2-Input NOR Gate With One Inverted Input
VCC
C
Y
B
B
1
6
2
5
3
4
C
Y
GND
Figure 9. 32: 2-Input NOR Gate
VCC
C
Y
1
6
2
5
3
4
C
Y
GND
Figure 10. 17/34: Noninverted Buffer
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
5
SN74AUP1T98
SCES614I – OCTOBER 2004 – REVISED MAY 2013
www.ti.com
VCC
B
B
Y
1
6
2
5
3
4
Y
GND
Figure 11. 04/14: Inverter
6
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
SN74AUP1T98
www.ti.com
SCES614I – OCTOBER 2004 – REVISED MAY 2013
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
4.6
V
VI
Input voltage range (2)
–0.5
4.6
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
4.6
V
VO
Output voltage range in the high or low state (2)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±20
mA
±50
mA
Continuous current through VCC or GND
θJA
Tstg
(1)
(2)
(3)
Package thermal impedance (3)
DBV package
165
DCK package
259
DRY package
340
DSF package
300
YFP package
123
YZP package
123
Storage temperature range
–65
°C/W
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS (1)
MIN MAX
VCC
Supply voltage
VI
Input voltage
VO
Output voltage
IOH
High-level output current
IOL
Low-level output current
TA
Operating free-air temperature
(1)
2.3
UNIT
3.6
V
0
3.6
V
0
VCC
V
VCC = 2.3 V
–3.1
VCC = 3 V
–4
VCC = 2.3 V
3.1
VCC = 3 V
4
–40
85
mA
mA
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report Implications
of Slow or Floating CMOS Inputs, literature number SCBA004.
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
7
SN74AUP1T98
SCES614I – OCTOBER 2004 – REVISED MAY 2013
www.ti.com
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA = –40°C
to 85°C
TA = 25°C
VCC
MIN
TYP MAX
UNIT
MIN MAX
VT+
Positive-going
input threshold
voltage
2.3 V to 2.7 V
0.6
1.1
0.6
1.1
3 V to 3.6 V
0.75
1.16
0.75
1.19
VT–
Negative-going
input threshold
voltage
2.3 V to 2.7 V
0.35
0.6
0.35
0.6
3 V to 3.6 V
0.5
0.85
0.5
0.85
ΔVT
Hysteresis
(VT+ – VT–)
2.3 V to 2.7 V
0.23
0.6
0.1
0.6
3 V to 3.6 V
0.25
0.56
0.15
0.56
IOH = –20 μA
2.3 V to 3.6 V
IOH = –2.3 mA
VOH
IOH = –2.7 mA
IOL = 20 μA
1.9
1.85
2.72
2.67
2.6
2.3 V
IOL = 3.1 mA
IOL = 2.7 mA
3V
IOL = 4 mA
VI = 3.6 V or GND
V
V
V
2.55
2.3 V to 3.6 V
IOL = 2.3 mA
All inputs
1.97
3V
IOH = –4 mA
II
VCC – 0.1
2.05
2.3 V
IOH = –3.1 mA
VOL
VCC – 0.1
V
0.1
0.1
0.31
0.33
0.44
0.45
0.31
0.33
V
0.44
0.45
0 V to 3.6 V
0.1
0.5
μA
0V
0.1
0.5
μA
Ioff
VI or VO = 0 V to 3.6 V
ΔIoff
VI or VO = 3.6 V
0 V to 0.2 V
0.2
0.5
μA
ICC
VI = 3.6 V or GND, IO = 0
2.3 V to 3.6 V
0.5
0.9
μA
One input at 0.3 V or 1.1 V,
Other inputs at 0 or VCC, IO = 0
2.3 V to 2.7 V
4
One input at 0.45 V or 1.2 V,
Other inputs at 0 or VCC, IO = 0
3 V to 3.6 V
12
ΔICC
μA
Ci
VI = VCC or GND
3.3 V
1.5
pF
Co
VO = VCC or GND
3.3 V
3
pF
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 1.8 V ± 0.15 V (unless otherwise noted)
(see Figure 12)
PARAMETER
tpd
8
FROM
(INPUT)
A, B, or C
TO
(OUTPUT)
Y
TA = –40°C
to 85°C
TA = 25°C
CL
MIN
TYP
MAX
MIN
MAX
5 pF
1.8
2.3
2.9
0.5
6.8
10 pF
2.3
2.8
3.4
1
7.9
15 pF
2.6
3.1
3.8
1
8.7
30 pF
3.8
4.4
5.1
1.5
10.8
Submit Documentation Feedback
UNIT
ns
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
SN74AUP1T98
www.ti.com
SCES614I – OCTOBER 2004 – REVISED MAY 2013
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 2.5 V ± 0.2 V (unless otherwise noted)
(see Figure 12)
PARAMETER
tpd
FROM
(INPUT)
A, B, or C
TO
(OUTPUT)
Y
TA = –40°C
to 85°C
TA = 25°C
CL
MIN
TYP
MAX
MIN
UNIT
MAX
5 pF
1.8
2.3
3.1
0.5
6
10 pF
2.2
2.8
3.5
1
7.1
15 pF
2.6
3.2
5.2
1
7.9
30 pF
3.7
4.4
5.2
1.5
10
ns
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 3.3 V ± 0.3 V (unless otherwise noted)
(see Figure 12)
PARAMETER
tpd
FROM
(INPUT)
A, B, or C
TO
(OUTPUT)
Y
TA = –40°C
to 85°C
TA = 25°C
CL
UNIT
MIN
TYP
MAX
MIN
MAX
5 pF
2
2.7
3.5
0.5
5.5
10 pF
2.4
3.1
3.9
1
6.5
15 pF
2.8
3.5
4.3
1
7.4
30 pF
4
4.7
5.5
1.5
9.5
ns
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 1.8 V ± 0.15 V (unless otherwise noted)
(see Figure 12)
PARAMETER
tpd
FROM
(INPUT)
A, B, or C
TO
(OUTPUT)
Y
TA = –40°C
to 85°C
TA = 25°C
CL
MIN
TYP
MAX
MIN
UNIT
MAX
5 pF
1.6
2
2.5
0.5
8
10 pF
2
2.4
2.9
1
8.5
15 pF
2.3
2.8
3.3
1
9.1
30 pF
3.4
3.9
4.4
1.5
9.8
ns
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 2.5 V ± 0.2 V (unless otherwise noted)
(see Figure 12)
PARAMETER
tpd
FROM
(INPUT)
A, B, or C
TO
(OUTPUT)
Y
TA = –40°C
to 85°C
TA = 25°C
CL
MIN
TYP
MAX
MIN
MAX
5 pF
1.6
1.9
2.4
0.5
5.3
10 pF
2
2.3
2.7
1
6.1
15 pF
2.3
2.7
3.1
1
6.8
30 pF
3.4
3.8
4.2
1.5
8.5
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
UNIT
ns
9
SN74AUP1T98
SCES614I – OCTOBER 2004 – REVISED MAY 2013
www.ti.com
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 3.3 V ± 0.3 V (unless otherwise noted)
(see Figure 12)
PARAMETER
tpd
FROM
(INPUT)
A, B, or C
TO
(OUTPUT)
Y
TA = –40°C
to 85°C
TA = 25°C
CL
MIN
TYP
MAX
MIN
MAX
5 pF
1.6
2.1
2.7
0.5
4.7
10 pF
2
2.4
3
1
5.7
15 pF
2.3
2.7
3.3
1
6.2
30 pF
3.4
3.8
4.4
1.5
7.8
UNIT
ns
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
Cpd
10
Power dissipation capacitance
TEST CONDITIONS
f = 10 MHz
Submit Documentation Feedback
VCC = 2.5 V
VCC = 3.3 V
TYP
TYP
4
5
UNIT
pF
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
SN74AUP1T98
www.ti.com
SCES614I – OCTOBER 2004 – REVISED MAY 2013
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL
(see Note A)
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VI/2
VCC/2
5, 10, 15, 30 pF
VI/2
VCC/2
1 MΩ
CL
VMI
VMO
LOAD CIRCUIT
VI
VMI
Input
VMI
0V
tPHL
tPLH
VOH
VMO
Output
VMo
VOL
tPHL
tPLH
VOH
VMo
Output
VMo
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A.
B.
C.
D.
CL includes probe and jig capacitance.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns.
The outputs are measured one at a time, with one transition per measurement.
tPLH and tPHL are the same as tpd.
Figure 12. Load Circuit and Voltage Waveforms
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
11
SN74AUP1T98
SCES614I – OCTOBER 2004 – REVISED MAY 2013
www.ti.com
REVISION HISTORY
Changes from Revision H (May 2010) to Revision I
Page
•
Updated FUNCTION SELECTION Table. ............................................................................................................................ 2
•
Updated figure caption. ......................................................................................................................................................... 5
•
Updated figure caption. ......................................................................................................................................................... 5
12
Submit Documentation Feedback
Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: SN74AUP1T98
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74AUP1T98DBVR
ACTIVE
SOT-23
DBV
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HT6R
SN74AUP1T98DBVT
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
HT6R
SN74AUP1T98DCKR
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TKR
SN74AUP1T98DCKT
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TKR
SN74AUP1T98DRYR
ACTIVE
SON
DRY
6
5000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TK
SN74AUP1T98DSFR
ACTIVE
SON
DSF
6
5000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
TK
SN74AUP1T98YFPR
ACTIVE
DSBGA
YFP
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
(TK2, TKN)
SN74AUP1T98YZPR
ACTIVE
DSBGA
YZP
6
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
(TK7, TKN)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
SN74AUP1T98DBVR
SOT-23
3000
180.0
8.4
DBV
6
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.23
3.17
1.37
4.0
8.0
Q3
SN74AUP1T98DBVT
SOT-23
DBV
6
250
180.0
8.4
3.23
3.17
1.37
4.0
8.0
Q3
SN74AUP1T98DCKR
SC70
DCK
6
3000
180.0
8.4
2.41
2.41
1.2
4.0
8.0
Q3
SN74AUP1T98DCKT
SC70
DCK
6
250
180.0
8.4
2.41
2.41
1.2
4.0
8.0
Q3
SN74AUP1T98DRYR
SON
DRY
6
5000
180.0
8.4
1.25
1.6
0.7
4.0
8.0
Q1
SN74AUP1T98DSFR
SON
DSF
6
5000
180.0
8.4
1.16
1.16
0.63
4.0
8.0
Q2
SN74AUP1T98YFPR
DSBGA
YFP
6
3000
178.0
9.2
0.89
1.29
0.62
4.0
8.0
Q1
SN74AUP1T98YZPR
DSBGA
YZP
6
3000
178.0
9.2
1.02
1.52
0.63
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Aug-2017
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74AUP1T98DBVR
SOT-23
DBV
6
3000
202.0
201.0
28.0
SN74AUP1T98DBVT
SOT-23
DBV
6
250
202.0
201.0
28.0
SN74AUP1T98DCKR
SC70
DCK
6
3000
202.0
201.0
28.0
SN74AUP1T98DCKT
SC70
DCK
6
250
202.0
201.0
28.0
SN74AUP1T98DRYR
SON
DRY
6
5000
202.0
201.0
28.0
SN74AUP1T98DSFR
SON
DSF
6
5000
202.0
201.0
28.0
SN74AUP1T98YFPR
DSBGA
YFP
6
3000
220.0
220.0
35.0
SN74AUP1T98YZPR
DSBGA
YZP
6
3000
220.0
220.0
35.0
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DRY 6
USON - 0.6 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4207181/G
PACKAGE OUTLINE
DRY0006A
USON - 0.6 mm max height
SCALE 8.500
PLASTIC SMALL OUTLINE - NO LEAD
1.05
0.95
B
A
PIN 1 INDEX AREA
1.5
1.4
C
0.6 MAX
SEATING PLANE
0.05
0.00
0.08 C
3X 0.6
SYMM
(0.127) TYP
(0.05) TYP
3
4
4X
0.5
SYMM
2X
1
1
6
6X
0.4
0.3
PIN 1 ID
(OPTIONAL)
5X
0.25
0.15
0.1
0.05
0.35
0.25
C A B
C
4222894/A 01/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
DRY0006A
USON - 0.6 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
(0.35)
5X (0.3)
6
1
6X (0.2)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(0.6)
LAND PATTERN EXAMPLE
1:1 RATIO WITH PKG SOLDER PADS
EXPOSED METAL SHOWN
SCALE:40X
0.05 MAX
ALL AROUND
EXPOSED
METAL
0.05 MIN
ALL AROUND
EXPOSED
METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4222894/A 01/2018
NOTES: (continued)
3. For more information, see QFN/SON PCB application report in literature No. SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
DRY0006A
USON - 0.6 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
(0.35)
5X (0.3)
1
6
6X (0.2)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(0.6)
SOLDER PASTE EXAMPLE
BASED ON 0.075 - 0.1 mm THICK STENCIL
SCALE:40X
4222894/A 01/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
6
2X 0.95
1.9
1.45 MAX
3.05
2.75
5
2
4
0.50
6X
0.25
0.2
C A B
3
(1.1)
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214840/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X (0.95)
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214840/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X(0.95)
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
YFP0006
DSBGA - 0.5 mm max height
SCALE 10.000
DIE SIZE BALL GRID ARRAY
B
E
A
BALL A1
CORNER
D
C
0.5 MAX
SEATING PLANE
0.19
0.13
BALL TYP
0.05 C
0.4
TYP
SYMM
C
D: Max = 1.19 mm, Min = 1.13 mm
0.8
TYP
SYMM
B
E: Max = 0.79 mm, Min = 0.73 mm
0.4 TYP
A
6X
0.015
0.25
0.21
C A B
1
2
4223410/A 11/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YFP0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
6X ( 0.23)
2
1
A
(0.4) TYP
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
SCALE:50X
( 0.23)
METAL
0.05 MAX
METAL UNDER
SOLDER MASK
0.05 MIN
( 0.23)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4223410/A 11/2016
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YFP0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
6X ( 0.25)
1
2
A
(0.4) TYP
SYMM
B
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:50X
4223410/A 11/2016
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
PACKAGE OUTLINE
DSF0006A
X2SON - 0.4 mm max height
SCALE 10.000
PLASTIC SMALL OUTLINE - NO LEAD
1.05
0.95
B
A
PIN 1 INDEX AREA
1.05
0.95
0.4 MAX
C
SEATING PLANE
0.05 C
(0.11) TYP
SYMM
0.05
0.00
3
4
SYMM
2X
0.7
4X
0.35
6
1
6X
(0.1)
PIN 1 ID
6X
0.45
0.35
0.22
0.12
0.07
0.05
C B A
C
4220597/A 06/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration MO-287, variation X2AAF.
www.ti.com
EXAMPLE BOARD LAYOUT
DSF0006A
X2SON - 0.4 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
6X (0.6)
(R0.05) TYP
1
6X (0.17)
6
SYMM
4X (0.35)
4
3
SYMM
(0.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:40X
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4220597/A 06/2017
NOTES: (continued)
4. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
DSF0006A
X2SON - 0.4 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
6X (0.6)
(R0.05) TYP
1
6
6X (0.17)
SYMM
4X (0.35)
4
3
SYMM
(0.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:40X
4220597/A 06/2017
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
YZP0006
DSBGA - 0.5 mm max height
SCALE 9.000
DIE SIZE BALL GRID ARRAY
B
A
E
BALL A1
CORNER
D
C
0.5 MAX
SEATING PLANE
0.19
0.15
BALL TYP
0.05 C
0.5 TYP
C
SYMM
1
TYP
B
0.5
TYP
D: Max = 1.418 mm, Min =1.358 mm
E: Max = 0.918 mm, Min =0.858 mm
A
6X
0.015
0.25
0.21
C A
B
1
2
SYMM
4219524/A 06/2014
NanoFree Is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
TM
3. NanoFree package configuration.
www.ti.com
EXAMPLE BOARD LAYOUT
YZP0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
6X ( 0.225)
1
2
A
(0.5) TYP
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
SCALE:40X
( 0.225)
METAL
0.05 MAX
METAL
UNDER
MASK
0.05 MIN
( 0.225)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4219524/A 06/2014
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SBVA017 (www.ti.com/lit/sbva017).
www.ti.com
EXAMPLE STENCIL DESIGN
YZP0006
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
6X ( 0.25)
(R0.05) TYP
2
1
A
(0.5)
TYP
SYMM
B
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:40X
4219524/A 06/2014
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2020, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Related manuals

Download PDF

advertising