Texas Instruments | SN54LVC157A, SN74LVC157A (Rev. Q) | Datasheet | Texas Instruments SN54LVC157A, SN74LVC157A (Rev. Q) Datasheet

Texas Instruments SN54LVC157A, SN74LVC157A (Rev. Q) Datasheet
SN54LVC157A, SN74LVC157A
www.ti.com
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
Check for Samples: SN54LVC157A, SN74LVC157A
FEATURES
1
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
G
4A
4B
4Y
3A
3B
3Y
1A
1B
1Y
2A
2B
2Y
1
16
2
15
3
14
4
13
5
12
6
7
11
10
8
9
SN54LVC157A . . . FK PACKAGE
(TOP VIEW)
1A
A/B
NC
VCC
G
SN74LVC157A . . . RGY PACKAGE
(TOP VIEW)
G
4A
4B
4Y
3A
3B
1B
1Y
NC
2A
2B
4
3
2 1 20 19
18
5
6
17
16
7
8
15
14
9 10 11 12 13
4A
4B
NC
4Y
3A
2Y
GND
NC
3Y
3B
A /B
1A
1B
1Y
2A
2B
2Y
GND
•
VCC
SN54LVC157A . . . J OR W PACKAGE
SN74LVC157A . . . D, DB, NS,
OR PW PACKAGE
(TOP VIEW)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
BRK
BRK
3Y
•
•
A/B
•
•
•
Operate From 1.65 V to 3.6 V
Specified From –40°C to 85°C,
–40°C to 125°C, and –55°C to 125°C
Inputs Accept Voltages to 5.5 V
Max tpd of 5.2 ns at 3.3 V
Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
GND
•
•
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
These quadruple 2-line to 1-line data selectors/multiplexers are designed for 1.65-V to 3.6-V VCC operation.
The 'LVC157A devices feature a common strobe (G) input. When G is high, all outputs are low. When G is low, a
4-bit word is selected from one of two sources and is routed to the four outputs. The devices provide true data.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1993–2010, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54LVC157A, SN74LVC157A
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
www.ti.com
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
QFN – RGY
SOIC – D
–40°C to 125°C
(1)
Reel of 1000
SN74LVC157ARGYR
Tube of 40
SN74LVC157AD
Reel of 2500
SN74LVC157ADRG3
TOP-SIDE MARKING
LC157A
LVC157A
Reel of 250
SN74LVC157ADT
SOP – NS
Reel of 2000
SN74LVC157ANSR
LVC157A
SSOP – DB
Reel of 2000
SN74LVC157ADBR
LC157A
Tube of 90
SN74LVC157APW
Reel of 2000
SN74LVC157APWR
Reel of 250
SN74LVC157APWT
CDIP – J
Tube of 25
SNJ54LVC157AJ
SNJ54LVC157AJ
CFP – W
Tube of 150
SNJ54LVC157AW
SNJ54LVC157AW
LCCC – FK
Tube of 55
SNJ54LVC157AFK
SNJ54LVC157AFK
TSSOP – PW
–55°C to 125°C
ORDERABLE PART NUMBER
LC157A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
FUNCTION TABLE
INPUTS
2
G
A/B
A
B
OUTPUT
Y
H
X
X
X
L
L
L
L
X
L
L
L
H
X
H
L
H
X
L
L
L
H
X
H
H
Submit Documentation Feedback
Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC157A SN74LVC157A
SN54LVC157A, SN74LVC157A
www.ti.com
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
LOGIC DIAGRAM (POSITIVE LOGIC)
1A
2
4
1B
2A
3
5
7
2B
3A
6
4A
10
G
A/B
3Y
14
12
4B
2Y
11
9
3B
1Y
13
4Y
15
1
Pin numbers shown are for the D, DB, J, NS, PW, RGY, and W packages.
Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC157A SN74LVC157A
Submit Documentation Feedback
3
SN54LVC157A, SN74LVC157A
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
www.ti.com
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage range
(2)
MIN
MAX
–0.5
6.5
UNIT
V
–0.5
6.5
V
–0.5
VCC + 0.5
VI
Input voltage range
VO
Output voltage range (2)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
(3)
Continuous current through VCC or GND
qJA
Package thermal impedance
D package (4)
73
DB package (4)
82
NS package (4)
64
PW package (4)
108
RGY package (5)
Tstg
Storage temperature range
Ptot
Power dissipation (6)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
°C/W
39
–65
(7)
V
TA = –40°C to 125°C
150
°C
500
mW
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
For the D package, above 70°C the value of Ptot derates linearly with 8 mW/K.
For the DB, NS, and PW packages, above 60°C the value of Ptot derates linearly with 5.5 mW/K.
Recommended Operating Conditions (1)
SN54LVC157A
–55 TO 125°C
Operating
VCC
Supply voltage
VIH
High-level input voltage
VCC = 2.7 V to 3.6 V
VIL
Low-level input voltage
VCC = 2.7 V to 3.6 V
VI
Input voltage
VO
Output voltage
IOH
High-level output current
IOL
Low-level output current
(1)
4
Data retention only
MIN
MAX
2
3.6
1.5
2
UNIT
V
V
0.8
V
0
5.5
V
0
VCC
V
VCC = 2.7 V
–12
VCC = 3 V
–24
VCC = 2.7 V
12
VCC = 3 V
24
mA
mA
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Submit Documentation Feedback
Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC157A SN74LVC157A
SN54LVC157A, SN74LVC157A
www.ti.com
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
Recommended Operating Conditions (1)
SN74LVC157A
TA = 25°C
VCC
Supply voltage
VIH
High-level input
voltage
Operating
Data retention only
VCC = 1.65 V to 1.95 V
–40 TO 85°C
–40 TO 125°C
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
1.65
3.6
1.65
3.6
1.65
3.6
1.5
1.5
1.5
0.65 × VCC
0.65 × VCC
0.65 × VCC
VCC = 2.3 V to 2.7 V
1.7
1.7
1.7
VCC = 2.7 V to 3.6 V
2
VCC = 1.65 V to 1.95 V
2
V
V
2
0.35 × VCC
0.35 × VCC
0.35 × VCC
0.7
0.7
0.7
VIL
Low-level input
voltage
VI
Input voltage
0
5.5
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
0
VCC
V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
0.8
VCC = 1.65 V
High-level output
current
IOH
0.8
–4
0.8
–4
–4
VCC = 2.3 V
–8
–8
–8
VCC = 2.7 V
–12
–12
–12
VCC = 3 V
–24
–24
–24
VCC = 1.65 V
4
4
4
VCC = 2.3 V
8
8
8
VCC = 2.7 V
12
12
12
IOL
Low-level output
current
VCC = 3 V
24
24
24
Δt/Δv
Input transition rise or fall rate
10
10
10
(1)
V
mA
mA
ns/V
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
SN54LVC157A
PARAMETER
TEST CONDITIONS
VCC
–55 TO 125°C
MIN
IOH = –100 mA
VOH
All inputs
VCC – 0.2
2.7 V
2.2
3V
2.4
IOH = –24 mA
3V
2.2
IOL = 100 mA
2.7 V to 3.6 V
IOL = 12 mA
2.7 V
0.4
IOL = 24 mA
3V
0.55
IOH = –12 mA
VOL
II
2.7 V to 3.6 V
UNIT
MAX
VI = 5.5 V or GND
ICC
VI = VCC or GND
IO = 0
ΔICC
One input at VCC – 0.6 V, Other inputs at VCC or GND
V
0.2
V
3.6 V
±5
mA
3.6 V
10
mA
2.7 V to 3.6 V
500
mA
Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC157A SN74LVC157A
Submit Documentation Feedback
5
SN54LVC157A, SN74LVC157A
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
www.ti.com
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
SN74LVC157A
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C
MIN
IOH = –100 mA
VOH
II
All inputs
MAX
1.65 V to 3.6 V VCC – 0.2
MIN MAX
–40 TO 125°C
MIN
VCC – 0.2
VCC – 0.3
IOH = –4 mA
1.65 V
1.29
1.2
1.05
IOH = –8 mA
2.3 V
1.9
1.7
1.55
2.7 V
2.2
2.2
2.05
IOH = –12 mA
VOL
TYP
–40 TO 85°C
3V
2.4
2.4
2.25
IOH = –24 mA
3V
2.3
2.2
2
IOL = 100 mA
UNIT
MAX
V
1.65 V to 3.6 V
0.1
0.2
IOL = 4 mA
1.65 V
0.24
0.45
0.6
IOL = 8 mA
2.3 V
0.3
0.7
0.75
IOL = 12 mA
2.7 V
0.4
0.4
0.6
IOL = 24 mA
3V
0.55
0.55
0.8
3.6 V
±1
±5
±20
mA
3.6 V
1
10
40
mA
500
500
5000
mA
VI = 5.5 V or GND
ICC
VI = VCC
or GND
ΔICC
One input at VCC – 0.6 V,
Other inputs at VCC or GND
Ci
VI = VCC or GND
IO = 0
2.7 V to 3.6 V
3.3 V
0.3
5
V
pF
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN54LVC157A
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
–55 TO 125°C
MIN
2.7 V
A or B
tpd
A/B
G
6
Submit Documentation Feedback
3.3 V ± 0.3 V
Y
6.2
0.8
2.7 V
3.3 V ± 0.3 V
5.4
8.2
0.8
2.7 V
3.3 V ± 0.3 V
UNIT
MAX
7
ns
7.8
0.8
6.5
Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC157A SN74LVC157A
SN54LVC157A, SN74LVC157A
www.ti.com
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
SN74LVC157A
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A or B
tpd
A/B
Y
G
tsk(o)
VCC
TA = 25°C
–40 TO 85°C
–40 TO 125°C
MIN
TYP
MAX
MIN
MAX
MIN
MAX
1.8 V ± 0.15 V
1
5.5
13.5
1
14
1
15.5
2.5 V ± 0.2 V
1
3.2
7.4
1
7.9
1
10
2.7 V
1
3.6
5.7
1
5.9
1
7.4
3.3 V ± 0.3 V
1
3
5
1
5.2
1
6.4
1.8 V ± 0.15 V
1
6
15.5
1
16
1
17.5
2.5 V ± 0.2 V
1
3.7
9.6
1
10.1
1
12.2
2.7 V
1
4.1
7.9
1
8.1
1
10
3.3 V ± 0.3 V
1
3.4
6.6
1
6.8
1
8.4
1.8 V ± 0.15 V
1
5.9
13.5
1
14
1
15.5
2.5 V ± 0.2 V
1
3.5
9.3
1
9.8
1
11.9
2.7 V
1
3.9
7.6
1
7.8
1
9.3
3.3 V ± 0.3 V
1
3.3
6.3
1
6.5
1
7.9
1.8 V ± 0.15 V
2
2.5
3.3 V ± 0.3 V
1
1.5
UNIT
ns
ns
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
(1)
Power dissipation capacitance
TEST
CONDITIONS
f = 10 MHz
VCC
TYP
UNIT
(1)
1.8 V
14
2.5 V
15 (1)
3.3 V
16
pF
On products compliant to MIL-PRF-38535, this parameter does not apply.
Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC157A SN74LVC157A
Submit Documentation Feedback
7
SN54LVC157A, SN74LVC157A
SCAS292Q – JANUARY 1993 – REVISED DECEMBER 2010
www.ti.com
PARAMETER MEASUREMENT INFORMATION
VLOAD
S1
RL
From Output
Under Test
CL
(see Note A)
Open
GND
RL
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
VI
tr/tf
VCC
VCC
2.7 V
2.7 V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
1.5 V
1.5 V
2 × VCC
2 × VCC
6V
6V
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
VOH
VM
Output
VM
VOL
VM
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VM
0V
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
tPHL
VM
tPZL
tPHL
tPLH
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VM
VOH - V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
Submit Documentation Feedback
Copyright © 1993–2010, Texas Instruments Incorporated
Product Folder Link(s): SN54LVC157A SN74LVC157A
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-0050601QEA
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-0050601QE
A
SNJ54LVC157AJ
5962-0050601QFA
ACTIVE
CFP
W
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-0050601QF
A
SNJ54LVC157AW
SN74LVC157AD
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ADBR
ACTIVE
SSOP
DB
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LC157A
SN74LVC157ADE4
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ADG4
ACTIVE
SOIC
D
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ADR
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ADRE4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ADRG3
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ADRG4
ACTIVE
SOIC
D
16
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ADT
ACTIVE
SOIC
D
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ANSR
ACTIVE
SO
NS
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157ANSRE4
ACTIVE
SO
NS
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LVC157A
SN74LVC157APW
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LC157A
SN74LVC157APWE4
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LC157A
SN74LVC157APWG4
ACTIVE
TSSOP
PW
16
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LC157A
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
24-Aug-2018
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74LVC157APWR
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
LC157A
SN74LVC157APWRE4
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LC157A
SN74LVC157APWRG4
ACTIVE
TSSOP
PW
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LC157A
SN74LVC157APWT
ACTIVE
TSSOP
PW
16
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LC157A
SN74LVC157ARGYR
ACTIVE
VQFN
RGY
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
LC157A
SN74LVC157ARGYRG4
ACTIVE
VQFN
RGY
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
LC157A
SNJ54LVC157AJ
ACTIVE
CDIP
J
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-0050601QE
A
SNJ54LVC157AJ
SNJ54LVC157AW
ACTIVE
CFP
W
16
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-0050601QF
A
SNJ54LVC157AW
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LVC157A, SN74LVC157A :
• Catalog: SN74LVC157A
• Automotive: SN74LVC157A-Q1, SN74LVC157A-Q1
• Enhanced Product: SN74LVC157A-EP, SN74LVC157A-EP
• Military: SN54LVC157A
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
• Military - QML certified for Military and Defense Applications
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
31-May-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74LVC157ADR
SOIC
D
16
2500
330.0
16.8
6.5
10.3
2.1
8.0
16.0
Q1
SN74LVC157ADR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
SN74LVC157ADRG3
SOIC
D
16
2500
330.0
16.8
6.5
10.3
2.1
8.0
16.0
Q1
SN74LVC157ADRG4
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
SN74LVC157ANSR
SO
NS
16
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
SN74LVC157APWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LVC157APWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LVC157APWRG4
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LVC157APWT
TSSOP
PW
16
250
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LVC157ARGYR
VQFN
RGY
16
3000
330.0
12.4
3.8
4.3
1.5
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
31-May-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74LVC157ADR
SOIC
D
16
2500
364.0
364.0
27.0
SN74LVC157ADR
SOIC
D
16
2500
333.2
345.9
28.6
SN74LVC157ADRG3
SOIC
D
16
2500
364.0
364.0
27.0
SN74LVC157ADRG4
SOIC
D
16
2500
333.2
345.9
28.6
SN74LVC157ANSR
SO
NS
16
2000
367.0
367.0
38.0
SN74LVC157APWR
TSSOP
PW
16
2000
364.0
364.0
27.0
SN74LVC157APWR
TSSOP
PW
16
2000
367.0
367.0
35.0
SN74LVC157APWRG4
TSSOP
PW
16
2000
367.0
367.0
35.0
SN74LVC157APWT
TSSOP
PW
16
250
367.0
367.0
35.0
SN74LVC157ARGYR
VQFN
RGY
16
3000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
PW0016A
TSSOP - 1.2 mm max height
SCALE 2.500
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
TYP
6.2
A
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1
2X
5.1
4.9
NOTE 3
4.55
8
9
B
0.30
0.19
0.1
C A B
16X
4.5
4.3
NOTE 4
1.2 MAX
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0 -8
0.75
0.50
DETAIL A
A 20
TYPICAL
4220204/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
16X (1.5)
(R0.05) TYP
1
16
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4220204/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
16X (1.5)
SYMM
(R0.05) TYP
1
16X (0.45)
16
SYMM
14X (0.65)
8
9
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220204/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third
party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,
damages, costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable
warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertising