Texas Instruments | Audio Codec AC'97 Voltage-Translation Transceiver (Rev. A) | Datasheet | Texas Instruments Audio Codec AC'97 Voltage-Translation Transceiver (Rev. A) Datasheet

Texas Instruments Audio Codec AC'97 Voltage-Translation Transceiver (Rev. A) Datasheet
SN74AVC6T622
www.ti.com............................................................................................................................................. SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009
AUDIO CODEC AC'97 VOLTAGE-TRANSLATION TRANSCEIVER
FEATURES
1
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 7000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1500-V Charged-Device Model (C101)
1
9
8
6
7
A4
A5
GND
A6
A1
A3
DNU
5
2
DIR2
3
DIR1
VCCB
B4
B5
GND
B6
B2
B1
B3
DIR(345)
10
A2
11
DIR(345)
13
VCCB
B4
B5
GND
B6
B2
B1
B3
14
20
19
DIR1
12
Exposed
Center
Pad
15
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
18
DIR2
VCCA
A4
A5
GND
A6
A1
A3
DNU
A2
RGY PACKAGE
(BOTTOM VIEW)
VCCA
PW PACKAGE
(TOP VIEW)
16
•
•
4
•
Voltage-Level Transceiver for Interfacing 1.8 V
Audio Codec (AC'97) Controllers With 3.3 V
AC'97 Codec Links
Configurable I/O Switching Levels With
Dual-Supply Pins Operating Over Full 1.2-V to
3.6-V Power-Supply Range
For Low-Power Operation, A and B Ports Are
Placed in High-Impedance State When Either
Supply Voltage Is Switched Off
17
•
The exposed center pad, if used, must be
connected as a secondary ground or left
electrically open.
ZXY PACKAGE
(TOP VIEW)
A
B
C
TERMINAL ASSIGNMENTS
(20-Ball ZXY Package)
D
A
B
C
D
5
5
VCCA
DIR2
DIR1
VCCB
4
4
A5
A4
B4
B5
3
3
A6
GND
GND
B6
2
2
A3
A1
B2
B1
1
DNU (1)
A2
DIR(345)
B3
1
(1)
DNU – Do not use; should be left unconnected
DESCRIPTION/ORDERING INFORMATION
The SN74AVC6T622 is a voltage-level transceiver for interfacing 1.8 V audio codec (AC'97) controllers, the
audio/analog modem functionality found in personal computers, with 3.3V AC'97 codec links. With the digital
switching levels of today's AC'97 codecs lowering to 1.8-V logic levels, the SN74AVC6T622 device can be used
to bridge the gap between legacy 3.3-V AC'97 codecs and AC'97 controllers that are now operating at 1.8 V. The
6-bit wide SN74AVC6T622 device complies with the AC'97 electrical interface (both levels and timing)
specification.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2009, Texas Instruments Incorporated
SN74AVC6T622
SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009............................................................................................................................................. www.ti.com
Two supply-voltage pins allow the A-port and B-port input switching thresholds to be configured separately. The
A port is designed to track VCCA, while the B port is designed to track VCCB. VCCA and VCCB can accept any
supply voltage from 1.2 V to 3.6 V.
If either VCC is switched off (VCCA = 0 V and/or VCCB = 0 V), all outputs are placed in the high-impedance state to
conserve power.
The SN74AVC6T622 is available in two 0.5-mm-pitch ball grid array (BGA) packages. The 20-ball package has
dimensions of 3 mm × 2.5 mm, and the 24-ball package measures 3 mm × 3 mm. Memory cards are widely used
in mobile phones, PDAs, digital cameras, personal media players, camcorders, set-top boxes, etc. Low static
power consumption and small package size make the SN74AVC6T622 an ideal choice for these applications.
ORDERING INFORMATION
TA
PACKAGE
–40°C to 85°C
(1)
(2)
(1) (2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
QFN – RGY
Reel of 1000
SN74AVC6T622RGYR
WU622
TSSOP – PW
Reel of 2000
SN74AVC6T622PWR
WU622
UFBGA – ZXY (Pb-Free)
Reel of 2500
SN74AVC6T622ZXYR
WU622
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
REFERENCE DESIGN
AC’97 Controller
SYNC
SDATA_Out
Embedded
AC’97 Primary
Codec
RESET
SDATA_In0
3.3 V
BIT_CLK
1.8 V to 3.3 V
SDATA_In1
0.1 μF
0.1 μF
VCCA
0.1 μF
VCCB
VCC
A2
B2
SDATA_Out
A3
B3
SYNC
A4
B4
SDATA_In
A5
B5
RESET
A6
B6
BIT_CLK_In
DIR(345)
Controller
(Miscellaneous)
GPIO
GPIO
DIR2
A1
B1
DIR1
SN74AVC6T622
Secondary
AC’97 Codec
Figure 1. Interfacing 1.8 V AC'97 Controllers With 3.3 V AC'97 Controllers
2
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www.ti.com............................................................................................................................................. SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009
TERMINAL FUNCTIONS
ZXY
BALL
NO.
RGY, PW
PIN NO.
NAME
A1
9
DNU
A2
8
A3
I
AC'97 controller SYNC signal
A3
6
A6
I
AC'97 controller BIT_CLK signal
A4
4
A5
I
AC'97 controller RESET signal
A5
2
VCCA
Pwr
B1
10
A2
O
AC'97 controller SDATA_In0 signal
B2
7
A1
I/O
GPIO to miscellaneous GPIO controller
B3, C3
5, 16
GND
–
Ground
B4
3
A4
I
AC'97 controller SDATA_Out signal
TYPE
DESCRIPTION
Do not use; leave unconnected
A-port supply voltage. VCCA powers all A-port I/Os and control pins.
B5
1
DIR2
–
Should be tied to GND
C1
11
DIR(345)
–
Should be tied to VCCA
C2
14
B2
I
Secondary AC'97 codec SDATA_Out signal
C4
18
B4
O
Secondary AC'97 codec SDATA_In signal
C5
20
DIR1
I
Direction control from miscellaneous GPIO controller
D1
12
B3
O
Secondary AC'97 codec SYNC signal
D2
13
B1
O
Optional GPIO signal if A1 is enabled
D3
15
B6
O
Secondary AC'97 codec BIT_CLK_In signal
D4
17
B5
O
Secondary AC'97 codec RESET signal
D5
19
VCCB
Pwr
B-port supply voltage. VCCB powers all B-port I/Os and control pins.
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FUNCTION TABLES
OUTPUT CIRCUITS
CONTROL INPUT
DIR2
A2
B2
High
Hi-Z
Enabled
A2 to B2
Low
Enabled
Hi-Z
B2 to A2
CONTROL INPUT
DIR1
OUTPUT CIRCUITS
OPERATION
FUNCTION
A1
B1
High
Hi-Z
Enabled
A1 to B1
Low
Enabled
Hi-Z
B1 to A1
CONTROL INPUT
DIR(345)
A3, A4, A5
B3, B4, B5
High
Hi-Z
Enabled
OUTPUT CIRCUITS
FUNCTION
A3 to B3
A4 to B4
A5 to B5
B3 to A3
Low
Enabled
Hi-Z
B4 to A4
B5 to A5
4
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www.ti.com............................................................................................................................................. SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009
LOGIC DIAGRAM (POSITIVE LOGIC)
DIR2
B2
A2
DIR1
B1
A1
DIR(345)
A3
B3
A4
B4
A5
B5
A6
B6
VCCA
VCCB
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ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
Supply voltage range
VI
Input voltage range (2)
MIN
MAX
–0.5
4.6
I/O ports (A port)
–0.5
4.6
I/O ports (B port)
–0.5
4.6
Control inputs
–0.5
4.6
A port
–0.5
4.6
B port
–0.5
4.6
A port
–0.5 VCCA + 0.5
B port
–0.5 VCCB + 0.5
UNIT
V
V
VO
Voltage range applied to any output
in the high-impedance or power-off state (2)
VO
Voltage range applied to any output in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
Continuous current through VCCA, VCCB, or GND
θJA
Package thermal impedance
PW package (4)
83
RGY package (5)
37
ZXY package
Tstg
(1)
(2)
(3)
(4)
(5)
6
Storage temperature range
(4)
V
V
°C/W
193
–65
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
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RECOMMENDED OPERATING CONDITIONS (1) (2) (3)
VCCI
VCCO
MIN
MAX
UNIT
VCCA
Supply voltage
1.2
3.6
V
VCCB
Supply voltage
1.2
3.6
V
VIH
High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VI/O
Input/output voltage
IOH
All inputs (4)
All inputs
2
V
1.2 V to 1.95 V
VCCI × 0.35
1.95 V to 2.7 V
0.7
2.7 V to 3.6 V
0.8
3.6
0
VCCO
3-state
0
3.6
Low-level output current (B port)
Δt/Δv
Input transition rise or fall rate
TA
Operating free-air temperature
(4)
1.7
2.7 V to 3.6 V
0
High-level output current (B port)
IOL
1.95 V to 2.7 V
Active state
Low-level output current (A port)
IOH
VCCI × 0.65
Control inputs
High-level output current (A port)
IOL
(1)
(2)
(3)
(4)
1.2 V to 1.95 V
1.2 V
–1
1.4 V to 1.6 V
–1
1.65 V to 1.95 V
–2
2.3 V to 2.7 V
–4
3 V to 3.6 V
–8
1.2 V
1
1.4 V to 1.6 V
1
1.65 V to 1.95 V
2
2.3 V to 2.7 V
4
3 V to 3.6 V
8
1.2 V
–1
1.4 V to 1.6 V
–2
1.65 V to 1.95 V
–4
2.3 V to 2.7 V
–8
3 V to 3.6 V
–16
1.2 V
1
1.4 V to 1.6 V
2
1.65 V to 1.95 V
4
2.3 V to 2.7 V
8
3 V to 3.6 V
16
–40
V
V
V
mA
mA
mA
mA
5
ns/V
85
°C
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
DIR2, DIR1, and DIR(345) are referenced to VCCA.
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ELECTRICAL CHARACTERISTICS (1) (2)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCCB
1.2 V to 3.6 V
1.2 V to 3.6 V
1.2 V
1.2 V
1.4 V
1.4 V
1.05
1.65 V
1.65 V
1.2
IOH = –4 mA
2.3 V
2.3 V
1.75
IOH = –8 mA
3V
3V
2.3
IOL = 100 µA
1.2 V to 3.6 V
1.2 V to 3.6 V
1.2 V
1.2 V
1.4 V
1.4 V
0.35
1.65 V
1.65 V
0.45
2.3 V
2.3 V
0.55
IOH = –100 µA
IOH = –1 mA
VOH
A port
IOH = –2 mA
VI = VIH
IOL = 1 mA
VOL
A port
IOL = 2 mA
VI = VIL
IOL = 4 mA
IOL = 8 mA
IOH = –100 µA
IOH = –1 mA
VOH
B port
IOH = –2 mA
IOH = –4 mA
VI = VIH
IOH = –8 mA
B port
1.1
1.4 V
1.4 V
1.05
1.65 V
1.65 V
1.2
2.3 V
2.3 V
1.75
2.3
V
1.4 V
0.35
1.65 V
1.65 V
0.45
IOL = 8 mA
2.3 V
2.3 V
0.55
IOL = 16 mA
3V
3V
0.7
1.2 V to 3.6 V
1.2 V to 3.6 V
±1
IOL = 4 mA
VI = VIL
A or B port
See function
VO = VCCO or GND, table for input
VI = VCCI or GND
states when
outputs are Hi Z
VI = VCCI or GND,
VI = VCCI or GND,
VI = VCCI or GND,
VI = VCCA or GND
IO = 0
IO = 0
IO = 0
A port
VO = VCCA or GND
B port
VO = VCCB or GND
0.2
0.07
0V
0 V to 3.6 V
±5
0 V to 3.6 V
0V
±5
3.6 V
3.6 V
±5
1.2 V to 3.6 V
1.2 V to 3.6 V
10
3.6 V
0V
10
0V
3.6 V
–1
1.2 V to 3.6 V
1.2 V to 3.6 V
10
3.6 V
0V
–1
0V
3.6 V
10
1.2 V to 3.6 V
1.2 V to 3.6 V
15
1.8 V
3V
Clock input
8
0.7
1.4 V
IOL = 2 mA
1.8 V
3V
V
VCCO – 0.2
1.2 V
IOZ (4)
(1)
(2)
(3)
(4)
0.07
1.2 V
VI or VO = 0 to 3.6 V
Cio
0.2
3V
A or B port
Ci
V
1.2 V to 3.6 V
Ioff
Control
inputs
1.2 V
1.1
3V
VI = VCCA or GND
ICCA + ICCB
1.2 V
UNIT
VCCO – 0.2
1.2 V to 3.6 V
Control
inputs
ICCB
3V
1.2 V to 3.6 V
MAX
IOL = 100 µA
II
ICCA
3V
1.2 V to 3.6 V
MIN TYP (3)
IOH = –16 mA
IOL = 1 mA
VOL
TA = 25°C
VCCA
1.5
2
2
2.5
2.5
3
2.5
3
V
µA
µA
µA
µA
µA
µA
pF
pF
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
All typical values are at TA = 25°C.
For I/O ports, the parameter IOZ includes the input leakage current.
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OUTPUT SLEW RATES (1)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
FROM
VCCA = 1.8 V ± 0.15 V,
VCCB = 3 V ± 0.3 V
TO
MIN
(1)
(2)
UNIT
MAX
tr
10%
90%
3 (2)
ns
tf
90%
10%
3 (2)
ns
Values are characterized, but not production tested.
Using CL = 15 pF on the B side and CL = 7 pF on the A side
TYPICAL SWITCHING CHARACTERISTICS
TA = 25°C, VCCA = 1.2 V (see Figure 2)
PARAMETER
VCCB =
1.5 V
VCCB =
1.8 V
VCCB =
2.5 V
VCCB =
3V
VCCB =
3.3 V
TYP
TYP
TYP
TYP
TYP
TYP
3.8
3
2.6
2.5
2.5
2.6
4.6
4.2
4
3.9
3.9
3.8
B6
3.8
3
2.6
2.5
2.5
2.6
A2
B2
3.8
3
2.6
2.5
2.5
2.6
B2
A2
4.6
4.2
4
3.9
3.9
3.8
B
4.8
4
3.7
3.4
3.4
3.4
A
4.5
4.4
5
5.4
5.4
5.4
B
6.3
5.2
5.6
4.8
4.8
6.1
A
4.8
4.6
5.3
5.4
5.4
5.3
TO
(OUTPUT)
A
B
B
A
A6
tpd
(1)
VCCB =
1.2 V
FROM
(INPUT)
ten (1)
DIR
tdis (1)
DIR
UNIT
ns
ns
ns
DIR refers to DIR2, DIR1, and DIR(345).
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2)
PARAMETER
tpd
(1)
FROM
(INPUT)
TO
(OUTPUT
)
VCCB =
1.2 V
TYP
MIN
MAX
A
B
3.4
1.1
B
A
3.8
1.4
A6
B6
3.4
A2
B2
B2
A2
ten (1)
DIR
tdis (1)
DIR
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
MIN
MAX
5.6
1
6
1.3
1.1
5.6
3.4
1.1
3.8
1.4
B
4
A
VCCB = 2.5 V
± 0.2 V
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
4.8
1
3.9
0.9
3.9
0.9
3.8
5.6
1.3
5.2
0.5
5.2
0.3
5.2
1
4.8
1
3.9
0.9
3.9
0.9
3.8
5.6
1
4.8
1
3.9
0.9
3.9
0.9
3.8
6
1.3
5.6
1.3
5.2
0.5
5.2
0.3
5.2
1.3
7.7
1.1
6.9
0.8
6.1
0.8
6
0.8
5.9
3.5
1.4
7
1.5
7.4
1.7
8.2
1.7
8.2
1.7
7.7
B
5.7
1.9
8.9
2.1
10.4
1.8
8.7
1.7
8.5
2.4
11.4
A
3.4
1.2
7
1.2
6.8
1.2
6.9
1.2
6.5
1.2
6.6
UNIT
ns
ns
ns
DIR refers to DIR2, DIR1, and DIR(345).
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SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 2)
PARAMETER
tpd
(1)
FROM
TO
(INPUT) (OUTPUT)
VCCB =
1.2 V
TYP
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
A
B
3.2
1
5.2
0.8
4.4
0.7
3.5
0.6
3.4
0.7
3.1
B
A
3.4
1.1
5.2
1
4.8
0.9
4.3
0.3
4.3
0.2
4.3
A6
B6
3.2
1
5.2
0.8
4.4
0.7
3.5
0.6
3.4
0.7
3.1
A2
B2
3.2
1
5.2
0.8
4.4
0.7
3.5
0.6
3.4
0.7
3.1
B2
A2
3.4
1.1
5.2
1
4.8
0.9
4.3
0.3
4.3
0.2
4.3
B
3.5
1.2
6.8
0.9
6
0.7
5.1
0.7
5
0.7
4.8
A
2.9
1.1
4.7
1.1
5.2
1.4
5.1
1.4
5.1
1.4
5.3
B
5.3
1.6
8.4
2
9.5
1.6
8.2
1.4
8.1
2.2
8.2
A
3.6
1.3
7.7
1.2
7.9
1.3
7.5
1.3
7.5
1.3
7.6
ten (1)
DIR
tdis(1)
DIR
UNIT
ns
ns
ns
DIR refers to DIR2, DIR1, and DIR(345).
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 2)
PARAMETER
tpd
(1)
10
FROM
(INPUT)
TO
(OUTPUT)
A
B
VCCB =
1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
TYP
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
3
0.8
4.7
0.7
3.8
0.6
2.9
0.4
2.7
0.5
2.5
A
3
0.9
4.4
0.7
3.9
0.6
3.3
0.3
3.2
0.3
3.2
A6
B6
3
0.8
4.7
0.7
3.8
0.6
2.9
0.4
2.7
0.5
2.5
A2
B2
3
0.8
4.7
0.7
3.8
0.6
2.9
0.4
2.7
0.5
2.5
B2
A2
3
0.9
4.4
0.7
3.9
0.6
3.3
0.3
3.2
0.3
3.2
B
3.1
1
5.7
0.8
4.8
0.5
3.9
0.5
3.7
0.5
3.6
A
2.2
0.7
3.5
0.6
4.3
1.2
4.4
0.7
4.6
0.4
4.7
B
4.6
1.4
7.6
1.8
8.4
1.3
7.2
1.3
7.1
2
7.5
A
2.6
0.9
5.6
0.9
5.4
1
5.5
0.9
5.5
0.9
5.8
ten (1)
DIR
tdis
DIR
UNIT
MIN MAX
ns
ns
ns
DIR refers to DIR2, DIR1, and DIR(345).
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SN74AVC6T622
www.ti.com............................................................................................................................................. SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
B
tpd
(1)
VCCB =
1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3 V
± 0.3 V
TYP
MIN
MAX
MIN
MAX
MIN
MAX
B
2.8
0.8
4.5
0.6
3.6
0.4
2.7
0.4
A
2.9
0.8
4.3
0.6
3.7
0.5
3
0.5
A6
B6
2.8
0.8
4.5
0.6
3.6
0.4
2.7
A2
B2
2.8
0.8
4.5
0.6
3.6
0.4
B2
A2
2.9
0.8
4.3
0.6
3.7
0.5
B
3
1
5.1
0.6
4.3
A
2
0.6
3.1
0.6
B
4.4
1.4
7.4
A
3.7
1.5
8.1
ten (1)
DIR
tdis (1)
DIR
MIN MAX
VCCB = 3.3 V
± 0.3 V
MIN
MAX
2.7
0.3
2.3
3
0.1
2.7
0.4
2.7
0.3
2.3
2.7
0.4
2.7
0.3
2.3
3
0.5
3
0.1
2.7
0.5
3.4
0.5
3.4
0.4
3
5.4
0.7
5.4
0.7
5.4
0.5
5.4
1.8
8.3
1.2
7
1.2
7
2
7.3
1.5
7.9
1.5
7.9
1.5
7.9
1.5
8
UNIT
ns
ns
ns
DIR refers to DIR2, DIR1, and DIR(345).
TYPICAL FREQUENCY AND OUTPUT SKEW
TA = 25°C, VCCA = 1.2 V (see Figure 2)
PARAMETER
Clock
tmax
tsk(o)
Data
Channeltochannel
VCCB = 3 V
VCCB = 3.3 V
TYP
TYP
TYP
TYP
TYP
TYP
B6
95
95
95
95
95
95
A
B
95
95
95
95
95
95
B
A
95
95
95
95
95
95
A
B
0.5
0.4
0.4
0.3
0.5
0.5
ns
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
UNIT
FROM
(INPUT)
TO
(OUTPUT)
A6
VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V
UNIT
MHz
MAXIMUM FREQUENCY AND OUTPUT SKEW
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2)
PARAMETER
Clock
fmax
tsk(o)
Data
Channeltochannel
VCCB =
1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
A6
B6
95
95
95
95
95
95
A
B
95
95
95
95
95
95
B
A
95
95
95
95
95
95
DIR
B
0.3
TYP
MIN
MAX
MIN
0.3
MAX
MIN
0.3
MAX
MIN MAX
0.3
MIN
MAX
MHz
0.5
0.4
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
ns
MAXIMUM FREQUENCY AND OUTPUT SKEW
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 2)
PARAMETER
Clock
fmax
Data
Channeltsk(o) tochannel
VCCB =
1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
A6
B6
95
95
95
95
95
95
A
B
95
95
95
95
95
95
B
A
95
95
95
95
95
95
DIR
B
0.3
TYP
MIN
MAX
0.3
MIN
MAX
MIN
0.3
MAX
0.3
MIN MAX
0.5
MIN
MHz
0.3
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UNIT
MAX
ns
11
SN74AVC6T622
SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009............................................................................................................................................. www.ti.com
MAXIMUM FREQUENCY AND OUTPUT SKEW
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 2)
PARAMETER
Clock
fmax
Data
Channeltsk(o) tochannel
VCCB =
1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
A6
B6
95
95
95
95
95
95
A
B
95
95
95
95
95
95
B
A
95
95
95
95
95
95
DIR
B
0.3
TYP
MIN
MAX
MIN
0.3
MAX
MIN
0.3
MAX
MIN MAX
0.2
MIN
UNIT
MAX
MHz
0.6
0.3
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
ns
MAXIMUM FREQUENCY AND OUTPUT SKEW
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2)
PARAMETER
Clock
fmax
Data
Channeltsk(o) tochannel
12
VCCB =
1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
A6
B6
95
95
95
95
95
95
A
B
95
95
95
95
95
95
B
A
95
95
95
95
95
95
DIR
B
0.3
TYP
MIN
MAX
0.3
MIN
MAX
MIN
0.4
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MAX
0.3
MIN MAX
0.6
MIN
UNIT
MAX
MHz
0.4
ns
Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): SN74AVC6T622
SN74AVC6T622
www.ti.com............................................................................................................................................. SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
CpdA (1)
CpdB (1)
(1)
A-port
input,
B-port
output
B-port
input,
A-port
output
A-port
input,
B-port
output
B-port
input,
A-port
output
TEST
CONDITIONS
VCCA =
VCCB = 1.2 V
VCCA =
VCCB = 1.5 V
VCCA =
VCCB = 1.8 V
VCCA =
VCCB = 2.5 V
VCCA =
VCCB = 3 V
VCCA =
VCCB = 3.3 V
TYP
TYP
TYP
TYP
TYP
TYP
1.9
2
2.1
2.4
2.7
2.9
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
UNIT
pF
4.4
4.5
4.6
4.7
4.8
4.9
5.3
5.4
5.4
5.7
5.8
5.9
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
pF
0.3
0.3
0.4
0.5
0.6
0.6
Power dissipation capacitance per transceiver
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13
SN74AVC6T622
SCES706A – SEPTEMBER 2008 – REVISED MARCH 2009............................................................................................................................................. www.ti.com
PARAMETER MEASUREMENT INFORMATION
2 × VCCO
RL
From Output
Under Test
S1
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
RL
LOAD CIRCUIT
VCCO
CL
RL
VTP
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
15 pF
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.1 V
0.15 V
0.15 V
0.3 V
VCCA
Output
Control
(low-level
enabling)
VCCA/2
VCCA/2
0V
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VOH
VCCO/2
VOL
VCCO/2
tPLZ
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
VCCO/2
VOL + VTP
VOL
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPHZ
VCCO/2
VOH – VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
Figure 2. Load Circuit and Voltage Waveforms
14
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Dec-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74AVC6T622PWR
ACTIVE
TSSOP
PW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WU622
SN74AVC6T622RGYR
ACTIVE
VQFN
RGY
20
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
WU622
SN74AVC6T622ZXYR
NRND
BGA
MICROSTAR
JUNIOR
ZXY
20
2500
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
WU622
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
27-Dec-2019
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
SN74AVC6T622PWR
SN74AVC6T622RGYR
SN74AVC6T622ZXYR
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TSSOP
PW
20
2000
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
VQFN
RGY
20
3000
330.0
12.4
3.8
4.8
1.6
8.0
12.0
Q1
ZXY
20
2500
330.0
12.4
2.8
3.3
1.0
4.0
12.0
Q2
BGA MI
CROSTA
R JUNI
OR
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74AVC6T622PWR
TSSOP
PW
20
2000
367.0
367.0
38.0
SN74AVC6T622RGYR
VQFN
RGY
20
3000
367.0
367.0
35.0
SN74AVC6T622ZXYR
BGA MICROSTAR
JUNIOR
ZXY
20
2500
350.0
350.0
43.0
Pack Materials-Page 2
PACKAGE OUTLINE
ZXY0020A
VFBGA - 0.61 mm max height
SCALE 4.800
PLASTIC BALL GRID ARRAY
3.1
2.9
B
A
BALL A1 CORNER
2.6
2.4
C
0.61 MAX
SEATING PLANE
0.25
TYP
0.15
BALL TYP
0.08 C
2 TYP
SYMM
(0.5) TYP
D
(0.5) TYP
1.5
TYP
C
SYMM
B
20X
A
0.5 TYP
1
PIN 1 ID
(WITHOUT SOLDER)
2
3
4
5
0.35
0.25
0.15
0.05
C B A
C
0.5 TYP
4222996/A 12/2016
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
ZXY0020A
VFBGA - 0.61 mm max height
PLASTIC BALL GRID ARRAY
(0.5) TYP
20X ( 0.25)
1
2
3
5
4
A
(0.5) TYP
B
SYMM
C
D
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:25X
( 0.25)
METAL
0.05 MAX
METAL UNDER
SOLDER MASK
0.05 MIN
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
( 0.25)
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NOT TO SCALE
4222996/A 12/2016
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99).
www.ti.com
EXAMPLE STENCIL DESIGN
ZXY0020A
VFBGA - 0.61 mm max height
PLASTIC BALL GRID ARRAY
(0.5) TYP
20X ( 0.25)
1
2
3
4
5
A
(0.5) TYP
B
SYMM
C
(R0.05) TYP
D
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 25X
4222996/A 12/2016
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
GENERIC PACKAGE VIEW
RGY 20
VQFN - 1 mm max height
PLASTIC QUAD FGLATPACK - NO LEAD
3.5 x 4.5, 0.5 mm pitch
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4225264/A
www.ti.com
PACKAGE OUTLINE
RGY0020A
VQFN - 1 mm max height
SCALE 3.000
PLASTIC QUAD FLATPACK - NO LEAD
3.65
3.35
A
B
PIN 1 INDEX AREA
4.65
4.35
1.0
0.8
C
SEATING PLANE
0.05
0.00
0.08 C
2.05 0.1
2X 1.5
(0.2) TYP
10
11
9
EXPOSED
THERMAL PAD
12
14X 0.5
2X
3.5
21
SYMM
3.05 0.1
2
PIN 1 ID
19
20X
20
1
SYMM
0.30
0.18
0.1
0.05
0.5
20X
0.3
C A B
4225320/A 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
RGY0020A
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(2.05)
SYMM
1
20
20X (0.6)
2
19
20X (0.24)
(1.275)
(4.3)
21
SYMM
(3.05)
14X (0.5)
(0.775)
9
12
(R0.05) TYP
( 0.2) TYP
VIA
11
10
(0.75) TYP
(3.3)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:18X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
NON SOLDER MASK
DEFINED
(PREFERRED)
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4225320/A 09/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
RGY0020A
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
4X (0.92)
(R0.05) TYP
20
1
20X (0.6)
2
19
20X (0.24)
4X
(1.33)
21
SYMM
(4.3)
(0.77)
14X (0.5)
(0.56)
9
12
METAL
TYP
11
10
(0.75)
TYP
(3.3)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 21
78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:20X
4225320/A 09/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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