Texas Instruments | Quadruple Positive-NAND Gate With Schmitt-Trigger Inputs (Rev. A) | Datasheet | Texas Instruments Quadruple Positive-NAND Gate With Schmitt-Trigger Inputs (Rev. A) Datasheet

Texas Instruments Quadruple Positive-NAND Gate With Schmitt-Trigger Inputs (Rev. A) Datasheet
SN74HC132-Q1
QUADRUPLE POSITIVE-NAND GATE
WITH SCHMITT-TRIGGER INPUTS
SCLS553A − JANUARY 2004 − REVISED APRIL 2008
D
D
D
D
D
D
D
D
D Temperature-Compensated Threshold
Qualified for Automotive Applications
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 40-µA Max ICC
Typical tpd = 14 ns
±4-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Operation From Very Slow Input
Transitions
Levels
D High Noise Immunity
D Same Pinouts as ’HC00
D OR PW PACKAGE
(TOP VIEW)
1A
1B
1Y
2A
2B
2Y
GND
description/ordering information
Each circuit functions as a NAND gate, but because of
the Schmitt action, it has different input threshold levels
for positive- and negative-going signals. The
SN74HC132 performs the Boolean function Y = A • B or
Y = A + B in positive logic.
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
4B
4A
4Y
3B
3A
3Y
This circuit is temperature compensated and can be triggered from the slowest of input ramps and still give clean
jitter-free output signals.
ORDERING INFORMATION{
−40°C
40°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE‡
TA
TOP-SIDE
MARKING
SOIC − D
Reel of 2500
SN74HC132QDRQ1
HC132Q1
TSSOP − PW
Reel of 2000
SN74HC132QPWRQ1
HC132Q1
†
For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
H
H
L
L
X
H
X
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2008 Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74HC132-Q1
QUADRUPLE POSITIVE-NAND GATE
WITH SCHMITT-TRIGGER INPUTS
SCLS553A − JANUARY 2004 − REVISED APRIL 2008
logic diagram (positive logic)
A
Y
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
VCC
Supply voltage
VIH
High-level
High
level input voltage
2
VCC = 2 V
1.5
VCC = 4.5 V
3.15
VCC = 6 V
4.2
VCC = 2 V
VIL
MAX
5
6
UNIT
V
V
0.5
VCC = 4.5 V
Low-level
Low
level input voltage
NOM
1.35
VCC = 6 V
V
1.8
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
TA
Operating free-air temperature
−40
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74HC132-Q1
QUADRUPLE POSITIVE-NAND GATE
WITH SCHMITT-TRIGGER INPUTS
SCLS553A − JANUARY 2004 − REVISED APRIL 2008
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
VT+
VT−
VT+ − VT−
IOH = −20
20 µA
VOH
VI = VIH or VIL
IOH = −4 mA
IOH = −5.2 mA
IOL = 20 µA
VOL
VI = VIH or VIL
IOL = 4 mA
IOL = 5.2 mA
II
VI = VCC or 0
ICC
VI = VCC or 0,
IO = 0
TA = 25°C
MIN
TYP
MIN
MAX
2V
0.7
1.2
1.5
0.7
1.5
4.5 V
1.55
2.5
3.15
1.55
3.15
6V
2.1
3.3
4.2
2.1
4.2
2V
0.3
0.6
1
0.3
1
4.5 V
0.9
1.6
2.45
0.9
2.45
6V
1.2
2
3.2
1.2
3.2
2V
0.2
0.6
1.2
0.2
1.2
4.5 V
0.4
0.9
2.1
0.4
2.1
6V
0.5
1.3
2.5
0.5
2.5
2V
1.9
1.998
1.9
4.5 V
4.4
4.499
4.4
6V
5.9
5.999
5.9
4.5 V
3.98
4.3
3.7
6V
5.48
5.8
5.2
UNIT
V
V
V
V
2V
0.002
0.1
0.1
4.5 V
0.001
0.1
0.1
6V
0.001
0.1
0.1
4.5 V
0.17
0.26
0.4
6V
0.15
0.26
0.4
6V
±0.1
±100
±1000
nA
2
40
µA
3
10
10
pF
6V
Ci
MAX
2 V to 6 V
V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
VCC
A or B
Y
tt
Any
y
TA = 25°C
MIN
MIN
MAX
TYP
MAX
2V
60
120
186
4.5 V
18
25
37
6V
14
21
32
2V
28
75
110
4.5 V
8
15
22
6V
6
13
19
UNIT
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per gate
POST OFFICE BOX 655303
No load
• DALLAS, TEXAS 75265
TYP
20
UNIT
pF
3
SN74HC132-Q1
QUADRUPLE POSITIVE-NAND GATE
WITH SCHMITT-TRIGGER INPUTS
SCLS553A − JANUARY 2004 − REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
VCC
Test
Point
Input
50%
50%
0V
CL = 50 pF
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
50%
10%
tPHL
90%
90%
tr
Input
50%
10%
90%
90%
tr
tPHL
VCC
50%
10% 0 V
Out-of-Phase
Output
90%
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOH
50%
10%
VOL
tf
tPLH
50%
10%
tf
50%
10%
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
SN74HC132QDRG4Q1
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
HC132Q1
SN74HC132QDRQ1
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
HC132Q1
SN74HC132QPWRG4Q1
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
HC132Q1
SN74HC132QPWRQ1
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
HC132Q1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
OTHER QUALIFIED VERSIONS OF SN74HC132-Q1 :
• Catalog: SN74HC132
• Military: SN54HC132
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Military - QML certified for Military and Defense Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SN74HC132QPWRG4Q1 TSSOP
SN74HC132QPWRQ1
TSSOP
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Mar-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74HC132QPWRG4Q1
TSSOP
PW
14
2000
367.0
367.0
35.0
SN74HC132QPWRQ1
TSSOP
PW
14
2000
367.0
367.0
35.0
Pack Materials-Page 2
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