Texas Instruments | 16-Bit Dual-Supply Bus Transceiver (Rev. B) | Datasheet | Texas Instruments 16-Bit Dual-Supply Bus Transceiver (Rev. B) Datasheet

Texas Instruments 16-Bit Dual-Supply Bus Transceiver (Rev. B) Datasheet
SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
FEATURES
1
• Member of the Texas Instruments
Widebus™ Family
• Dynamic Output Control (DOC™) Circuitry
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without Speed
Degradation
• Dynamic Drive Capability Is Equivalent to
Standard Outputs With IOH and IOL of ±24 mA at
2.5-V VCC
• Control Inputs VIH/VIL Levels are Referenced to
VCCB Voltage
• If Either VCC Input Is at GND, Both Ports Are in
the High-Impedance State
• Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
2
•
•
•
•
•
Ioff Supports Partial-Power-Down Mode
Operation
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.4-V to
3.6-V Power-Supply Range
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The
A-port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed to
track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCBH164245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCBH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND,
both ports are in the high-impedance state.
ORDERING INFORMATION
PACKAGE (1) (2)
TA
–40°C to 85°C
(1)
(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
TSSOP – DGG
Tape and reel
SN74AVCBH164245GR
AVCBH164245
TVSOP – DGV
Tape and reel
SN74AVCBH164245VR
WBH4245
VFBGA – GQL
Tape and reel
SN74AVCBH164245KR
WBH4245
VFBGA – ZQL (Pb-free)
Tape and reel
SN74AVCBH164245ZQLR
WBH4245
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, DOC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2008, Texas Instruments Incorporated
SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
TERMINAL ASSIGNMENTS
DGG OR DGV PACKAGE
(TOP VIEW)
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1
48
2
47
3
46
4
45
5
44
6
43
7
42
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
2B5
2B6
GND
2B7
2B8
2DIR
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1BA5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
GQL/ZQL PACKAGE
(TOP VIEW)
1
2
3
4
5
TERMINAL ASSIGNMENTS
(56-Ball GQL/ZQL Package) (1)
6
1
2
3
4
5
6
A
1DIR
NC
NC
NC
NC
1OE
A
B
1B2
1B1
GND
GND
1A1
1A2
B
C
1B4
1B3
VCCB
VCCA
1A3
1A4
C
D
1B6
1B5
GND
GND
1A5
1A6
D
E
1B8
1B7
1A7
1A8
E
F
2B1
2B2
2A2
2A1
F
G
2B3
2B4
GND
GND
2A4
2A3
H
2B5
2B6
VCCB
VCCA
2A6
2A5
J
2B7
2B8
GND
GND
2A8
2A7
K
2DIR
NC
NC
NC
NC
2OE
G
H
J
K
(1)
2
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NC - No internal connection
Copyright © 2002–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AVCBH164245
SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
FUNCTION TABLE
(EACH 8-BIT SECTION)
INPUTS
OE
OPERATION
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
LOGIC DIAGRAM (POSITIVE LOGIC)
1
2DIR
1DIR
24
25
48 1OE
1A1
47
2A1
2
2OE
36
13
1B1
To Seven Other Channels
2B1
To Seven Other Channels
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
–0.5
4.6
I/O ports (A port)
–0.5
4.6
I/O ports (B port)
–0.5
4.6
Control inputs
–0.5
4.6
A port
–0.5
4.6
B port
–0.5
4.6
A port
–0.5 VCCA + 0.5
B port
–0.5 VCCB + 0.5
UNIT
VCCA
VCCB
Supply voltage range
VI
Input voltage range (2)
VO
Voltage range applied to any output in the high-impedance or
power-off state (2)
VO
Voltage range applied to any output in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
Continuous current through VCCA, VCCB, or GND
θJA
Tstg
(1)
(2)
(3)
(4)
Package thermal impedance (4)
DGG package
70
DGV package
58
GQL/ZQL package
28
Storage temperature range
–65
150
V
V
V
V
°C/W
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2002–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AVCBH164245
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SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
RECOMMENDED OPERATING CONDITIONS (1) (2) (3)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCCA
Supply voltage
VCCI
1.4
3.6
V
VCCB
Supply voltage
1.4
3.6
V
VIH
High-level input voltage
VIL
Low-level input voltage
VIH
High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
IOH
Data inputs
Data inputs
Control inputs
(referenced to VCCB)
Control inputs
(referenced to VCCB)
1.7
2.7 V to 3.6 V
2
1.4 V to 1.95 V
VCCI × 0.35
1.95 V to 2.7 V
0.7
2.7 V to 3.6 V
0.8
1.4 V to 1.95 V
VCCB × 0.65
1.95 V to 2.7 V
1.7
2.7 V to 3.6 V
2
1.4 V to 1.95 V
VCCB × 0.35
1.95 V to 2.7 V
0.7
2.7 V to 3.6 V
0.8
0
VCCO
0
3.6
Input transition rise or fall rate
Operating free-air temperature
1.4 V to 1.6 V
–2
1.65 V to 1.95 V
–4
2.3 V to 2.7 V
–8
3 V to 3.6 V
–12
1.4 V to 1.6 V
2
1.65 V to 1.95 V
4
2.3 V to 2.7 V
8
3 V to 3.6 V
12
–40
V
V
3-state
Low-level output current
UNIT
V
Active state
TA
4
VCCI × 0.65
1.95 V to 2.7 V
3.6
Δt/Δv
(1)
(2)
(3)
1.4 V to 1.95 V
0
High-level output current
IOL
VCCO
V
V
V
mA
mA
5
ns/V
85
°C
VCCI is the VCC associated with the data input port.
VCCO is the VCC associated with the data output port.
All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
ELECTRICAL CHARACTERISTICS (1) (2)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
VOL
II
Control inputs
IBHL (4)
IBHH (5)
TEST CONDITIONS
Ioff
B port
1.4 V to 3.6 V
IOH = –2 mA
VI = VIH
1.4 V
1.4 V
IOH = –4 mA
VI = VIH
1.65 V
1.65 V
1.2
IOH = –8 mA
VI = VIH
2.3 V
2.3 V
1.75
IOH = –12 mA
VI = VIH
3V
3V
2.3
IOH = 100 µA
VI = VIL
1.4 V to 3.6 V
1.4 V to 3.6 V
0.2
IOH = 2 mA
VI = VIL
1.4 V
1.4 V
0.35
IOH = 4 mA
VI = VIL
1.65 V
1.65 V
0.45
IOH = 8 mA
VI = VIL
2.3 V
2.3 V
0.55
IOH = 12 mA
VI = VIL
3V
3V
0.7
1.4 V to 3.6 V
3.6 V
±2.5
VI = 0.49 V
1.4 V
1.4 V
VI = 0.57 V
1.65 V
1.65 V
25
VI = 0.7 V
2.3 V
2.3 V
45
VI = 0.8 V
3V
3V
75
VI = VCCB or GND
B port
1.4 V
1.4 V
1.65 V
–25
VI = 0.7 V
2.3 V
2.3 V
–45
OE = VIH
VO = VCCO or GND,
VI = VCCI or GND
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
VI = VCCI or GND,
OE = don't
care
IO = 0
V
V
µA
11
1.65 V
A port
ICCA
1.05
VI = 0.57 V
VI or VO = 0 to 3.6 V
UNIT
VCCO – 0.2
VI = 0.49 V
A or B ports
IOZ (8)
MAX
1.4 V to 3.6 V
VI = 0 to VCC
A port
MIN TYP (3)
VI = VIH
VI = 0 to VCC
IBHHO (7)
VCCB
IOH = –100 µA
VI = 0.8 V
IBHLO (6)
VCCA
µA
–11
µA
3V
3V
–75
1.6 V
1.6 V
100
1.95 V
1.95 V
200
2.7 V
2.7 V
300
3.6 V
3.6 V
525
1.6 V
1.6 V
–100
1.95 V
1.95 V
–200
2.7 V
2.7 V
–300
3.6 V
3.6 V
–525
0V
0 to 3.6 V
±10
0 to 3.6 V
0V
±10
3.6 V
3.6 V
±12.5
0V
3.6 V
±12.5
3.6 V
0V
±12.5
µA
µA
1.6 V
1.6 V
20
1.95 V
1.95 V
20
2.7 V
2.7 V
30
0V
3.6 V
–40
3.6 V
0V
40
3.6 V
3.6 V
40
µA
µA
µA
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
All typical values are at TA = 25°C.
The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to
GND and then raising it to VIL max.
The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to
VCC and then lowering it to VIH min.
An external driver must source at least IBHLO to switch this node from low to high.
An external driver must sink at least IBHHO to switch this node from high to low.
For I/O ports, the parameter IOZ includes the input leakage current.
Copyright © 2002–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AVCBH164245
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SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
ICCB
TEST CONDITIONS
VI = VCCI or GND,
IO = 0
MIN TYP (3)
VCCA
VCCB
1.6 V
1.6 V
MAX
20
1.95 V
1.95 V
20
2.7 V
2.7 V
30
0V
3.6 V
40
3.6 V
0V
–40
3.6 V
3.6 V
40
UNIT
µA
Ci
Control inputs
VI = 3.3 V or GND
3.3 V
3.3 V
4
pF
Cio
A or B ports
VO = 3.3 V or GND
3.3 V
3.3 V
5
pF
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 2)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.7
6.7
1.9
6.3
1.8
5.5
1.7
5.8
A
1.8
6.8
2.2
7.4
2.1
7.6
2.1
7.3
A
2.5
8.4
2.4
7.4
2.1
5.2
1.9
4.2
B
2.1
9
2.9
9.8
3.2
10
3
9.8
A
2.2
6.9
2.3
6.1
1.3
3.6
1.3
3
B
2.1
7.1
2.3
6.4
1.7
5.15.1
1.6
4.8
UNIT
ns
ns
ns
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 2)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.7
6.7
1.8
6
1.7
4.7
1.6
4.3
A
1.4
5.5
1.8
6
1.8
5.8
1.8
5.5
A
2.6
8.5
2.5
7.5
2.2
5.3
1.9
4.2
B
1.8
7.6
2.6
7.7
2.6
7.6
2.6
7.4
A
2.3
7
2.3
6.1
1.3
3.6
1.3
3
B
1.8
7
2.5
6.3
1.8
4.7
1.7
4.4
UNIT
ns
ns
ns
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 2)
PARAMETER
tpd
6
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
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VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.6
6
1.8
5.6
1.5
4
1.4
3.4
A
1.3
4.6
1.7
4.4
1.5
4
1.4
3.7
A
3.1
8.5
2.5
7.5
2.2
5.3
1.9
4.2
B
1.7
5.7
2.2
5.5
2.2
5.3
2.2
5.1
A
2.4
7
3
6.1
1.4
3.6
1.2
3
B
1.2
5.8
1.9
5
1.4
3.6
1.3
3.3
UNIT
ns
ns
ns
Copyright © 2002–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AVCBH164245
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WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 2)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A
B
ten
OE
tdis
OE
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.5
5.9
1.7
5.4
1.5
3.7
1.4
3.1
A
1.3
4.5
1.6
3.8
1.5
3.3
1.4
3.1
A
2.6
8.3
2.5
7.4
2.2
5.2
1.9
4.1
B
1.6
4.9
2
4.5
2
4.3
1.9
4.1
A
2.3
7
3
6
1.3
3.5
1.2
3.5
B
1.3
6.9
2.1
5.5
1.6
3.8
1.5
3.5
UNIT
ns
ns
ns
OPERATING CHARACTERISTICS
VCCA and VCCB = 3.3 V, TA = 25°C
PARAMETER
CpdA
(VCCA)
CpdB
(VCCB)
TEST CONDITIONS
TYP
Power dissipation capacitance per transceiver,
A-port input, B-port output
Outputs enabled
Power dissipation capacitance per transceiver,
B-port input, A-port output
Outputs enabled
Outputs disabled
7
Power dissipation capacitance per transceiver,
A-port input, B-port output
Outputs enabled
20
Outputs disabled
Outputs disabled
Outputs enabled
Power dissipation capacitance per transceiver,
B-port input, A-port output
UNIT
14
CL = 0,
CL = 0,
7
f = 10 MHz
pF
20
7
f = 10 MHz
pF
14
Outputs disabled
7
Output Description
The DOC™ circuitry is implemented, which, during the transition, initially lowers the output impedance to
effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL vs
IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the beginning of
the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a high-drive
standard-output device. For more information, refer to the TI application reports, AVC Logic Family Technology
and Applications, literature number SCEA006, and Dynamic Output Control (DOC™) Circuitry Technology and
Applications, literature number SCEA009.
3.2
TA = 25°C
Process = Nominal
- Output Voltage - V
2.8
2.4
VCC = 3.3 V
2.0
1.6
VCC = 2.5 V
1.2
OH
VCC = 1.8 V
0.8
V
VOL - Output Voltage - V
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.4
0
17
34
51
68
85 102 119
IOL - Output Current - mA
136
153
170
TA = 25°C
Process = Nominal
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
-160 -144 -128 -112 -96 -80 -64 -48
IOH - Output Current - mA
-32
-16
Figure 1. Typical Output Voltage vs Output Current
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7
SN74AVCBH164245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES393B – JUNE 2002 – REVISED MARCH 2008
PARAMETER MEASUREMENT INFORMATION
2 × V CCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × V CCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2V
Input
VCCO
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
CL
15 pF
30 pF
30 pF
30 pF
VTP
0.1 V
0.15 V
0.15 V
0.3 V
RL
2 kΩ
1 kΩ
500 Ω
500 Ω
CCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCB
Output
Control
(low-level
enabling)
VCCB/2
VCCB/2
0V
tPZL
Input
VCCI
VCCI/2V
CCI/2
0V
tPLH
Output
tPHL
VOH
/2
CCO
VOL
VCCO/2V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCCO
Output
Waveform 1
S1 at 2 x VCCO
(see Note B)
tPLZ
VCCO/2
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V TP
VOL
tPHZ
VCCO/2
VOH - V TP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Figure 2. Load Circuit and Voltage Waveforms
8
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Copyright © 2002–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74AVCBH164245
PACKAGE OPTION ADDENDUM
www.ti.com
27-Dec-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
74AVCBH164245GRG4
ACTIVE
TSSOP
DGG
48
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVCBH164245
74AVCBH164245ZQLR
NRND
BGA
MICROSTAR
JUNIOR
ZQL
56
1000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
WBH4245
SN74AVCBH164245GR
ACTIVE
TSSOP
DGG
48
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVCBH164245
SN74AVCBH164245VR
ACTIVE
TVSOP
DGV
48
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WBH4245
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
27-Dec-2019
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
74AVCBH164245ZQLR
BGA MI
CROSTA
R JUNI
OR
ZQL
56
1000
330.0
16.4
4.8
7.3
1.5
8.0
16.0
Q1
SN74AVCBH164245GR
TSSOP
DGG
48
2000
330.0
24.4
8.6
13.0
1.8
12.0
24.0
Q1
SN74AVCBH164245VR
TVSOP
DGV
48
2000
330.0
16.4
7.1
10.2
1.6
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74AVCBH164245ZQLR
BGA MICROSTAR
JUNIOR
ZQL
56
1000
350.0
350.0
43.0
SN74AVCBH164245GR
TSSOP
DGG
48
2000
367.0
367.0
45.0
SN74AVCBH164245VR
TVSOP
DGV
48
2000
367.0
367.0
38.0
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OUTLINE
ZQL0056A
JRBGA - 1 mm max height
SCALE 2.100
PLASTIC BALL GRID ARRAY
4.6
4.4
B
A
BALL A1 CORNER
7.1
6.9
1 MAX
C
SEATING PLANE
0.35
TYP
0.15
BALL TYP
0.1 C
3.25 TYP
(0.625) TYP
SYMM
K
(0.575) TYP
J
H
G
5.85
TYP
SYMM
F
E
D
C
56X
NOTE 3
B
A
0.65 TYP
BALL A1 CORNER
1
2
3
4
5
0.45
0.35
0.15
0.08
C B A
C
6
0.65 TYP
4219711/B 01/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. No metal in this area, indicates orientation.
www.ti.com
EXAMPLE BOARD LAYOUT
ZQL0056A
JRBGA - 1 mm max height
PLASTIC BALL GRID ARRAY
(0.65) TYP
56X ( 0.33)
2
1
3
4
5
6
A
(0.65) TYP
B
C
D
E
SYMM
F
G
H
J
K
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
0.05 MAX
METAL UNDER
SOLDER MASK
0.05 MIN
EXPOSED METAL
( 0.33)
METAL
( 0.33)
SOLDER MASK
OPENING
EXPOSED METAL
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4219711/B 01/2017
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99).
www.ti.com
EXAMPLE STENCIL DESIGN
ZQL0056A
JRBGA - 1 mm max height
PLASTIC BALL GRID ARRAY
56X ( 0.33)
(0.65) TYP
1
2
3
4
5
6
A
(0.65) TYP
B
C
D
E
SYMM
F
G
H
J
K
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4219711/B 01/2017
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
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