Texas Instruments | Single Bus Buffer Gate With 3-State Output (Rev. B) | Datasheet | Texas Instruments Single Bus Buffer Gate With 3-State Output (Rev. B) Datasheet

Texas Instruments Single Bus Buffer Gate With 3-State Output (Rev. B) Datasheet
SN74AHCT1G125-Q1
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
SCLS504B − JUNE 2003 − REVISED JANUARY 2008
D Qualified for Automotive Applications
D ESD Protection Exceeds 2000 V Per
D
D
D
D
D
DCK PACKAGE
(TOP VIEW)
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Operating Range of 3 V to 5.5 V
Max tpd of 6 ns at 5 V
Low Power Consumption, 10-µA Max ICC
±8-mA Output Drive at 5 V
Inputs Are TTL-Voltage Compatible
OE
A
GND
1
5
VCC
4
Y
2
3
description/ordering information
The SN74AHCT1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled when
the output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION†
−40°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE‡
TA
SOT (SC-70) − DCK
Reel of 3000
CAHCT1G125QDCKRQ1
TOP-SIDE
MARKING§
BM_
†
For the most current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI web site at http://www.ti.com.
‡ Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
§ The actual top-side marking has one additional character that designates the wafer fab/assembly site.
FUNCTION TABLE
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
OE
A
1
2
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2008, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74AHCT1G125-Q1
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
VCC
Supply voltage
VCC = 3.0 V
MIN
MAX
3
5.5
V
1.4
VIH
High level input voltage
High-level
VIL
Low level input voltage
Low-level
VI
Input voltage
0
5.5
VO
Output voltage
0
VCC
IOH
High-level output current
IOL
Low-level output current
∆t/∆v
Input transition rise or fall rate
TA
Operating free-air temperature
VCC = 4.5 V to 5.5 V
UNIT
V
2
VCC = 3.0 V
0.53
VCC = 4.5 V to 5.5 V
0.8
−8
−40
V
V
V
mA
8
mA
20
ns/V
125
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74AHCT1G125-Q1
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
VOL
†
TYP
MAX
MIN
MAX
3V
2.9
3
4.5 V
4.4
4.5
3V
2.58
2.34
IOH = −8 mA
4.5 V
3.94
3.66
IOL = 50 mA
3 V and
4.5 V
0.1
0.1
IOL = 4 mA
3V
0.36
0.52
IOL = 8 mA
4.5 V
0.36
0.52
IOH = −50
50 mA
A
VOH
TA = 25°C
MIN
IOH = −4 mA
UNIT
2.9
4.4
V
V
II
VI = 5.5 V or GND
0 V to 5.5 V
±0.1
±1
mA
IOZ
VO = VCC or GND
5.5 V
±0.25
±2.5
mA
ICC
VI = VCC or GND,
IO = 0,
3 V and
5.5 V
1
10
mA
∆ICC†
One input at 3.4 V,
Other input at VCC or GND
1.35
1.5
mA
Ci
VI = VCC or GND
5V
4
10
10
pF
Co
VO = VCC or GND
5V
10
OE high or low
5.5 V
pF
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or VCC.
switching characteristics over recommended operating free-air temperature range,
VCC = 3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A
Y
CL = 15 pF
OE
Y
CL = 15 pF
OE
Y
CL = 15 pF
A
Y
CL = 50 pF
OE
Y
CL = 50 pF
OE
Y
CL = 50 pF
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TA = 25°C
MIN
MIN
MAX
TYP
MAX
5.6
8
12
5.6
8
12
5.4
8
11.5
5.4
8
11.5
6.5
9.7
14.5
6.5
9.7
14.5
8.1
11.5
16
8.1
11.5
16
7.9
11.5
15
7.9
11.5
15
8
13.2
18
8
13.2
18
UNIT
ns
ns
ns
ns
ns
ns
3
SN74AHCT1G125-Q1
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A
Y
CL = 15 pF
OE
Y
CL = 15 pF
OE
Y
CL = 15 pF
A
Y
CL = 50 pF
OE
Y
CL = 50 pF
OE
Y
CL = 50 pF
TA = 25°C
MIN
MIN
MAX
TYP
MAX
3.8
5.5
8.5
3.8
5.5
8.5
3.6
5.1
7.5
3.6
5.1
7.5
4.8
6.8
10
4.8
6.8
10
5.3
7.5
10.5
5.3
7.5
10.5
5.1
7.1
9.5
5.1
7.1
9.5
7
8.8
12
7
8.8
12
UNIT
ns
ns
ns
ns
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance
No load,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 1 MHz
TYP
14
UNIT
pF
SN74AHCT1G125-Q1
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
PARAMETER MEASUREMENT INFORMATION
VCC
From Output
Under Test
Test
Point
RL = 1 kΩ
From Output
Under Test
S1
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
1.5 V
Timing Input
0V
tw
3V
1.5 V
Input
1.5 V
th
tsu
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
VOH
In-Phase
Output
50% VCC
tPHL
Out-of-Phase
Output
50% VCC
VOL
3V
Output
Control
Output
Waveform 1
S1 at VCC
(see Note B)
1.5 V
0V
tPZL
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
tPLZ
≈VCC
50% VCC
tPZH
tPLH
50% VCC
1.5 V
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
PACKAGE OPTION ADDENDUM
www.ti.com
22-May-2016
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
CAHCT1G125QDCKRG4Q
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | Call TI
Level-1-260C-UNLIM
-40 to 125
BMS
CAHCT1G125QDCKRQ1
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
BMS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
22-May-2016
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74AHCT1G125-Q1 :
• Catalog: SN74AHCT1G125
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
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