Texas Instruments | /-15 kV ESD-Protected Voltage-Translation Transceiver (Rev. H) | Datasheet | Texas Instruments /-15 kV ESD-Protected Voltage-Translation Transceiver (Rev. H) Datasheet

Texas Instruments  /-15 kV ESD-Protected Voltage-Translation Transceiver (Rev. H) Datasheet
www.ti.com
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
FEATURES
•
•
•
•
Transceiver for Memory Card Interface
[MultiMediaCard (MMC), Secure Digital (SD),
Memory Stick™ Compliant Products,
SmartMedia Card, and xD-Picture Card™]
Configurable I/O Switching Levels With
Dual-Supply Pins Operating Over Full 1.4-V to
3.6-V Power-Supply Range
For Low-Power Operation, A Ports Are Placed
in High-Impedance State When Card-Side
Supply Voltage Is Switched Off
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
•
•
ESD Protection for Card-Side Pins (B Port)
– ±15 kV (±12 kV on Pin 14B) – IEC 61000-4-2
ESD, Air-Gap Discharge
– ±8 kV – IEC 61000-4-2 ESD, Contact
Discharge
ESD Protection for A-Port Pins (Tested Per
JESD 22) Exceeds
– 2000-V Human-Body Model (A114-B
– 1000-V Charged-Device Model (C101)
xxxxxxx
DESCRIPTION/ORDERING INFORMATION
The SN74AVCA406 is a transceiver for interfacing microprocessors with MultiMediaCards (MMCs), secure
digital (SD) cards, Memory Stick™ compliant products, SmartMedia cards, or xD-Picture Cards™. It integrates
high ESD protection, which eliminates the need for external ESD diodes. Two supply-voltage pins allow the
A-port and B-port input switching thresholds to be configured separately. The A port is designed to track VCCA,
while the B port is designed to track VCCB0 and VCCB1. VCCA ,VCCB0 and VCCB1 can accept any supply voltage
from 1.4 V to 3.6 V.
Memory card standards recommend high ESD protection for devices that connect directly to the external
memory card. To meet this need, the SN74AVCA406 incorporates ±15-kV air-gap discharge and ±8-kV contact
discharge protection on the card side. If VCCB0 and VCCB1 are switched off (no card inserted), the A-port outputs
are placed in the high-impedance state to conserve power.
The SN74AVCA406 enables system designers to easily interface low-voltage microprocessors to different
memory cards operating at higher voltages. The mode (MODE0 and MODE1) pins are used to configure the
device to interface with different types of cards.
The SN74AVCA406 is offered in the 48-ball MicroStar Jr.™ ball grid array (BGA) package. This package has
dimensions of 4 × 4 mm, with a 0.5-mm ball pitch for effective board-space savings. Memory cards are widely
used in mobile phones, PDAs, digital cameras, personal media players, camcorders, set-top boxes, etc. Low
static power consumption and small package size make the SN74AVCA406 an ideal choice for these
applications.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
(1)
ORDERABLE PART NUMBER
TSSOP – DGGR
Tape and reel
SN74AVCA406DGGR
VFBGA – GQC
Tape and reel
SN74AVCA406GQCR
VFBGA – ZQC (Pb-free)
Tape and reel
SN74AVCA406ZQCR
TOP-SIDE MARKING
AVCA406
WM406
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2007, Texas Instruments Incorporated
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
GQC/ZQC PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
A
B
C
D
E
F
G
TERMINAL ASSIGNMENTS (1)
(1)
2
1
2
3
4
5
6
7
A
VCCA
2A
4DIR
2DIR
MODE1
10B1
VCCB0
B
10A1
3A
1A
1DIR
MODE0
9B1
1B
C
9A
10A2
3DIR
GND
2B
3B
D
9DIR
4A
56DIR
GND
4B
11B
12B
E
78DIR
6A
GND
CS0
GND
10B2
9B2
F
7A
8A
12A
13A
7B
5B
14B
G
VCCA
5A
11A
CS1
8B
6B
VCCB1
VCCA powers all A-port I/Os and control inputs.
VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B.
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SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
DGG PACKAGE
(TOP VIEW)
3DIR
4DIR
1A
2A
3A
VCCA
GND
10A1
10A2
9A
4A
9DIR
56DIR
78DIR
6A
7A
8A
VCCA
GND
5A
12A
11A
13A
CS1
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
2DIR
1DIR
MODE1
MODE0
10B1
GND
VCCB0
9B1
1B
2B
3B
4B
12B
11B
9B2
10B2
14B
GND
VCCB1
5B
6B
7B
8B
CS0
Device Operation
The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is
designed to track VCCB0 and VCCB1. VCCB0 and VCCB1 can accept any supply voltage from 1.4 V to 3.6 V;
however, VCCB0, VCCB1, or both must be greater than or equal to VCCA during normal operation. If VCCB0 and
VCCB1 are both at GND, the A port is in the high-impedance state. The control pins are supplied by VCCA. The
microprocessor is connected to the A port, and the memory card(s) are connected to the B port. The device can
be configured using MODE0, MODE1, CS0, and CS1 pins to interface with 1-bit, 4-bit, or 8-bit memory cards.
Outputs 12A and 14B are push-pull and open drain (OD), respectively, except for NAND flash (XD) mode, where
they are open drain and push-pull, respectively.
Table 1. Interface With Different Memory Cards
MODE0
MODE1
0
X
SD/SDIO/MMC/Memory Stick/Memory Stick PRO
MEMORY-CARD INTERFACE
1
0
8-bit MMC/4-bit + GPIO translation
1
1
SmartMedia/xD-Picture Card
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3
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 1a – Interfacing With SD or SDIO Card
(SD Mode or SD 4-Bit Mode)
Table 2. SD or SDIO Card
PIN
NO.
4
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
PIN FUNCTION
PIN
TYPE
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
B1
10A1
CLK.h
Clock signal from host
Input
C1
9A
CMD.h
Command signal connected to host
D1
9DIR
CMD-dir.h
Direction control for 9A/9B connected to host
Input
E1
78DIR
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
Input
F1
7A
(tie-low)
I/O pin not used in this mode. Tie to GND.
G1
VCCA
VCCA
A2
2A
DAT1.h
Data bit 2 connected to host. Referenced to VCCA.
I/O
B2
3A
DAT2.h
Data bit 3 connected to host. Referenced to VCCA.
I/O
CLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
I/O
I/O
Power
C2
10A2
D2
4A
DAT3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O
E2
6A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
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Output
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 2. SD or SDIO Card (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A3
4DIR
DAT3-dir.h
B3
1A
DAT0.h
PIN FUNCTION
Direction control for 4A/4B
Input
Data bit 1 connected to host. Referenced to VCCA.
C3
PIN
TYPE
I/O
Depopulated ball
D3
56DIR
(tie-high)
E3
GND
GND
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
Ground
Output pin not used in this mode. Do not use. Leave unconnected.
Input
F3
12A
DNU
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Output
Input
A4
2DIR
DAT1-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DAT2-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, 9A,
9B1, and 10A2 are placed in Hi Z, and 10B1 is low.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
G4
CS1
(tie-high)
Card select. Not used in this mode. Tie to VCCA for proper operation.
Input
A5
MODE1
(tie-low)
B5
MODE0
(tie-low)
C5
GND
GND
Ground
D5
4B
DAT3
Data bit 4 connected to card. Referenced to VCCB0.
E5
GND
GND
Ground
F5
7B
DNU
I/O pin not used in this mode. Leave unconnected.
G5
8B
DNU
I/O pin not used in this mode. Leave unconnected.
A6
10B1
CLK
Clock signal connected to card
Output
B6
9B1
CMD
Command signal connected to card
Output
C6
2B
DAT1
Data bit 2 connected to card. Referenced to VCCB0.
D6
11B
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
Output
E6
10B2
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
Output
F6
5B
DNU
I/O pin not used in this mode. Leave unconnected.
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
G6
6B
DNU
I/O pin not used in this mode. Leave unconnected.
A7
VCCB0
VCCB0
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
B7
1B
DAT0
Data bit 1 connected to card. Referenced to VCCB0.
Data bit 3 connected to card. Referenced to VCCB0.
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
Power
I/O
C7
3B
DAT3
D7
12B
(tie-low)
E7
9B2
DNU
I/O pin not used in this mode. Leave unconnected.
F7
14B
DNU
Open-drain output not used in this mode. Leave unconnected.
Output
G7
VCCB1
(tie-low)
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B. Not
used in this mode. Tie to GND.
Power
Input pin not used in this mode. Tie to GND.
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I/O
Input
I/O
5
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 1b - Interfacing With SD Card or MMC
(SD 1-Bit Mode or MMC Mode)
Table 3. SD Card or MMC
6
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
Input
PIN FUNCTION
B1
10A1
CLK.h
Clock signal from host
C1
9A
CMD.h
Command signal connected to host
D1
9DIR
CMD-dir.h
E1
78DIR
PIN
TYPE
I/O
Direction control for 9A/9B
Input
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
Input
I/O pin not used in this mode. Tie to GND.
F1
7A
(tie-low)
G1
VCCA
VCCA
A2
2A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
B2
3A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
I/O
Power
C2
10A2
CLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
D2
4A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
E2
6A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
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Output
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 3. SD Card or MMC (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A3
4DIR
(tie-high)
Direction control for 4A/4B. Not used in this mode. Tie to VCCA.
B3
1A
DAT0.h
Data bit 1 connected to host. Referenced to VCCA.
PIN FUNCTION
C3
PIN
TYPE
Input
I/O
Depopulated ball
D3
56DIR
(tie-high)
E3
GND
GND
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
Ground
Output pin not used in this mode. Do not use. Leave unconnected.
Input
F3
12A
DNU
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Output
Input
A4
2DIR
(tie-high)
Direction control for 2A/2B connected to host. Not used in this mode. Tie to VCCA.
Input
Direction control for 1A/1B connected to host
Input
Direction control for 3A/3B connected to host. Not used in this mode. Tie to VCCA.
Input
B4
1DIR
DAT0-dir.h
C4
3DIR
(tie-high)
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, and
9B1 are placed in Hi Z.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
G4
CS1
(tie-high)
Card select. Not used in this mode. Tie to VCCA for proper operation.
Input
A5
MODE1
(tie-low)
B5
MODE0
(tie-low)
C5
GND
GND
Ground
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
Input
Input
D5
4B
DNU
I/O pin not used in this mode. Leave unconnected.
E5
GND
GND
Ground
F5
7B
DNU
I/O pin not used in this mode. Leave unconnected.
G5
8B
DNU
I/O pin not used in this mode. Leave unconnected.
A6
10B1
CLK
Clock signal connected to card
Output
B6
9B1
CMD
Command signal connected to card
Output
C6
2B
DNU
I/O pin not used in this mode. Leave unconnected.
D6
11B
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
Output
E6
10B2
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
Output
F6
5B
DNU
I/O pin not used in this mode. Leave unconnected.
G6
6B
DNU
I/O pin not used in this mode. Leave unconnected.
A7
VCCB0
VCCB0
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
B7
1B
DAT0
Data bit 1 connected to card. Referenced to VCCB0.
I/O pin not used in this mode. Leave unconnected.
I/O
I/O
I/O
I/O
I/O
I/O
Power
I/O
C7
3B
DNU
D7
12B
(tie-low)
E7
9B2
DNU
I/O pin not used in this mode. Leave unconnected.
F7
14B
DNU
Open-drain output not used in this mode. Leave unconnected.
Output
G7
VCCB1
(tie-low)
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B. Not
used in this mode. Tie to GND.
Power
Input pin not used in this mode. Tie to GND.
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I/O
Input
I/O
7
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 1c - Interfacing With SD/SDIO Card or MMC
(SPI Mode)
Table 4. SD/SDIO Card or MMC
8
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A1
VCCA
VCCA
B1
10A1
SCLK.h
PIN FUNCTION
PIN
TYPE
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
Serial clock signal from host
Input
Serial data in (master out slave in) connected to host. Connect 9DIR to VCCA to make 9A
an input.
C1
9A
DI.h
D1
9DIR
(tie-high)
Direction control for 9A/9B. Tie high to make 9A an input and 9B an output.
Input
E1
78DIR
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
Input
F1
7A
(tie-low)
I/O pin not used in this mode. Tie to GND.
G1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
A2
2A
CS.h
Card select connected to host. Connect 2DIR to VCCA to make 2A an input.
B2
3A
(tie-low)
C2
10A2
DNU
D2
4A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
E2
6A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
I/O pin not used in this mode. Tie to GND.
Clock feedback to host. Not used in this mode. Leave unconnected.
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I/O
I/O
Power
I/O
I/O
Output
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 4. SD/SDIO Card or MMC (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A3
4DIR
(tie-high)
B3
1A
DO.h
D3
56DIR
(tie-high)
E3
GND
GND
Ground
F3
12A
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
A4
2DIR
(tie-high)
Direction control for 2A/2B. Tie to VCCA to make 2A an input and 2B an output.
Input
B4
1DIR
(tie-low)
Direction control for 1A/1B. Tie to GND to make 1B an input and 1A an output.
Input
C4
3DIR
(tie-high)
Direction control for 3A/3B. Not used in this mode. Tie to VCCA.
Input
D4
GND
GND
E4
CS0
(tie-low)
Card select signal. Not used in this mode. For proper operation, tie to GND.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
G4
CS1
(tie-HIGH)
Card select. Not used in this mode. For proper operation, tie to VCCA.
Input
A5
MODE1
(tie-low)
B5
MODE0
(tie-low)
C5
GND
GND
Ground
PIN FUNCTION
Direction control for 4A/4B. Not used in this mode. Tie to VCCA.
Serial data out (master in slave out) connected to host. Connect 1DIR to GND to make 1A
an output.
C3
PIN
TYPE
Input
I/O
Depopulated ball
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
Input
Output
Ground
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
D5
4B
DNU
Card select connected to card. Connect 2DIR to VCCA to make 2B an output.
E5
GND
GND
Ground
F5
7B
DNU
I/O pin not used in this mode. Leave unconnected.
Input
Input
I/O
I/O
G5
8B
DNU
I/O pin not used in this mode. Leave unconnected.
A6
10B1
SCLK
Serial clock signal connected to card
Output
B6
9B1
DI
Serial data in (master out slave in) connected to card
Output
C6
2B
CS
I/O pin not used in this mode. Leave unconnected.
D6
11B
DNU
Output pin not used in this mode. Leave unconnected.
Output
E6
10B2
DNU
Output pin not used in this mode. Leave unconnected.
Output
F6
5B
DNU
I/O pin not used in this mode. Leave unconnected.
G6
6B
DNU
I/O pin not used in this mode. Leave unconnected.
A7
VCCB0
VCCB0
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
B7
1B
DO
Serial data out (master in slave out) connected to host. Connect 1DIR to GND to make 1B
an input.
I/O
I/O
I/O
Power
I/O
C7
3B
DNU
D7
12B
(tie-low)
E7
9B2
DNU
I/O pin not used in this mode. Leave unconnected.
F7
14B
DNU
Open-drain output not used in this mode. Leave unconnected.
Output
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B. Not
used in this mode. Tie to GND.
Power
G7
VCCB1
(tie-low)
I/O pin not used in this mode. Leave unconnected.
I/O
Input pin not used in this mode. Tie to GND.
Submit Documentation Feedback
I/O
Input
I/O
9
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 1d - Interfacing With SDIO Card in Slot 0 and SD Card (4-bit Mode) in Slot 1
Table 5. SDIO Card (Slot 0) and SD Card (Slot 1)
PIN
NO.
10
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
PIN FUNCTION
PIN
TYPE
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
B1
10A1
CLK.h
Clock signal from host
Input
C1
9A
CMD.h
Command signal connected to host
D1
9DIR
CMD-dir.h
Direction control for 9A/9B connected to host
Input
E1
78DIR
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
Input
F1
7A
(tie-low)
I/O pin not used in this mode. Tie to GND.
G1
VCCA
VCCA
A2
2A
DAT1.h
Data bit 2 connected to host. Referenced to VCCA.
I/O
B2
3A
DAT2.h
Data bit 3 connected to host. Referenced to VCCA.
I/O
CLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
I/O
I/O
Power
C2
10A2
D2
4A
DAT3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O
E2
6A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
A3
4DIR
DAT3-dir.h
Direction control for 4A/4B
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Output
I/O
Input
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 5. SDIO Card (Slot 0) and SD Card (Slot 1) (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
B3
1A
DAT0.h
Data bit 1 connected to host. Referenced to VCCA.
D3
56DIR
(tie-high)
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
E3
GND
GND
Ground
F3
12A
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
PIN FUNCTION
C3
PIN
TYPE
I/O
Depopulated ball
Input
Output
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND
Input
A4
2DIR
DAT1-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DAT2-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, and
9B1 are placed in Hi Z, and 10B1 is low.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
Card select from host. Active low. When CS1 = high, 5A, 6A, 7A, 8A, 5B, 6B, 7B, 8B, 7B,
and 9B2 are placed in Hi Z, and 10B2 is low.
Input
G4
CS1
CS1.h
A5
MODE1
(tie-low)
B5
MODE0
(tie-low)
C5
GND
GND
D5
4B
DAT3.0
E5
GND
GND
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
Input
Input
Ground
Data bit 4 connected to card in slot 0. Referenced to VCCB0.
I/O
Ground
F5
7B
DAT2.1
Data bit 3 connected to card in slot 1. Referenced to VCCB1.
I/O
G5
8B
DAT3.1
Data bit 4 connected to card in slot 1. Referenced to VCCB1.
I/O
A6
10B1
CLK.0
Clock signal connected to card in slot 0
Output
B6
9B1
CMD.0
Command signal connected to card in slot 0
Output
C6
2B
DAT1.0
Data bit 2 connected to card in slot 0. Referenced to VCCB0.
D6
11B
DNU
E6
10B2
CLK.1
F6
5B
DAT0.1
Data bit 1 connected to card in slot 1. Referenced to VCCB1.
G6
6B
DAT1.1
Data bit 2 connected to card in slot 1. Referenced to VCCB1.
A7
VCCB0
VCCB0
I/O
Output pin not used in this mode. Leave unconnected.
Output
Clock signal connected to card in slot 1
Output
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
I/O
I/O
Power
B7
1B
DAT0.0
Data bit 1 connected to card in slot 0. Referenced to VCCB0.
I/O
C7
3B
DAT2.0
Data bit 3 connected to card in slot 0. Referenced to VCCB0.
I/O
D7
12B
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
E7
9B2
CMD.1
Command signal connected to card in slot 1
I/O
Output
Power
F7
14B
IRQ.h
Open-drain interrupt output for dual SDIO cards configuration. DAT1 is the input for
interrupt.
G7
VCCB1
VCCB1
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B.
Submit Documentation Feedback
11
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 1e - Alternate Method of Interfacing With SD/SDIO Card
(SD Mode or SD 4-bit Mode)
Table 6. Alternate SD/SDIO Card
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
Input
12
PIN FUNCTION
PIN
TYPE
B1
10A1
CLK.h
Clock signal from host
C1
9A
CMD.h
Command signal connected to host
D1
9DIR
CMD-dir.h
E1
78DIR
F1
7A
G1
VCCA
VCCA
A2
2A
DAT1.h
Data bit 2 connected to host. Referenced to VCCA.
I/O
B2
3A
DAT2.h
Data bit 3 connected to host. Referenced to VCCA.
I/O
CLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
I/O
Direction control for 9A/9B connected to host
Input
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
Input
(tie-low)
I/O pin not used in this mode. Tie to GND.
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
I/O
Power
C2
10A2
D2
4A
DAT3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O
E2
6A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
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Output
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 6. Alternate SD/SDIO Card (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A3
4DIR
DAT3-dir.h
B3
1A
DAT0.h
PIN FUNCTION
Direction control for 4A/4B
Input
Data bit 1 connected to host. Referenced to VCCA.
C3
PIN
TYPE
I/O
Depopulated ball
D3
56DIR
(tie-high)
E3
GND
GND
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
Ground
Output pin not used in this mode. Do not use. Leave unconnected.
Input
F3
12A
DNU
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Output
Input
A4
2DIR
DAT1-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DAT2-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
E4
CS0
(tie-high)
Card select signal. Not used in this mode. Tie to VCCA for proper operation.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
Card select from host. Active low. When CS1 = high, 1A, 2A, 3A, 4A, 5B, 6B, 7B, 8B, 9A,
9B2, and 10A2 are placed in Hi Z, and 10B1 is low.
Input
Ground
G4
CS1
CS1
A5
MODE1
(tie-low)
B5
MODE0
(tie-low)
C5
GND
GND
Ground
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
Input
Input
D5
4B
DNU
I/O pin not used in this mode. Leave unconnected.
E5
GND
GND
Ground
F5
7B
DAT2
Data bit 3 connected to card. Referenced to VCCB1.
G5
8B
DAT3
Data bit 4 connected to card. Referenced to VCCB1.
A6
10B1
DNU
Output pin not used in this mode. Leave unconnected.
Output
B6
9B1
DNU
Output pin not used in this mode. Leave unconnected.
Output
C6
2B
DNU
I/O pin not used in this mode. Leave unconnected.
D6
11B
DNU
Output pin not used in this mode. Leave unconnected.
Output
E6
10B2
CLK
Clock signal connected to card
Output
F6
5B
DAT0
Data bit 1 connected to card. Referenced to VCCB1.
I/O
G6
6B
DAT1
Data bit 2 connected to card. Referenced to VCCB1.
I/O
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
Not used in this mode. Tie to GND.
A7
VCCB0
(tie-low)
B7
1B
DNU
I/O pin not used in this mode. Leave unconnected.
I/O pin not used in this mode. Leave unconnected.
C7
3B
DNU
D7
12B
(tie-low)
E7
9B2
CMD
Command signal connected to card
Input pin not used in this mode. Tie to GND.
I/O
I/O
I/O
I/O
Power
I/O
I/O
Input
I/O
F7
14B
DNU
Open-drain output not used in this mode. Leave unconnected.
Output
G7
VCCB1
VCCB1
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B.
Power
Submit Documentation Feedback
13
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 1f - Interfacing With Memory Stick
Table 7. Memory Stick
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A1
VCCA
VCCA
14
PIN FUNCTION
PIN
TYPE
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
Clock signal from host
Input
B1
10A1
SCLK.h
C1
9A
BS.h
D1
9DIR
(tie-high)
Direction control for 9A/9B connected to host. Tie high to make 9A an input, 9B an output.
Input
E1
78DIR
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
Input
I/O pin not used in this mode. Tie to GND.
Bus state connected to host
I/O
F1
7A
(tie-low)
G1
VCCA
VCCA
A2
2A
DATA1.h
Data bit 2 connected to host. Referenced to VCCA.
I/O
B2
3A
DATA2.h
Data bit 3 connected to host. Referenced to VCCA.
I/O
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
I/O
Power
C2
10A2
SCLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
D2
4A
DATA3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O
E2
6A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
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Output
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 7. Memory Stick (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A3
4DIR
DATU-dir.h
B3
1A
DATA0.h
PIN FUNCTION
Direction control for 4A/4B
Input
Data bit 1 connected to host. Referenced to VCCA.
C3
PIN
TYPE
I/O
Depopulated ball
D3
56DIR
(tie-high)
E3
GND
GND
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
Ground
Output pin not used in this mode. Do not use. Leave unconnected.
Input
F3
12A
DNU
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Output
Input
A4
2DIR
DATU-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DATU-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, 9A,
9B1, and 10A2 are placed in Hi Z, and 10B1 is low.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
G4
CS1
(tie-high)
Card select signal. Not used in this mode. Tie to VCCA for proper operation.
Input
A5
MODE1
(tie-low)
B5
MODE0
(tie-low)
C5
GND
GND
D5
4B
DATA3
E5
GND
GND
Ground
F5
7B
DNU
I/O pin not used in this mode. Leave unconnected.
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
Input
Input
Ground
Data bit 4 connected to card. Referenced to VCCB0.
I/O
I/O
G5
8B
DNU
I/O pin not used in this mode. Leave unconnected.
A6
10B1
SCLK
Clock signal connected to card
Output
B6
9B1
BS
Bus state signal connected to card
Output
C6
2B
DATA1
D6
11B
DNU
Output pin not used in this mode. Leave unconnected.
Output
E6
10B2
DNU
Output pin not used in this mode. Leave unconnected.
Output
F6
5B
DNU
I/O pin not used in this mode. Leave unconnected.
Data bit 2 connected to card. Referenced to VCCB0.
G6
6B
DNU
I/O pin not used in this mode. Leave unconnected.
A7
VCCB0
VCCB0
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
B7
1B
DATA0
Data bit 1 connected to card. Referenced to VCCB0.
I/O
I/O
I/O
I/O
Power
I/O
C7
3B
DATA2
Data bit 3 connected to card. Referenced to VCCB0.
D7
12B
(tie-low)
Input pin not used in this mode. Tie to GND.
E7
9B2
DNU
I/O pin not used in this mode. Leave unconnected.
F7
14B
DNU
Open-drain output not used in this mode. Leave unconnected.
Output
G7
VCCB1
(tie-low)
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B. Not
used in this mode. Tie to GND.
Power
Submit Documentation Feedback
I/O
Input
I/O
15
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
CONFIGURATION 1 FUNCTION TABLE
(MODE0 = L, MODE1 = L)
SIGNAL
Clock
INPUTS
CS0
CS1
9DIR
OPERATION
(1-4)DIR
H
H
X
X
L
L
X
X
CLK.h to CLK.0 and CLK.1,
CLK.0 to CLK-f.h
SCLK.h to SCLK.0 and SCLK.1,
SCLK.0 to SCLK-f.h
L
H
X
X
CLK.h to CLK.0,
CLK.0 to CLK-f.h,
CLK.1 forced low
SCLK.h to SCLK.0,
SCLK.0 to SCLK-f.h,
SCLK.1 forced low
H
L
X
X
CLK.h to CLK.1,
CLK.1 to CLK-f.h,
CLK.0 forced low
SCLK.h to SCLK.1,
SCLK.1 to SCLK-f.h,
SCLK.0 forced low
H
H
X
X
All data I/Os are Hi Z (isolation mode).
All data I/Os are Hi Z (isolation mode).
L
DAT0.0
DAT1.0
DAT2.0
DAT3.0
and
and
and
and
DAT0.h,
DAT1.h,
DAT2.h,
DAT3.h
DATA0.0
DATA1.0
DATA2.0
DATA3.0
and
and
and
and
H
DAT0.h
DAT1.h
DAT2.h
DAT3.h
to
to
to
to
DAT0.0
DAT1.0
DAT2.0
DAT3.0
to DAT0.1,
to DAT1.1,
to DAT2.1,
to DAT3.1
DATA0.h
DATA1.h
DATA2.h
DATA3.h
to
to
to
to
DATA0.0
DATA1.0
DATA2.0
DATA3.0
L
DAT0.0
DAT1.0
DAT2.0
DAT3.0
to
to
to
to
DAT0.h,
DAT1.h,
DAT2.h,
DAT3.h
DATA0.0
DATA1.0
DATA2.0
DATA3.0
to
to
to
to
DATA0.h,
DATA1.h,
DATA2.h,
DATA3.h
H
DAT0.h
DAT1.h
DAT2.h
DAT3.h
to
to
to
to
DAT0.0,
DAT1.0,
DAT2.0,
DAT3.0
DATA0.h
DATA1.h
DATA2.h
DATA3.h
to
to
to
to
DATA0.0,
DATA1.0,
DATA2.0,
DATA3.0
L (1)
L (1)
L (1)
L (1)
L
Interrupt
request
(1)
16
Memory Stick/Memory Stick PRO
CLK.0 and CLK.1 forced low,
CLK-f.h forced Hi Z
X
X
H
X
Data
Command
MMC/SD
X
DAT0.1
DAT1.1
DAT2.1
DAT3.1
to
to
to
to
and
and
and
and
SCLK.0 and SCLK.1 forced low,
SCLK-f.h forced Hi Z
DATA0.1
DATA1.1
DATA2.1
DATA3.1
to DATA0.h,
to DATA1.h,
to DATA2.h,
to DATA3.h
and to
and to
and to
and to
DATA0.1,
DATA1.1,
DATA2.1,
DATA3.1
L
H
H
L
X
L
DAT0.1
DAT1.1
DAT2.1
DAT3.1
to
to
to
to
DAT0.h,
DAT1.h,
DAT2.h,
DAT3.h
DATA0.1
DATA1.1
DATA2.1
DATA3.1
to
to
to
to
DATA0.h,
DATA1.h,
DATA2.h,
DATA3.h
H
L
X
H
DAT0.h
DAT1.h
DAT2.h
DAT3.h
to
to
to
to
DAT0.1,
DAT1.1,
DAT2.1,
DAT3.1
DATA0.h
DATA1.h
DATA2.h
DATA3.h
to
to
to
to
DATA0.1,
DATA1.1,
DATA2.1,
DATA3.1
H
H
X
X
CMD.h, CMD.0, and CMD.1 are Hi Z
(isolation mode).
BS.h, BS.0, and BS.1 are Hi Z (isolation
mode).
L
L
H
X
CMD.h to CMD.0 and CMD.1
BS.h to BS.0 and BS.1
L
L
L
X
CMD.0 and CMD.1 to CMD.h
BS.0 and BS.1 to BS.h
L
H
H
X
CMD.h to CMD.0
BS.h to BS.0
L
H
L
X
CMD.0 to CMD.h
BS.0 to BS.h
H
L
H
X
CMD.h to CMD.1
BS.h to BS.1
H
L
L
X
CMD.1 to CMD.h
BS.1 to BS.h
DATA1.0 and DATA1.1 to IRQ.
IRQ is an open-drain output.
H
H
X
X
DAT1.0 and DAT1.1 to IRQ.
IRQ is an open-drain output.
L
H
X
X
DAT1.1 to IRQ.
IRQ is an open-drain output.
DATA1.1 to IRQ.
IRQ is an open-drain output.
H
L
X
X
DAT1.0 to IRQ.
IRQ is an open-drain output.
DATA1.0 to IRQ.
IRQ is an open-drain output.
L
L
X
X
IRQ is Hi Z.
IRQ is Hi Z.
Broadcast mode in which the host writes to or reads from both cards in parallel
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SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 2 - Interfacing With SD/SDIO Card and Using GPIOs for Level Shifting
Table 8. SD/SDIO Card Using GPIOs for Level Shifting
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
Input
PIN FUNCTION
PIN
TYPE
B1
10A1
CLK.h
Clock signal from host
C1
9A
CMD.h
Command signal connected to host
D1
9DIR
CMD-dir.h
Direction control for 9A/9B connected to host
Input
E1
78DIR
I/O23-dir.h
Direction control for 7A/7B and 8A/8B. Connected to host. Tie to VCCA if unused.
Input
I/O
F1
7A
I/O2.h
General-purpose I/O. Referenced to VCCA. Tie to VCCA or GND if unused.
G1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
I/O
A2
2A
DAT1.h
Data bit 2 connected to host. Referenced to VCCA.
I/O
B2
3A
DAT2.h
Data bit 3 connected to host. Referenced to VCCA.
I/O
Power
C2
10A2
CLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
D2
4A
DAT3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O
E2
6A
I/O1.h
General-purpose I/O. Referenced to VCCA. Tie to VCCA or GND if unused.
I/O
F2
8A
I/O3.h
General-purpose I/O. Referenced to VCCA. Tie to VCCA or GND if unused.
I/O
G2
5A
I/O0.h
General-purpose I/O. Referenced to VCCA. Tie to VCCA or GND if unused.
I/O
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Output
17
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 8. SD/SDIO Card Using GPIOs for Level Shifting (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A3
4DIR
DAT3-dir.h
B3
1A
DAT0.h
PIN FUNCTION
Direction control for 4A/4B
18
Input
Data bit 1 connected to host. Referenced to VCCA.
C3
PIN
TYPE
I/O
Depopulated ball
D3
56DIR
I/O01-dir.h
E3
GND
GND
Direction control for 5A/5B and 6A/6B. Referenced to VCCA. Tie to VCCA if unused.
Ground
Input
F3
12A
O5.h
General-purpose output connected to host. Referenced to VCCA.
G3
11A
I4.h
General-purpose input connected to host. Referenced to VCCA.
Output
Input
A4
2DIR
DAT1-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DAT2-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, 9A,
9B, and 10A2 are placed in Hi Z, and 10B1 is low.
Input
F4
13A
I6.h
General-purpose input connected to host. Referenced to VCCA.
Input
G4
CS1
(tie-low)
Card select. Tie to GND for proper operation.
Input
A5
MODE1
(tie-low)
MODE0
(tie-high)
MODE1, MODE0 determine mode of operation (see Table 1).
Tie MODE0 to VCCA. Tie MODE1 to GND.
Input
B5
C5
GND
GND
Ground
D5
4B
DAT3
Data bit 4 connected to card. Referenced to VCCB0.
E5
GND
GND
Ground
F5
7B
I/O2
General-purpose I/O. Referenced to VCCB1.
Input
I/O
I/O
G5
8B
I/O3
General-purpose I/O. Referenced to VCCB1.
A6
10B1
CLK
Clock signal connected to card
Output
I/O
B6
9B1
CMD
Command signal connected to card
Output
C6
2B
DAT1
Data bit 2 connected to card. Referenced to VCCB0.
D6
11B
O4
General-purpose output. Referenced to VCCB1.
Output
E6
10B2
O6
General-purpose output. Referenced to VCCB1.
Output
F6
5B
I/O0
General-purpose I/O. Referenced to VCCB1.
General-purpose I/O. Referenced to VCCB1.
I/O
I/O
G6
6B
I/O1
A7
VCCB0
VCCB0
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
B7
1B
DAT0
Data bit 1 connected to card. Referenced to VCCB0.
C7
3B
DAT2
Data bit 3 connected to card. Referenced to VCCB0.
D7
12B
I5
E7
9B2
DNU
I/O pin not used in this mode. Leave unconnected.
F7
14B
DNU
Open-drain output not used in this mode. Leave unconnected.
Output
G7
VCCB1
VCCB1
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B.
Power
General-purpose input. Referenced to VCCB1.
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I/O
Power
I/O
I/O
Input
I/O
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
CONFIGURATION 2 FUNCTION TABLE
(MODE0 = H, MODE1 = L)
INPUTS
SIGNAL
OPERATION
CS1
9DIR
(1-4)DIR
56DIR
78DIR
H
H
X
X
X
X
CLK forced low,
CLK-f.h forced Hi Z
SCLK forced low,
SCLK-f.h forced Hi Z
L
L
X
X
X
X
CLK.h to CLK,
CLK to CLK-f.h
SCLK.h to SCLK,
SCLK to SCLK-f.h
H
H
X
X
X
X
All data I/Os are Hi Z
(isolation mode).
All data I/Os are Hi Z
(isolation mode).
X
DAT0
DAT1
DAT2
DAT3
DAT0.h,
DAT1.h,
DAT2.h,
DAT3.h
DATA0
DATA1
DATA2
DATA3
to
to
to
to
DATA0.h
DATA1.h
DATA2.h
DATA3.h
Clock
L
L
X
L
X
Data
Command
MMC/SD
Memory Stick/
Memory Stick PRO
CS0
to
to
to
to
DATA0.h,
DATA1.h,
DATA2.h,
DATA3.h
L
L
X
H
X
X
DAT0.h
DAT1.h
DAT2.h
DAT3.h
H
H
X
X
X
X
CMD.h and CMD are Hi Z
(isolation mode).
BS.h and BS are Hi Z
(isolation mode).
L
L
L
X
X
X
CMD to CMD.h
BS to BS.h
L
L
H
X
X
X
CMD.h to CMD
BS.h to BS
H
H
X
X
X
X
All GPIOs are Hi Z.
All GPIOs are Hi Z.
L
L
X
X
X
X
I4 to O4,
I5 to O5,
I6 to O6
I4 to O4,
I5 to O5,
I6 to O6
L
L
X
X
L
X
I/O0 to I/O0.h,
I/O1 to I/O1.h
I/O0 to I/O0.h,
I/O1 to I/O1.h
L
L
X
X
H
X
I/O0.h to I/O0,
I/O1.h to I/O1
I/O0.h to I/O0,
I/O1.h to I/O1
L
L
X
X
X
L
I/O2 to I/O2.h,
I/O3 to I/O3.h
I/O2 to I/O2.h,
I/O3 to I/O3.h
L
L
X
X
X
H
I/O2.h to I/O2,
I/O3.h to I/O3
I/O2.h to I/O2,
I/O3.h to I/O3
GPIO
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DAT0,
DAT1,
DAT2,
DAT3
to
to
to
to
to
to
to
to
DATA0,
DATA1,
DATA2,
DATA3
19
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 3 - Interfacing With 8-Bit MMC
20
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SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 9. 8-Bit MMC
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
PIN FUNCTION
PIN
TYPE
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
B1
10A1
CLK.h
Clock signal from host
Input
Command signal connected to host
C1
9A
CMD.h
D1
9DIR
CMD-dir.h
Direction control for 9A/9B connected to host
Input
E1
78DIR
DATU-dir.h
Direction control for 7A/7B and 8A/8B. Connected to host.
Input
General-purpose I/O. Referenced to VCCA.
I/O
F1
7A
DAT6.h
G1
VCCA
VCCA
A2
2A
DAT1.h
Data bit 2 connected to host. Referenced to VCCA.
I/O
B2
3A
DAT2.h
Data bit 3 connected to host. Referenced to VCCA.
I/O
C2
10A2
CLK-f.h
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
D2
4A
DAT3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O
E2
6A
DAT5.h
General-purpose I/O. Referenced to VCCA.
I/O
F2
8A
DAT7.h
General-purpose I/O. Referenced to VCCA.
I/O
G2
5A
DAT4.h
General-purpose I/O. Referenced to VCCA.
A3
4DIR
DAT3-dir.h
B3
1A
DAT0.h
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Direction control for 4A/4B
Output
I/O
Input
Data bit 1 connected to host. Referenced to VCCA.
C3
I/O
Power
I/O
Depopulated ball
D3
56DIR
DATU-dir.h
Direction control for 5A/5B and 6A/6B. Referenced to VCCA.
E3
GND
GND
Ground
F3
12A
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
A4
2DIR
DAT1-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DAT2-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, and
9B1 are placed in Hi Z, and 10B1 is low.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
G4
CS1
(tie-low)
Card select signal. For proper operation, tie to GND.
Input
A5
MODE1
(tie-low)
Input
B5
MODE0
(tie-high)
MODE1, MODE0 determine mode of operation (see Table 1).
Tie MODE0 to VCCA. Tie MODE1 to GND.
C5
GND
GND
Ground
D5
4B
DAT3
Data bit 4 connected to card. Referenced to VCCB.
E5
GND
GND
Ground
F5
7B
DAT6
Data bit 6 connected to card. Referenced to VCCB.
G5
8B
DAT7
Data bit 7 connected to card. Referenced to VCCB.
A6
10B1
CLK
Clock signal connected to card
Output
B6
9B1
CMD
Command signal connected to card
Output
C6
2B
DAT1
Data bit 2 connected to card. Referenced to VCCB0.
D6
11B
DNU
Output pin not used in this mode. Leave unconnected.
Output
E6
10B2
DNU
Output pin not used in this mode. Leave unconnected.
Output
F6
5B
DAT4
Data bit 4 connected to card. Referenced to VCCB.
G6
6B
DAT5
Data bit 5 connected to card. Referenced to VCCB.
A7
VCCB0
VCCB0
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
B7
1B
DAT0
Data bit 1 connected to card. Referenced to VCCB0.
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Input
Output
Input
I/O
I/O
I/O
I/O
I/O
I/O
Power
I/O
21
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 9. 8-Bit MMC (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
C7
3B
DAT2
D7
12B
(tie-low)
E7
9B2
DNU
I/O pin not used in this mode. Leave unconnected.
F7
14B
DNU
Open-drain output not used in this mode. Leave unconnected.
Output
G7
VCCB1
VCCB1
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B and 14B. Not
used in this mode. Tie to GND.
Power
PIN
TYPE
PIN FUNCTION
Data bit 3 connected to card. Referenced to VCCB0.
I/O
Input pin not used in this mode. Tie to GND.
Input
I/O
CONFIGURATION 3 FUNCTION TABLE
(MODE0 = H, MODE1 = L, 8-BIT MMC)
SIGNAL
Clock
INPUTS
CS1
9DIR
(1-4)DIR
56DIR
78DIR
L
X
X
X
X
X
CLK.h to CLK, CLK to CLK-f.h
H
X
X
X
X
X
DAT0.h, DAT1.h, DAT2.h, DAT3.h, DAT0, DAT1, DAT2, and
DAT3 are Hi Z.
X
H
X
X
X
X
DAT4.h, DAT5.h, DAT6.h, DAT7.h, DAT4, DAT5, DAT6, and
DAT7 are Hi Z.
L
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
L
L
X
L
L
Data
Command
22
OPERATION
CS0
to
to
to
to
to
to
to
to
DAT0.h,
DAT1.h,
DAT2.h,
DAT3.h,
DAT4.h,
DAT5.h,
DAT6.h,
DAT7.h
L
L
X
H
H
H
DAT0.h
DAT1.h
DAT2.h
DAT3.h
DAT4.h
DAT5.h
DAT6.h
DAT7.h
to
to
to
to
to
to
to
to
H
X
X
X
X
X
CMD.h and CMD are Hi Z (isolation mode).
L
X
L
X
X
X
CMD to CMD.h
L
X
H
X
X
X
CMD.h to CMD
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DAT0,
DAT1,
DAT2,
DAT3,
DAT4,
DAT5,
DAT6,
DAT7
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Configuration 4 - Interfacing With SmartMedia or xD-Picture Card
A Side
B Side
VCCA
VCCB
AVCA406
Host
SmartMedia/
xD-Picture
Card
Table 10. SmartMedia or xD-Picture Card
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
A1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Power
Input
PIN FUNCTION
PIN
TYPE
B1
10A1
RE.h
Read enable connected to host
C1
9A
CLE.h
Command latch enable connected to host
D1
9DIR
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
E1
78DIR
I/O-dir.h
Data direction control from host
Input
I/O
F1
7A
I/O7.h
Data I/O 7 connected to host. Referenced to VCCA.
G1
VCCA
VCCA
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
I/O
A2
2A
I/O2.h
Data I/O 2 connected to host. Referenced to VCCA.
I/O
B2
3A
I/O3.h
Data I/O 3 connected to host. Referenced to VCCA.
I/O
Power
C2
10A2
RE-f.h
Read enable feedback to host. Used with OMAP processors. Use with other processors is
optional. Leave unconnected if not used.
D2
4A
I/O4.h
Data I/O 4 connected to host. Referenced to VCCA.
I/O
E2
6A
I/O6.h
Data I/O 6 connected to host. Referenced to VCCA.
I/O
F2
8A
I/O8.h
Data I/O 8 connected to host. Referenced to VCCA.
I/O
G2
5A
I/O5.h
Data I/O 5 connected to host. Referenced to VCCA.
I/O
A3
4DIR
I/O-dir.h
B3
1A
I/O1.h
Data direction control connected to host
Data I/O 1 connected to host. Referenced to VCCA.
C3
Output
Input
I/O
Depopulated ball
D3
56DIR
I/O-dir.h
E3
GND
GND
Data direction control connected to host
Ground
F3
12A
R/B.h
Read/busy connected to host. Open-drain output.
Input
Output
G3
11A
WP.h
Write protect connected to host
Input
A4
2DIR
I/O-dir.h
Data direction control connected to host
Input
B4
1DIR
I/O-dir.h
Data direction control connected to host
Input
C4
3DIR
I/O-dir.h
Data direction control connected to host
Input
D4
GND
GND
Ground
E4
CS0
CE.h
Chip enable from host
Input
F4
13A
WE.h
Write enable from host
Input
Address latch enable connected to host
Input
G4
CS1
ALE.h
A5
MODE1
(tie-high)
B5
MODE0
(tie-high)
MODE1, MODE0 determine mode of operation (see Table 1). Tie to VCCA.
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Input
Input
23
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Table 10. SmartMedia or xD-Picture Card (continued)
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
C5
GND
GND
Ground
PIN
TYPE
PIN FUNCTION
D5
4B
I/O4
Data I/O 4 connected to card. Referenced to VCCB.
E5
GND
GND
Ground
I/O
F5
7B
I/O7
Data I/O 7 connected to card. Referenced to VCCB.
I/O
G5
8B
I/O8
Data I/O 8 connected to card. Referenced to VCCB.
I/O
A6
10B1
RE
Read enable connected to card
Output
B6
9B1
CLE
Command latch enable connected to card
Output
C6
2B
I/O2
Data I/O 2 connected to card. Referenced to VCCB.
D6
11B
WP
Write protect connected to card
Output
E6
10B2
WE
Write enable connected to card
Output
F6
5B
I/O5
Data I/O 5 connected to card. Referenced to VCCB.
I/O
I/O
G6
6B
I/O6
Data I/O 6 connected to card. Referenced to VCCB.
A7
VCCB0
VCCB
B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1.
I/O
B7
1B
I/O1
Data I/O 1 connected to card. Referenced to VCCB.
I/O
C7
3B
I/O3
Data I/O 3 connected to card. Referenced to VCCB.
I/O
D7
12B
R/B
Read/busy connected to card
E7
9B2
ALE
Address latch enable connected to host
F7
14B
CE
Chip enable connected to card
Output
G7
VCCB1
VCCB
B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B.
Power
Input
I/O
CONFIGURATION 4 FUNCTION TABLE
(MODE0 = H, MODE1 = H, 8-BIT SmartMedia/xD-Picture Card)
SIGNAL
Clock
Data
24
Power
INPUTS
OPERATION
CS0
CS1
9DIR
(1-4)DIR
56DIR
78DIR
X
X
X
X
X
X
WE.h to WE
L
X
X
X
X
X
RE.h to RE, RE to RE-f.h
H
X
X
X
X
X
All data I/Os are Hi Z (isolation mode).
LX
X
X
L
L
L
I/O(1-8) to I/O(1-8).h
L
X
X
H
H
H
I/O(1-8).h to I/O(1-8)
Command
X
X
X
X
X
X
CLE.h to CLE, ALE.h to ALE
Interrupt request
X
X
X
X
X
X
CE.h to CE
Others
X
X
X
X
X
X
WP.h to WP, R/B to R/B.h
(R/B.h is an open-drain output)
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SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
LOGIC DIAGRAMS (POSITIVE LOGIC)
CLK Path
CTRL(1)
TP(2)
10A1
10B1
CTRL(1)
CTRL(1)
TP(2)
10B2
13A
CTRL(1)
CTRL(1)
TP(2)
10A2
TP(2)
(1) CTRL represents a decoded MODE0, MODE1, CS0, and CS1 state.
(2) Translation point
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SN74AVCA406
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Data Path
DIR
(1, 2, 3, 4)
TP(2)
CTRL(1)
CTRL(1)
A
(1, 2, 3, 4)
CTRL(1)
TP(2)
CTRL(1)
DIR
(5, 6, 7, 8)
CTRL(1)
B
(1, 2, 3, 4)
TP(2)
TP(2)
TP(2)
B
(5, 6, 7, 8)
CTRL(1)
CTRL(1)
TP(2)
A
(5, 6, 7, 8)
TP(2)
(1) CTRL represents a decoded MODE0, MODE1, CS0, and CS1 state.
(2) Translation point
26
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SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
CMD Path
9DIR
TP(2)
CTRL(1)
CTRL(1)
TP(2)
CTRL(1)
TP(2)
9A
CTRL(1)
9B1
TP(2)
TP(2)
9B2
CTRL(1)
TP(2)
CS1
(1) CTRL represents a decoded MODE0, MODE1, CS0, and CS1 state.
(2) Translation point
WP and R/B Paths
11A
TP(2)
11B
TP(2)
12B
CTRL(1)
12A
(3)
(1) CTRL represents a decoded MODE0, MODE1, CS0, and CS1 state.
(2) Translation point
(3) 12A is open drain in NAND (XD) mode and push-pull in other modes.
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SN74AVCA406
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±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
IRQ and CEout Paths
2B
CTRL(1)
CTRL(1)
(2)
6B
CS0
(1) CTRL represents a decoded MODE0, MODE1, CS0, and CS1 state.
(2) Push-pull in NAND flash (XD) mode and open drain in other modes
28
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14B
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
VCC
VI
Supply voltage range
Input voltage range (2)
MIN
MAX
VCCA, VCCB
–0.5
4.6
I/O ports (A port)
–0.5
VCCA + 0.5
I/O ports (B port)
–0.5
VCCB + 0.5
Control inputs
–0.5
4.6
UNIT
V
V
VO
Voltage range applied to any output in the
high-impedance or power-off state (2)
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
VO
Voltage range applied to any output in the high or
low state (2) (3)
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
Continuous current through VCCA, VCCB, or GND
θJA
Package thermal
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
impedance (4)
GQC/ZQC package
–65
V
V
34
°C/W
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
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SN74AVCA406
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Recommended Operating Conditions (1) (2) (3) (4)
VCCI
VCCO
MIN
MAX
UNIT
VCCA
Supply voltage
1.4
VCCB
V
VCCB
Supply voltage
1.4
3.6
V
VIH
High-level input voltage
VIL
Low-level input voltage
VI
Output voltage
IOH
High-level output current (A port)
IOL
Low-level output current (A port)
IOH
High-level output current (B port)
IOL
Low-level output current (B port)
∆t/∆t
Input transition rise or fall rate
TA
Operating free-air temperature
(5)
30
All
inputs (5)
VCCI × 0.65
1.95 V to 2.7 V
1.7
2.7 V to 3.6 V
2
V
1.4 V to 1.95 V
VCCI × 0.35
1.95 V to 2.7 V
0.7
2.7 V to 3.6 V
0.8
Input voltage
VO
(1)
(2)
(3)
(4)
All inputs (5)
1.4 V to 1.95 V
0
VCCI
Active state
0
VCCO
3-state
0
VCCO
1.4 V to 1.6 V
–1
1.65 V to 1.95 V
–2
2.3 V to 2.7 V
–4
3 V to 3.6 V
–8
1.4 V to 1.6 V
1
1.65 V to 1.95 V
2
2.3 V to 2.7 V
4
3 V to 3.6 V
8
1.4 V to 1.6 V
–2
1.65 V to 1.95 V
–4
2.3 V to 2.7 V
–8
3 V to 3.6 V
–16
1.4 V to 1.6 V
2
1.65 V to 1.95 V
4
2.3 V to 2.7 V
8
3 V to 3.6 V
16
–40
V
V
V
mA
mA
mA
mA
5
ns/V
85
°C
VCCI is the VCC associated with the data input port.
VCCO is the VCC associated with the output port.
VCCB must be greater than or equal to VCCA, except when VCCB = 0 V.
All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
All A-port I/Os and control inputs are powered by VCCA.
1B, 2B, 3B, 4B, 9B1, and 10B1 are powered by VCCB0.
5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B are powered by VCCB1.
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Electrical Characteristics
(1) (2)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –100 µA
VCCA
VCCB
1.4 V to 3.6 V
1.4 V to 3.6 V
1.4 V
1.4 V
IOH = –1 mA
VOH (A port)
IOH = –2 mA
VI = VIH
1.65 V
1.2
2.3 V
2.3 V
1.75
IOH = –8 mA
3V
3V
2.3
IOL = 100 µA
1.4 V to 3.6 V
1.4 V to 3.6 V
0.2
1.4 V
1.4 V
0.35
1.65 V
1.65 V
0.45
2.3 V
2.3 V
0.55
3V
3V
0.7
3V
3V
0.45
1.4 V to 3.6 V
1.4 V to 3.6 V
IOL = 2 mA
VI = VIL
IOL = 4 mA
IOL = 2 mA
Open-drain output (12A)
IOH = –100 µA
IOH = –2 mA
IOH = –4 mA
VI = VIH
IOH = –8 mA
1.05
1.2
2.3 V
2.3 V
1.75
2.3
V
3V
0.2
1.4 V
1.4 V
0.35
1.65 V
1.65 V
0.45
2.3 V
2.3 V
0.55
3V
3V
0.7
3V
3V
0.45
1.4 V to 3.6 V
3.6 V
±2.5
µA
0 to 3.6 V
0V
±10
µA
3.6 V
3.6 V
±10
3.6 V
0V
±10
1.6 V
1.6 V
4.5
1.95 V
1.95 V
5
IOL = 4 mA
VI = VIL
IOL = 8 mA
Control inputs
VI = VCCA or GND
14B
VO = VCCA
A or B ports
VO = VCCO or
GND,
VI = VIH or VIL
(1)
(2)
(3)
(4)
1.4 V
1.65 V
1.4 V to 3.6 V
Ioff
ICCB
1.4 V
1.65 V
3V
II
ICCA
VCCO – 0.2
1.4 V to 3.6 V
IOL = 2 mA
A port
V
IOL = 100 µA
IOL = 16 mA
IOZ (4)
V
IOH = –16 mA
IOL = 2 mA
VOL (B port)
UNIT
1.05
1.65 V
IOL = 8 mA
VOH (B port)
MAX
VCCO – 0.2
IOH = –4 mA
IOL = 1 mA
VOL (A port)
MIN TYP (3)
Open-drain output (14B)
See function table for
input states when
outputs are Hi Z
VI = VCCI or GND, IO = 0
VI = VCCI or GND, IO = 0
1.95 V
0V
2.7 V
2.7 V
5.5
5
3.6 V
0V
10
3.6 V
3.6 V
10
1.6 V
1.6 V
6.5
1.95 V
1.95 V
7
1.95 V
0V
0.5
2.7 V
2.7 V
7.5
3.6 V
0V
1
3.6 V
3.6 V
10
V
µA
µA
µA
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the data input port.
All typical values are at TA = 25°C.
For I/O ports, the parameter IOZ includes the input leakage current.
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Electrical Characteristics (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Ci
Co
Cio
VCCA
VCCB
VI = VCCA or GND
1.8 V
3V
14B
VO = VCCB or GND
1.8 V
3V
A port
VO = VCCA or GND
B port
VO = VCCB or GND
1.8 V
3V
Control inputs
Clock input
TEST CONDITIONS
MIN TYP (3)
MAX
3.5
UNIT
pF
4
17.5
pF
4.5
pF
11
Output Slew Rates (1)
over recommended operating free-air temperature range (unless otherwise noted)
VCCA = 1.8 V
± 0.15 V,
VCCB = 3 V
± 0.3 V
PARAMETER
FROM
TO
tr
10%
90%
3 (2)
ns
10%
3 (2)
ns
MIN
tf
(1)
(2)
32
90%
Values are characterized, but not production tested.
Using CL = 15 pF on the B side and CL = 7 pF on the A side. See derating curves for other load conditions.
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UNIT
MAX
SN74AVCA406
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±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Switching Characteristics
VCCA = 1.5 V ± 0.1 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
TO
(OUTPUT)
A
B
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1
7.7
1
4.9
1
4.7
1
4.4
A
1
6.3
1
5
1
5
1
5
CLK.h or SCLK.h
CLK.0 or SCLK.0
1
7.7
1
5
1
4.9
1
4.9
CLK.h or SCLK.h
CLK-f.h or SCLK-f.h
2
19
2
12
2
10
2
9.7
CMD.h
CMD.0
1
7.1
1
4.1
1
3.9
1
3.6
CMD.h
CMD.1
1
7
1
4.6
1
4.1
1
4.2
CMD.0
CMD.h
1
6.2
1
4.9
1
4.8
1
4.7
CS0
B
1
6
1
4.2
1
4.2
1
3.9
R/B
R/B.h
1
5.7
1
4.8
1
4.7
1
4.8
WE
WE.h
1
7.4
1
4.3
1
4.3
1
4.2
WP
WP.h
1
6.6
1
4.5
1
4.4
1
4.3
DAT1.0 or DATA1.0
IRQ
1
4.8
1
3.3
1
3.3
1
3.3
DAT1.1 or DATA1.1
IRQ
1
4.9
1
3.4
1
3.3
1
3.3
DIR
B
1
6.7
1
4.5
1
4.4
1
4.6
DIR
A
1
10.3
1
9.6
1
9.6
1
9.5
R/B
R/B.h (open drain)
1
5.9
1
5.4
1
5.4
1
5.4
DAT1.0 or DATA1.0
IRQ
1
6.7
1
4.9
1
5.5
1
5.5
DAT1.1 or DATA1.1
IRQ
1
6.5
1
4.7
1
5.4
1
5.4
DIR
B
1
6.9
1
6.4
1
6.4
1
6.3
DIR
A
1
5.3
1
5.3
1
5.3
1
5.2
R/B
R/B.h (open drain)
1
16.9
1
17.4
1
5.3
1
4.1
UNIT
ns
ns
ns
Maximum Frequency and Output Skew
VCCA = 1.5 V ± 0.1 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
Clock
fmax
Data
tsk(o)
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
52
52
B
A
52
52
A
B
26
26
B
A
26
A
B
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MIN
MAX
MIN
UNIT
MAX
MHz
26
1.5
1.5
ns
33
SN74AVCA406
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±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Switching Characteristics
VCCA = 1.8 V ± 0.15 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
TO
(OUTPUT)
A
B
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1
7.5
1
4.6
1
4.1
1
3.7
A
1
4.6
1
4.2
1
4.1
1
4
CLK.h or SCLK.h
CLK.0 or SCLK.0
1
8
1
4.8
1
4.3
1
4.2
CLK.h or SCLK.h
CLK-f.h or SCLK-f.h
2
17.9
2
9.4
2
8.7
2
8.3
CMD.h
CMD.0
1
7.4
1
3.7
1
3.3
1
3.3
CMD.h
CMD.1
1
6.2
1
4.4
1
3.7
1
3.5
CMD.0
CMD.h
1
4.5
1
4
1
3.8
1
3.8
CS0
B
1
6.6
1
4
1
4
1
3.8
R/B
R/B.h
1
4.4
1
4
1
3.8
1
3.8
WE
WE.h
1
7.3
1
3.9
1
3.8
1
3.7
WP
WP.h
1
5.6
1
4
1
3.6
1
3.8
DAT1.0 or DATA1.0
IRQ
1
5
1
3.3
1
3.3
1
3.3
DAT1.1 or DATA1.1
IRQ
1
4.6
1
3.1
1
3.1
1
3.1
DIR
B
1
6.4
1
3.8
1
3.6
1
3.6
DIR
A
1
7.7
1
6.9
1
6.9
1
6.9
R/B
R/B.h (open drain)
1
4.4
1
4.1
1
4.1
1
4.1
DAT1.0 or DATA1.0
IRQ
1
6.5
1
4.8
1
5.5
1
5.5
DAT1.1 or DATA1.1
IRQ
1
6.6
1
4.8
1
5.3
1
5.3
DIR
B
1
6.3
1
5.4
1
5.7
1
5.7
DIR
A
1
5.2
1
5.3
1
5.2
1
5.2
R/B
R/B.h (open drain)
1
15.9
1
19.5
1
5.6
1
3.8
UNIT
ns
ns
ns
Maximum Frequency and Output Skew
VCCA = 1.8 V ± 0.15 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
Clock
fmax
Data
tsk(o)
34
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
52
52
B
A
52
52
A
B
26
26
B
A
26
A
B
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MIN
MAX
MIN
UNIT
MAX
MHz
26
0.8
0.8
ns
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Switching Characteristics
VCCA = 2.5 V ± 0.2 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
TO
(OUTPUT)
A
B
B
A
CLK.h or SCLK.h
VCCB = 2.5 V
± 0.2 V
MIN
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
MAX
MIN
MAX
MIN
MAX
1
4
1
3.4
1
3.1
1
3.7
1
3.5
1
3.6
CLK.0 or SCLK.0
1
3.9
1
3.5
1
3.5
CLK.h or SCLK.h
CLK-f.h or SCLK-f.h
2
8.3
2
7.3
2
7
CMD.h
CMD.0
1
3.2
1
3.1
1
2.7
CMD.h
CMD.1
1
3.6
1
3
1
2.8
CMD.0
CMD.h
1
3
1
3
1
3
CS0
B
1
4.2
1
3.7
1
3.3
R/B
R/B.h
1
3.1
1
3
1
2.9
WE
WE.h
1
3.6
1
3.4
1
3
WP
WP.h
1
3.5
1
3.1
1
2.9
DAT1.0 or DATA1.0
IRQ
1
3.3
1
3.3
1
3.2
DAT1.1 or DATA1.1
IRQ
1
3.6
1
3.4
1
3.2
DIR
B
1
4.7
1
4.4
1
3.6
DIR
A
1
5.3
1
5.3
1
5.1
R/B
R/B.h (open drain)
1
3.2
1
3.1
1
3
DAT1.0 or DATA1.0
IRQ
1
7.2
1
5.4
1
5.4
DAT1.1 or DATA1.1
IRQ
1
7
1
5.4
1
5.4
DIR
B
1
4.5
1
5.1
1
5.1
DIR
A
1
3.7
1
3.7
1
3.7
R/B
R/B.h (open drain)
1
3.2
1
3.9
1
3.9
UNIT
ns
ns
ns
Maximum Frequency and Output Skew
VCCA = 2.5 V ± 0.2 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
Clock
fmax
Data
tsk(o)
VCCB = 3 V
± 0.3 V
VCCB = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
52
52
B
A
52
52
A
B
26
26
B
A
26
A
B
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MIN
MAX
MIN
UNIT
MAX
MHz
26
0.7
0.7
ns
35
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
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SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Switching Characteristics
VCCA = 3.3 V ± 0.3 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
TO
(OUTPUT)
A
B
VCCB = 3.3 V
± 0.3 V
MIN
MAX
B
1
2.9
A
1
3.8
CLK.h or SCLK.h
CLK.0 or SCLK.0
1
3.3
CLK.h or SCLK.h
CLK-f.h or SCLK-f.h
2
6.1
CMD.h
CMD.0
1
2.7
CMD.h
CMD.1
1
2.7
CMD.0
CMD.h
1
2.6
CS0
B
1
3.7
R/B
R/B.h
1
2.5
WE
WE.h
1
3
WP
WP.h
1
2.8
DAT1.0 or DATA1.0
IRQ
1
3.2
DAT1.1 or DATA1.1
IRQ
1
3.2
DIR
B
1
3.7
DIR
A
1
4.7
R/B
R/B.h (open drain)
1
4.9
DAT1.0 or DATA1.0
IRQ
1
5.3
DAT1.1 or DATA1.1
IRQ
1
5.2
DIR
B
1
5
DIR
A
1
4.7
R/B
R/B.h (open drain)
1
6
UNIT
ns
ns
ns
Maximum Frequency and Output Skew
VCCA = 3.3 V ± 0.3 V, over recommended operating free-air temperature range (see Figure 1)
PARAMETER
Clock
fmax
Data
tsk(o)
36
VCCB = 3.3 V
± 0.3 V
FROM
(INPUT)
TO
(OUTPUT)
A
B
52
B
A
52
A
B
26
B
A
26
A
B
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MIN
UNIT
MAX
MHz
0.7
ns
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SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
Operating Characteristics
VCCA = 1.8 V, VCCB = 3 V, TA = 25°C
PARAMETER
Power dissipation capacitance per transceiver,
A-port input, B-port output
CpdA
CpdB0
CpdB1
TEST CONDITIONS
Outputs enabled
Outputs disabled
TYP
CL = 0, f = 10 MHz
0.1
Power dissipation capacitance per transceiver,
B-port input, A-port output
Outputs enabled
Outputs disabled
7.5
Power dissipation capacitance per transceiver,
A-port input, B-port output
Outputs enabled
16.5
Power dissipation capacitance per transceiver,
B-port input, A-port output
Outputs enabled
Power dissipation capacitance per transceiver,
A-port input, B-port output
Outputs enabled
18
Outputs disabled
0.1
Power dissipation capacitance per transceiver,
B-port input, A-port output
Outputs enabled
Outputs disabled
CL = 0, f = 10 MHz
Outputs disabled
Outputs disabled
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UNIT
9
16
0.1
4
pF
pF
2
CL = 0, f = 10 MHz
6
pF
3
37
SN74AVCA406
MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card
±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER
www.ti.com
SCES615H – OCTOBER 2004 – REVISED JANUARY 2007
PARAMETER MEASUREMENT INFORMATION
2 × VCCO
RL
From Output
Under Test
S1
Open
GND
CL
(see Note A)
RL
LOAD CIRCUIT
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
tPLZ/tPZL (OD)
Open
2 × VCCO
GND
2 × VCCO
VCCO
CL
RL
VTP
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
15 pF
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.1 V
0.15 V
0.15 V
0.3 V
VCCA
Output
Control
(low-level
enabling)
VCCA/2
VCCA/2
0V
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
tPHL
VOH
VCCO/2
VOL
VCCO/2
tPLZ
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
VCCO/2
VOL + VTP
VOL
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPHZ
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
Figure 1. Load Circuit and Voltage Waveforms
38
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Dec-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74AVCA406DGGR
ACTIVE
TSSOP
DGG
48
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVCA406
SN74AVCA406DGGRG4
ACTIVE
TSSOP
DGG
48
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVCA406
SN74AVCA406ZQCR
NRND
BGA
MICROSTAR
JUNIOR
ZQC
48
2500
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
WM406
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
27-Dec-2019
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74AVCA406DGGR
TSSOP
DGG
48
2000
330.0
24.4
8.6
13.0
1.8
12.0
24.0
Q1
SN74AVCA406ZQCR
BGA MI
CROSTA
R JUNI
OR
ZQC
48
2500
330.0
12.4
4.3
4.3
1.5
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74AVCA406DGGR
TSSOP
DGG
48
2000
367.0
367.0
45.0
SN74AVCA406ZQCR
BGA MICROSTAR
JUNIOR
ZQC
48
2500
350.0
350.0
43.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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