Texas Instruments | SN74LVC1G98-EP (Rev. C) | Datasheet | Texas Instruments SN74LVC1G98-EP (Rev. C) Datasheet

Texas Instruments SN74LVC1G98-EP (Rev. C) Datasheet
SN74LVC1G98-EP
CONFIGURABLE MULTIPLE-FUNCTION GATE
www.ti.com
SCES462C – JUNE 2003 – REVISED OCTOBER 2006
FEATURES
•
•
•
•
•
•
•
•
•
•
(1)
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree (1)
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 6.3 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode
Operation
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
ln1
1
6
ln2
GND
2
5
VCC
ln0
3
4
Y
See mechanical drawings for dimensions.
Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
This configurable multiple-function gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G98 features configurable multiple functions. The output state is determined by eight patterns of
3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All
inputs can be connected to VCC or GND.
This device functions as an independent gate, but because of Schmitt action, it may have different input
threshold levels for positive-going (VT+) and negative-going (VT–) signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
–40°C to 85°C
(1)
PACKAGE (1)
SOT (SC-70) – DCK
Reel of 3000
ORDERABLE PART NUMBER
SN74LVC1G98IDCKREP
V62/013641-01XE
TOP-SIDE MARKING
CWR
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2006, Texas Instruments Incorporated
SN74LVC1G98-EP
CONFIGURABLE MULTIPLE-FUNCTION GATE
www.ti.com
SCES462C – JUNE 2003 – REVISED OCTOBER 2006
FUNCTION TABLE
INPUTS
In2
In1
In0
OUTPUT
Y
L
L
L
H
L
L
H
H
L
H
L
L
L
H
H
L
H
L
L
H
H
L
H
L
H
H
L
H
H
H
H
L
LOGIC DIAGRAM (POSITIVE LOGIC)
ln0
3
4
ln1
ln2
1
6
FUNCTION SELECTION TABLE
LOGIC FUNCTION
2
FIGURE NO.
2-to-1 data selector with inverted output
1
2-input NAND gate
2
2-input NOR gate with one inverted input
3
2-input AND gate with one inverted input
3
2-input NAND gate with one inverted input
4
2-input OR gate with one inverted input
4
2-input NOR gate
5
Noninverted buffer
6
Inverter
7
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Y
SN74LVC1G98-EP
CONFIGURABLE MULTIPLE-FUNCTION GATE
www.ti.com
SCES462C – JUNE 2003 – REVISED OCTOBER 2006
Figure 1. 2-to-1 Data Selector With Inverted Output
Figure 2. 2-Input NAND Gate
Figure 3. 2-Input NOR Gate With One Inverted Input
2-Input AND Gate With One Inverted Input
Figure 4. 2-Input NAND Gate With One Inverted Input
2-Input OR Gate With One Inverted Input
Figure 5. 2-Input NOR Gate
Figure 6. Noninverted Buffer
Figure 7. Inverter
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SN74LVC1G98-EP
CONFIGURABLE MULTIPLE-FUNCTION GATE
www.ti.com
SCES462C – JUNE 2003 – REVISED OCTOBER 2006
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range (2)
–0.5
6.5
V
–0.5
6.5
V
–0.5
VCC + 0.5
state (2)
UNIT
VO
Voltage range applied to any output in the high-impedance or power-off
VO
Voltage range applied to any output in the high or low state (2) (3)
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
259
°C/W
150
°C
Continuous current through VCC or GND
θJA
Package thermal
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
impedance (4)
–65
V
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions (1)
MIN
Operating
1.65
UNIT
5.5
VCC
Supply voltage
VI
Input voltage
0
5.5
V
VO
Output voltage
0
VCC
V
Data retention only
–4
VCC = 2.3 V
IOH
High-level output current
–8
–16
VCC = 3 V
–32
VCC = 1.65 V
4
VCC = 2.3 V
Low-level output current
8
16
VCC = 3 V
(1)
Operating free-air temperature
mA
24
VCC = 4.5 V
TA
mA
–24
VCC = 4.5 V
IOL
V
1.5
VCC = 1.65 V
4
MAX
32
–40
85
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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°C
SN74LVC1G98-EP
CONFIGURABLE MULTIPLE-FUNCTION GATE
www.ti.com
SCES462C – JUNE 2003 – REVISED OCTOBER 2006
Electrical Characteristics
(1)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
1.65 V
0.79
1.16
2.3 V
1.11
1.56
VT+
Positive-going
input threshold
voltage
3V
1.5
1.87
2.16
2.74
5.5 V
2.61
3.33
1.65 V
0.35
0.62
2.3 V
0.58
0.87
3V
0.84
1.19
4.5 V
1.41
1.9
5.5 V
1.87
2.29
1.65 V
0.3
0.62
2.3 V
0.4
0.8
∆VT
Hysteresis
(VT+– VT–)
VOH
(1)
1.04
5.5 V
0.71
1.11
1.2
2.3 V
1.9
IOH = –16 mA
3V
IOL = 100 µA
1.65 V to 5.5 V
0.1
IOL = 4 mA
1.65 V
0.45
IOL = 8 mA
2.3 V
0.3
0.4
VI = 5.5 V or GND,
IO = 0
One input at VCC – 0.6 V,
Other inputs at VCC or GND
V
0.55
4.5 V
VI or VO = 5.5 V
V
3.8
3V
Ioff
V
2.3
4.5 V
VI = 5.5 V or GND
V
V
2.4
IOH = –32 mA
IOL = 16 mA
UNIT
VCC – 0.1
IOH = –8 mA
ICC
Ci
0.87
0.71
1.65 V
I OL= 32 mA
∆ICC
0.53
1.65 V to 5.5 V
I OL= 24 mA
II
3V
4.5 V
IOH = –4 mA
IOH = –24 mA
VOL
MAX
4.5 V
VT–
Negative-going
input threshold
voltage
IOH = –100 µA
TYP (1)
VCC
0.55
0 V to 5.5 V
±5
µA
0V
±10
µA
1.65 V to 5.5 V
10
µA
3 V to 5.5 V
500
µA
VI = VCC or GND
3.3 V
3.5
pF
All typical values are at VCC = 3.3 V, TA = 25°C.
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SN74LVC1G98-EP
CONFIGURABLE MULTIPLE-FUNCTION GATE
www.ti.com
SCES462C – JUNE 2003 – REVISED OCTOBER 2006
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 8)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
Any In
Y
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
3.2
14.4
2
8.3
1.5
6.3
1.1
5.1
UNIT
ns
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
6
Power dissipation capacitance
TEST
CONDITIONS
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
TYP
TYP
TYP
TYP
f = 10 MHz
23
23
23
26
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UNIT
pF
SN74LVC1G98-EP
CONFIGURABLE MULTIPLE-FUNCTION GATE
www.ti.com
SCES462C – JUNE 2003 – REVISED OCTOBER 2006
PARAMETER MEASUREMENT INFORMATION
VLOAD
S1
RL
From Output
Under Test
Open
TEST
GND
CL
(see Note A)
S1
Open
VLOAD
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
RL
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VI
tr/tf
VCC
VCC
3V
VCC
£2 ns
£2 ns
£2.5 ns
£2.5 ns
VM
VLOAD
CL
RL
VD
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
30 pF
30 pF
50 pF
50 pF
1 kW
500 W
500 W
500 W
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tW
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
VOH
Output
VM
VOL
tPHL
VM
VM
0V
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VM
tPZL
tPHL
VM
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + VD
VOL
tPHZ
VM
VOH – VD
VOH
»0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 8. Load Circuit and Voltage Waveforms
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PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74LVC1G98IDCKREP
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
CWR
V62/03641-01XE
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
CWR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2019
OTHER QUALIFIED VERSIONS OF SN74LVC1G98-EP :
• Catalog: SN74LVC1G98
• Automotive: SN74LVC1G98-Q1
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
SN74LVC1G98IDCKREP
Package Package Pins
Type Drawing
SC70
DCK
6
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
3000
180.0
8.4
Pack Materials-Page 1
2.41
B0
(mm)
K0
(mm)
P1
(mm)
2.41
1.2
4.0
W
Pin1
(mm) Quadrant
8.0
Q3
PACKAGE MATERIALS INFORMATION
www.ti.com
25-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74LVC1G98IDCKREP
SC70
DCK
6
3000
202.0
201.0
28.0
Pack Materials-Page 2
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