Texas Instruments | SN74BCT760-EP (Rev. B) | Datasheet | Texas Instruments SN74BCT760-EP (Rev. B) Datasheet

Texas Instruments SN74BCT760-EP (Rev. B) Datasheet
SN74BCT760-EP
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
www.ti.com
SCBS817B – JULY 2006 – REVISED SEPTEMBER 2006
FEATURES
•
•
•
•
•
•
•
•
•
(1)
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree (1)
Open-Collector Version of 'BCT244
Open-Collector Outputs Drive Bus Lines or
Buffer Memory Address Registers
ESD Protection Exceeds 2000 V Per
MIL-STD-883C Method 3015
Available In Plastic Small-Outline (DW)
Package
DW PACKAGE
(TOP VIEW)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
DESCRIPTION/ORDERING INFORMATION
The SN74BCT760 octal buffer and line driver is designed specifically to improve both the performance and
density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The SN74BCT760 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When
OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
The device is characterized for operation over the full military temperature range of –55°C to 125°C.
ORDERING INFORMATION
PACKAGE (1)
TA
–55°C to 125°C
(1)
SOIC – DW
ORDERABLE PART NUMBER
Tape and reel
SN74BCT760MDWREP
TOP-SIDE MARKING
BCT760MEP
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
SN74BCT760-EP
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
www.ti.com
SCBS817B – JULY 2006 – REVISED SEPTEMBER 2006
LOGIC SYMBOL(1)
1
EN
1OE
2
18
4
16
6
14
8
12
1Y1
1A1
1Y2
1A2
1Y3
1A3
1Y4
1A4
19
EN
2OE
11
9
13
7
15
5
17
3
2Y1
2A1
2A2
2Y2
2A3
2Y3
2A4
(1)
2Y4
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
LOGIC DIAGRAM (POSITIVE LOGIC)
1
1OE
1A1
2
18
4
16
6
14
8
12
1A2
1Y1
1Y2
1Y3
1A3
1Y4
1A4
19
2OE
11
9
13
7
15
5
17
3
2A1
2A2
2A3
2A4
2
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2Y1
2Y2
2Y3
2Y4
SN74BCT760-EP
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
www.ti.com
SCBS817B – JULY 2006 – REVISED SEPTEMBER 2006
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
7
V
VI
Input voltage range (2)
–0.5
7
V
II
Input current range
–30
5
mA
VO
Voltage range applied to any output in the disabled or power-off state
–0.5
5.5
V
VO
Voltage range applied to any output in the high state
–0.5
VCC
V
96
mA
Operating free-air temperature range (3)
–55
125
°C
Storage temperature range
–65
150
°C
Current into any output in the low state
Tstg
(1)
(2)
(3)
UNIT
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The negative input voltage rating may be exceeded if the input clamp current rating is observed.
Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of
overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging.
Recommended Operating Conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
0.8
V
VOH
High-level output voltage
5.5
V
IIK
Input clamp current
–18
mA
IOL
Low-level output current
48
mA
TA
Operating free-air temperature
125
°C
MAX
UNIT
–1.2
V
2
V
V
–55
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
VCC = 4.5 V,
II = –18 mA
VOL
VCC = 4.5 V,
IOL = 48 mA
II
VCC = 5.5 V,
IIH
MIN
TYP (1)
0.55
V
VI = 7 V
0.1
mA
VCC = 5.5 V,
VI = 2.7 V
20
µA
IIL
VCC = 5.5 V,
VI = 0.5 V
–1
mA
IOH
VCC = 4.5 V,
VOH = 5.5 V
0.1
mA
ICC
(1)
TEST CONDITIONS
VCC = 5.5 V,
Outputs open
0.38
Outputs high
21
33
Outputs low
48
76
OE disabled
6
10
mA
Ci
VCC = 5 V,
VI = 2.5 V or 0.5 V
6
pF
Co
VCC = 5 V,
VI = 2.5 V or 0.5 V
10
pF
All typical values are at VCC = 5 V, TA = 25°C.
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3
SN74BCT760-EP
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
www.ti.com
SCBS817B – JULY 2006 – REVISED SEPTEMBER 2006
Switching Characteristics
FROM
(INPUT)
PARAMETER
tPLH
tPHL
tPLH
tPHL
(1)
VCC = 5 V,
CL = 50 pF,
RL = 500 Ω,
TA = 25°C
TO
(OUTPUT)
Any A
Y
OE
Y
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX (1)
MIN
TYP
MAX
MIN
MAX
6.3
8
9.5
6.3
11.1
2.1
4.3
6.5
2.1
7.7
8.6
13
15.2
8.6
18.7
3.2
6.2
8.9
3.2
10.4
For conditions shown as MIN or MAX, use the appropriate values specified under recommended operating conditions.
SN74BCT760MDWREP Operating Life Derating Chart
1000
Wirebond Voiding
Fail Mode
Years estimated life
100
Electromigration Fail Mode
10
1
0.1
100
110
120
130
140
150
160
170
180
Continuous Tj (°C)
4
A.
See datasheet for absolute maximum ratings and minimum recommended operating conditions.
B.
Silicon operating life design goal is 10 years at 10°C junction temperature (does not include package interconnect
life).
C.
Enhanced plastic product disclaimer applies.
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UNIT
ns
ns
SN74BCT760-EP
OCTAL BUFFER/DRIVER
WITH OPEN-COLLECTOR OUTPUTS
www.ti.com
SCBS817B – JULY 2006 – REVISED SEPTEMBER 2006
PARAMETER MEASUREMENT INFORMATION
VCC
RL
From Output
Under Test
Test
Point
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3V
1.5 V
Input
1.5 V
0V
tPHL
tPLH
VOH
In-Phase
Output
1.5 V
1.5 V
VOL
tPLH
tPHL
Out-of-Phase
Output
VOH
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
A.
CL includes probe and jig capacitance.
B.
All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
C.
The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
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5
PACKAGE OPTION ADDENDUM
www.ti.com
31-May-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
SN74BCT760MDWREP
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125
BCT760MEP
V62/06672-01XE
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125
BCT760MEP
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
31-May-2014
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74BCT760-EP :
• Catalog: SN74BCT760
• Military: SN54BCT760
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Military - QML certified for Military and Defense Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
SN74BCT760MDWREP
Package Package Pins
Type Drawing
SOIC
DW
20
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
10.8
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
13.3
2.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74BCT760MDWREP
SOIC
DW
20
2000
367.0
367.0
45.0
Pack Materials-Page 2
PACKAGE OUTLINE
DW0020A
SOIC - 2.65 mm max height
SCALE 1.200
SOIC
C
10.63
TYP
9.97
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
20
1
13.0
12.6
NOTE 3
18X 1.27
2X
11.43
10
11
B
7.6
7.4
NOTE 4
20X
0.51
0.31
0.25
C A B
2.65 MAX
0.33
TYP
0.10
SEE DETAIL A
0.25
GAGE PLANE
0 -8
0.3
0.1
1.27
0.40
DETAIL A
TYPICAL
4220724/A 05/2016
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side.
5. Reference JEDEC registration MS-013.
www.ti.com
EXAMPLE BOARD LAYOUT
DW0020A
SOIC - 2.65 mm max height
SOIC
20X (2)
SYMM
1
20
20X (0.6)
18X (1.27)
SYMM
(R0.05)
TYP
10
11
(9.3)
LAND PATTERN EXAMPLE
SCALE:6X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4220724/A 05/2016
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DW0020A
SOIC - 2.65 mm max height
SOIC
20X (2)
SYMM
1
20
20X (0.6)
18X (1.27)
SYMM
11
10
(9.3)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:6X
4220724/A 05/2016
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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