Texas Instruments | SN74LVTH162245-EP (Rev. A) | Datasheet | Texas Instruments SN74LVTH162245-EP (Rev. A) Datasheet

Texas Instruments SN74LVTH162245-EP (Rev. A) Datasheet
 SCBS782A − NOVEMBER 2003 − JULY 2006
D Controlled Baseline
D
D
D
D
D
D
D
D
D
D
D
D
D Latch-Up Performance Exceeds 500 mA Per
− One Assembly/Test Site, One Fabrication
Site
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree†
Member of the Texas Instruments
Widebus  Family
A-Port Outputs Have Equivalent 22-Ω
Series Resistors, So No External Resistors
Are Required
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V VCC )
Supports Unregulated Battery Operation
Down to 2.7 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Ioff and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
D
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
DGG OR DL PACKAGE
(TOP VIEW)
1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
† Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
description/ordering information
The SN74LVTH162245 is a 16-bit (dual-octal) noninverting 3-state transceiver designed for low-voltage (3.3-V)
VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
This device can be used as two 8-bit transceivers or one 16-bit transceiver. The device allows data transmission
from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control
(DIR) input. The output-enable (OE) input can be used to disable the device so that the buses effectively are
isolated.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright  2006 Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#'
+&%#$ %! # $('%%"#$ (' #,' #'!$ '-"$ $#&!'#$
$#"+"+ .""#/ +&%# (%'$$0 +'$ # '%'$$"*/ %*&+'
#'$#0 "** (""!'#'$
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1
SCBS782A − NOVEMBER 2003 − JULY 2006
description/ordering information (continued)
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors
to reduce overshoot and undershoot.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
−40°C to 85°C
TSSOP − DGG
Tape and reel
CLVTH162245IDGGREP
LH162245EP
−55°C to 125°C
SSOP − DL
Tape and reel
CLVTH162245MDLREP
LVTH162245EP
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
36
13
1B1
To Seven Other Channels
2
POST OFFICE BOX 655303
2OE
To Seven Other Channels
• DALLAS, TEXAS 75265
2B1
SCBS782A − NOVEMBER 2003 − JULY 2006
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high state, VO (see Note 1) . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Current into any output in the low state, IO: B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Current into any output in the high state, IO (see Note 2): B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA
A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction
of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging.
recommended operating conditions (see Note 5)
MIN
MAX
2.7
3.6
UNIT
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
0.8
V
Input voltage
5.5
V
IOH
High-level output current
IOL
Low-level output current
∆t/∆v
Input transition rise or fall rate
∆t/∆VCC
Power-up ramp rate
TA
High-level input voltage
2
V
A port
−12
B port
−32
A port
12
B port
64
Outputs enabled
10
mA
mA
ns/V
µs/V
200
Operating free-air temperature
V
SN74LVTH162245I
−40
85
SN74LVTH162245M
−55
125
°C
NOTE 5: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report,
Implications of Slow or Floating CMOS Inputs (SCBA004).
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3
SCBS782A − NOVEMBER 2003 − JULY 2006
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
A port
VOH
B port
A port
VOL
TEST CONDITIONS
MAX
UNIT
−1.2
V
II = −18 mA
IOH = −100 µA
VCC = 3 V,
VCC = 2.7 V to 3.6 V,
IOH = −12 mA
IOH = −100 µA
VCC = 2.7 V,
VCC = 3 V,
IOH = −8 mA
IOH = −32 mA
VCC = 2.7 V to 3.6 V,
VCC = 3 V,
IOL = 100 µA
IOL = 12 mA
0.2
0.2
VCC = 2.7 V
IOL = 100 µA
IOL = 24 mA
IOL = 16 mA
IOL = 32 mA
0.4
VCC = 3 V
Control inputs
VCC = 3.6 V,
VCC = 0 V or 3.6 V,
A or B port‡
VCC = 3.6 V
VCC − 0.2
2
VCC − 0.2
2.4
V
2
0.8
0.5
VCC = 0 V,
VCC = 3 V
VCC = 3.6 V§,
±1
10
VI = VCC
VI = 0
5
VI = 2 V
A or B port
0.55
VI = 5.5 V
VI = 5.5 V
VI or VO = 0 to 4.5 V
VI = 0.8 V
V
0.5
IOL = 64 mA
VI = VCC or GND
II
II(hold)
TYP†
VCC = 2.7 V,
VCC = 2.7 V to 3.6 V,
B port
Ioff
MIN
20
µA
−10
±100
µA
75
−75
500
−750
VI = 0 to 3.6 V
µA
IOZPU
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V, OE = don’t care
±100
µA
IOZPD
VCC = 1.5 V to 0 V, VO = 0.5 V to 3 V, OE = don’t care
±100
µA
ICC
VCC = 3.6 V, IO = 0 V,
VI = VCC or GND
Outputs high
∆ICC¶
Ci
VCC = 3 V to 3.6 V, One input at
VCC − 0.6 V, Other inputs at
VCC or GND
0.19
Outputs low
5
Outputs disabled
mA
0.19
SN74LVTH162245I
0.2
SN74LVTH162245M
0.3
mA
VI = 3 V or 0 V
VO = 3 V or 0 V
4
pF
Cio
10
pF
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ Unused pins at VCC or GND
§ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
4
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SCBS782A − NOVEMBER 2003 − JULY 2006
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN74LVTH162245I
PARAMETER
FROM
(INPUT)
VCC = 3.3 V
±0.3 V
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
B
tPZH
tPZL
OE
A
tPHZ
tPLZ
OE
B
tPHZ
tPLZ
OE
A
tsk(o)
† All typical values are at VCC = 3.3 V, TA = 25°C.
SN74LVTH162245M
VCC = 2.7 V
MIN
TYP†
MAX
1
2.3
1
2.2
1
MIN
VCC = 3.3 V
±0.3 V
VCC = 2.7 V
MAX
MIN
MAX
3.3
3.7
1
3.5
4
3.3
3.5
1
3.5
3.9
2.8
4
4.6
1
4.3
5.3
1
2.5
3.4
3.6
1
4.2
4.5
1
2.8
4.6
5.4
1
4.8
5.9
1
3
4.6
5.2
1
4.8
5.5
1
3.3
5.3
6.3
1
5.5
7.2
1
3.3
5.1
5.8
1
7.2
6.4
1.5
3.8
5.2
5.5
1.5
6.4
5.8
1.5
3.5
5.1
5.4
1.5
5.8
5.8
1.5
4
5.6
5.9
1.5
5.8
6.5
1.5
3.8
5.5
5.5
1.2
6.3
6.3
0.5
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MIN
UNIT
MAX
ns
ns
ns
ns
ns
ns
ns
5
SCBS782A − NOVEMBER 2003 − JULY 2006
PARAMETER MEASUREMENT INFORMATION
500 Ω
From Output
Under Test
6V
Open
S1
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
2.7 V
LOAD CIRCUIT
Timing Input
1.5 V
0V
tw
tsu
2.7 V
1.5 V
Input
1.5 V
th
2.7 V
Data Input
1.5 V
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
1.5 V
Input
1.5 V
0V
tPHL
tPLH
VOH
1.5 V
Output
1.5 V
VOL
1.5 V
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
tPLZ
tPZL
3V
1.5 V
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
tPZH
VOH
Output
Output
Waveform 1
S1 at 6 V
(see Note B)
tPLH
tPHL
2.7 V
Output
Control
1.5 V
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
CLVTH162245IDGGREP
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CLVTH162245MDLREP
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
V62/04709-01XE
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
V62/04709-02YE
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVTH162245-EP :
SN74LVTH162245
• Catalog:
• Military: SN54LVTH162245
NOTE: Qualified Version Definitions:
- TI's standard catalog product
• Catalog
• Military - QML certified for Military and Defense Applications
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
CLVTH162245IDGGREP
TSSOP
DGG
48
2000
330.0
24.4
8.6
15.8
1.8
12.0
24.0
Q1
CLVTH162245MDLREP
SSOP
DL
48
1000
330.0
32.4
11.35
16.2
3.1
16.0
32.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CLVTH162245IDGGREP
TSSOP
DGG
48
2000
346.0
346.0
41.0
CLVTH162245MDLREP
SSOP
DL
48
1000
346.0
346.0
49.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
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MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
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