Texas Instruments | SN74AVC20T245 20-Bit Dual-Supply Bus Transceiver (Rev. F) | Datasheet | Texas Instruments SN74AVC20T245 20-Bit Dual-Supply Bus Transceiver (Rev. F) Datasheet

Texas Instruments SN74AVC20T245 20-Bit Dual-Supply Bus Transceiver (Rev. F) Datasheet
 SCES566F − MAY 2004 − REVISED APRIL 2005
D Control Inputs VIH/VIL Levels are
D
D
D
D
D
D
D
D
DGG OR DGV PACKAGE
(TOP VIEW)
Referenced to VCCA Voltage
VCC Isolation Feature − If Either VCC Input
Is at GND, Both Ports Are in the
High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
Ioff Supports Partial-Power-Down Mode
Operation
I/Os Are 4.6-V Tolerant
Max Data Rates
− 380 Mbps (1.8-V to 3.3-V Translation)
− 260 Mbps (< 1.8-V to 3.3-V Translation)
− 260 Mbps (Translate to 2.5 V)
− 210 Mbps (Translate to 1.8 V)
− 120 Mbps (Translate to 1.5 V)
− 100 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 8000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
1B7
GND
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCCB
2B7
2B8
GND
2B9
2B10
2DIR
description/ordering information
This 20-bit noninverting bus transceiver uses two
separate configurable power-supply rails.
1
56
2
55
3
54
4
53
5
52
6
51
7
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCCA
2A7
2A8
GND
2A9
2A10
2OE
The SN74AVC20T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with
VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from
1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This
allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V
voltage nodes.
ORDERING INFORMATION
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
TSSOP − DGG
Tape and reel
SN74AVC20T245DGGR
AVC20T245
TVSOP − DGV
Tape and reel
SN74AVC20T245DGVR
WG245
VFBGA − GQL
SN74AVC20T245GQLR
VFBGA − ZQL (Pb-free)
Tape and reel
SN74AVC20T245ZQLR
WG245
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2005, Texas Instruments Incorporated
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description/ordering information (continued)
The SN74AVC20T245 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input is used to disable the outputs so that the buses are
isolated.
The SN74AVC20T245 is designed so that the control (1DIR, 2DIR, 1OE, and 2OE) inputs are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
GQL OR ZQL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
terminal assignments
1
2
3
4
5
6
A
A
1B1
1B2
1DIR
1OE
1A2
1A1
B
B
1B3
1B4
GND
GND
1A4
1A3
C
1B5
1B6
1A5
1B7
1B8
VCCA
GND
1A6
D
VCCB
GND
1A8
1A7
E
1B9
1B10
1A10
1A9
F
2B1
2B2
2A2
2A1
G
2B3
2B4
GND
GND
2A4
2A3
C
D
E
F
G
H
2B5
2B6
2B7
2B8
VCCA
GND
2A5
J
VCCB
GND
2A6
H
2A8
2A7
J
K
2B9
2B10
2DIR
2OE
2A10
2A9
K
FUNCTION TABLE
(each 10-bit section)
INPUTS
2
OPERATION
OE
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
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logic diagram (positive logic)
1DIR
1
2DIR
56
1A1
29
1OE
55
2A1
2
28
2OE
42
15
1B1
2B1
To Nine Other Channels
To Nine Other Channels
Pin numbers shown are for the DGG and DGV packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCA + 0.5 V
(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCB + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each VCCA, VCCB, and GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48°C/W
GQL/ZQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
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recommended operating conditions (see Notes 4 through 8)
VCCI
VCCA
VCCB
VCCO
MIN
MAX
Supply voltage
1.2
3.6
V
Supply voltage
1.2
3.6
V
VCCI × 0.65
1.6
1.2 V to 1.95 V
VIH
High-level input
voltage
Data inputs
(see Note 7)
1.95 V to 2.7 V
2.7 V to 3.6 V
VIL
Data inputs
(see Note 7)
VCCI × 0.35
0.7
1.95 V to 2.7 V
2.7 V to 3.6 V
VIH
VIL
VI
VO
IOH
IOL
∆t/∆v
DIR
(referenced to VCCA)
(see Note 8)
High-level input
voltage
DIR
(referenced to VCCA)
(see Note 8)
Low-level input
voltage
V
0.8
VCCA × 0.65
1.6
1.2 V to 1.95 V
1.95 V to 2.7 V
2.7 V to 3.6 V
V
2
VCCA × 0.35
0.7
1.2 V to 1.95 V
1.95 V to 2.7 V
2.7 V to 3.6 V
V
0.8
Input voltage
Output voltage
V
2
1.2 V to 1.95 V
Low-level input
voltage
UNIT
0
3.6
V
Active state
0
3-state
0
VCCO
3.6
V
High-level output current
Low-level output current
1.2 V
−3
1.4 V to 1.6 V
−6
1.65 V to 1.95 V
−8
2.3 V to 2.7 V
−9
3 V to 3.6 V
−12
1.2 V
3
1.4 V to 1.6 V
6
1.65 V to 1.95 V
8
2.3 V to 2.7 V
9
3 V to 3.6 V
12
Input transition rise or fall rate
5
mA
mA
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTES: 4. VCCI is the VCC associated with the data input port.
5. VCCO is the VCC associated with the output port.
6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
7. For VCCI values not specified in the data sheet, VIH(min) = VCCI x 0.7 V, VIL(max) = VCCI x 0.3 V.
8. For VCCI values not specified in the data sheet, VIH(min) = VCCA x 0.7 V, VIL(max) = VCCA x 0.3 V.
4
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electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Notes 9 and 10)
PARAMETER
TEST CONDITIONS
1.2 V to 3.6 V
1.2 V to 3.6 V
1.2 V
1.2 V
1.4 V
1.4 V
1.05
1.65 V
1.65 V
1.2
IOH = −9 mA
IOH = −12 mA
2.3 V
2.3 V
1.75
3V
3V
2.3
IOL = 100 µA
IOL = 3 mA
1.2 V to 3.6 V
1.2 V to 3.6 V
1.2 V
1.2 V
IOH = −6 mA
IOH = −8 mA
IOL = 6 mA
IOL = 8 mA
VOL
VI = VIH
VI = VIL
IOL = 9 mA
IOL = 12 mA
II
Control
inputs
VI = VCCA or GND
A or B
port
Ioff
IOZ†
A or B
port
A or B
ports
ICCA
Cio
VO = VCCO or
GND,
VI = VCCI or GND
A or B
ports
MIN
MAX
UNIT
VCCO − 0.2 V
0.95
V
0.2
0.15
1.4 V
1.4 V
0.35
1.65 V
1.65 V
0.45
2.3 V
2.3 V
0.55
3V
3V
0.7
1.2 V to 3.6 V
1.2 V to 3.6 V
0V
±0.025
±0.25
±1
0 to 3.6 V
±0.1
±1
±5
0 to 3.6 V
0V
±0.1
±1
±5
3.6 V
3.6 V
±0.5
±2.5
±5
1.2 V to 3.6 V
1.2 V to 3.6 V
35
V
µA
A
µA
OE = VIH
µA
µA
0V
3.6 V
−5
3.6 V
0V
35
1.2 V to 3.6 V
1.2 V to 3.6 V
35
0V
3.6 V
35
3.6 V
0V
−5
1.2 V to 3.6 V
1.2 V to 3.6 V
65
VI = 3.3 V or GND
3.3 V
3.3 V
3.5
pF
VO = 3.3 V or GND
3.3 V
3.3 V
7
pF
VI = VCCI or GND,
ICCA ) ICCB
Control
Ci
inputs
MIN
VI or VO = 0 to 3.6 V
VI = VCCI or GND,
ICCB
−40°C to 85°C
VCCB
IOH = −100 µA
IOH = −3 mA
VOH
TA = 25°C
TYP
MAX
VCCA
VI = VCCI or GND,
IO = 0
IO = 0
IO = 0
µA
µA
† For I/O ports, the parameter IOZ includes the input leakage current.
NOTES: 9. VCCO is the VCC associated with the output port.
10. VCCI is the VCC associated with the input port.
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SCES566F − MAY 2004 − REVISED APRIL 2005
switching characteristics over recommended operating free-air temperature range,
VCCA = 1.2 V (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
A
tPZH
tPZL
OE
B
tPHZ
tPLZ
OE
A
tPHZ
tPLZ
OE
B
VCCB = 1.2 V
TYP
VCCB = 1.5 V
TYP
VCCB = 1.8 V
TYP
VCCB = 2.5 V
TYP
VCCB = 3.3 V
TYP
3.8
3.1
2.8
2.7
3.3
3.8
3.1
2.8
2.7
3.3
4.1
3.8
3.6
3.5
3.4
4.1
3.8
3.6
3.5
3.4
6.5
6.5
6.5
6.5
6.5
6.5
6.5
6.5
6.5
6.5
5.6
4.4
3.8
3.3
3.2
5.6
4.4
3.8
3.3
3.2
6.4
6.4
6.4
6.4
6.4
6.4
6.4
6.4
6.4
6.4
5.7
4.6
4.7
4.1
5.4
5.7
4.6
4.7
4.1
5.4
UNIT
ns
ns
ns
ns
ns
ns
switching characteristics over recommended operating free-air temperature range,
VCCA = 1.5 V ± 0.1 V (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
A
tPZH
tPZL
OE
B
tPHZ
tPLZ
OE
A
tPHZ
tPLZ
OE
B
PARAMETER
6
VCCB = 1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
TYP
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
3.8
0.5
6.4
0.5
5.4
0.5
4.3
0.5
3.9
3.8
0.5
6.4
0.5
5.4
0.5
4.3
0.5
3.9
3.1
0.5
6.4
0.5
6.1
0.5
5.8
0.5
5.7
3.1
0.5
6.4
0.5
6.1
0.5
5.8
0.5
5.7
4.3
1.5
10.3
1.5
10.3
1.5
10.2
1.5
10.2
4.3
1.5
10.3
1.5
10.3
1.5
10.2
1.5
10.2
5.2
1
10.3
1
8.4
0.5
6.1
0.5
5.3
5.2
1
10.3
1
8.4
0.5
6.1
0.5
5.3
4.5
2
9
2
9
2
9
2
9
4.5
2
9
2
9
2
9
2
9
5.1
1.5
9
1.5
7.8
1
6.4
1
5.9
5.1
1.5
9
1.5
7.8
1
6.4
1
5.9
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UNIT
ns
ns
ns
ns
ns
ns
SCES566F − MAY 2004 − REVISED APRIL 2005
switching characteristics over recommended operating free-air temperature range,
VCCA = 1.8 V ± 0.15 V (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
A
tPZH
tPZL
OE
B
tPHZ
tPLZ
OE
A
tPHZ
tPLZ
OE
B
PARAMETER
VCCB = 1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
TYP
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
3.6
0.5
6.1
0.5
5
0.5
3.9
0.5
3.5
3.6
0.5
6.1
0.5
5
0.5
3.9
0.5
3.5
2.8
0.5
5.4
0.5
5
0.5
4.7
0.5
4.6
2.8
0.5
5.4
0.5
5
0.5
4.7
0.5
4.6
3.4
1
8.1
1
7.9
1
7.9
1
7.9
3.4
1
8.1
1
7.9
1
7.9
1
7.9
5
0.5
10
0.5
7.9
0.5
5.7
0.5
4.8
5
0.5
10
0.5
7.9
0.5
5.7
0.5
4.8
4.1
2
7.4
2
7.4
2
7.4
2
7.4
4.1
2
7.4
2
7.4
2
7.4
2
7.4
4.9
1.5
8.7
1.5
7.4
1
5.8
1
5.1
4.9
1.5
8.7
1.5
7.4
1
5.8
1
5.1
UNIT
ns
ns
ns
ns
ns
ns
switching characteristics over recommended operating free-air temperature range,
VCCA = 2.5 V ± 0.2 V (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
A
tPZH
tPZL
OE
B
tPHZ
tPLZ
OE
A
tPHZ
tPLZ
OE
B
PARAMETER
VCCB = 1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
TYP
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
3.5
0.5
5.8
0.5
4.7
0.5
3.5
0.5
3
3.5
0.5
5.8
0.5
4.7
0.5
3.5
0.5
3
2.7
0.5
4.3
0.5
3.9
0.5
3.5
0.5
3.4
2.7
0.5
4.3
0.5
3.9
0.5
3.5
0.5
3.4
2.5
0.5
5.4
0.5
5.3
0.5
5.2
0.5
5.2
2.5
0.5
5.4
0.5
5.3
0.5
5.2
0.5
5.2
4.8
0.5
9.6
0.5
7.6
0.5
5.3
0.5
4.3
4.8
0.5
9.6
0.5
7.6
0.5
5.3
0.5
4.3
3
1.1
5.2
1.1
5.2
1.1
5.2
1.1
5.2
3
1.1
5.2
1.1
5.2
1.1
5.2
1.1
5.2
4.7
1.2
8.2
1.2
6.9
1
5.3
1
5
4.7
1.2
8.2
1.2
6.9
1
5.3
1
5
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
ns
ns
ns
7
SCES566F − MAY 2004 − REVISED APRIL 2005
switching characteristics over recommended operating free-air temperature range,
VCCA = 3.3 V ± 0.3 V (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
A
tPZH
tPZL
OE
B
tPHZ
tPLZ
OE
A
tPHZ
tPLZ
OE
B
PARAMETER
VCCB = 1.2 V
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
TYP
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
3.4
0.5
5.7
0.5
4.6
0.5
3.4
0.5
2.9
3.4
0.5
5.7
0.5
4.6
0.5
3.4
0.5
2.9
3.3
0.5
3.9
0.5
3.5
0.5
3
0.5
2.9
3.3
0.5
3.9
0.5
3.5
0.5
3
0.5
2.9
2.2
0.5
4.4
0.5
4.3
0.5
4.2
0.5
4.1
2.2
0.5
4.4
0.5
4.3
0.5
4.2
0.5
4.1
4.7
1
9.6
0.5
7.5
0.5
5.1
0.5
4.1
4.7
1
9.6
0.5
7.5
0.5
5.1
0.5
4.1
3.4
0.8
5
0.8
5
0.8
5
0.8
5
3.4
0.8
5
0.8
5
0.8
5
0.8
5
4.6
1.2
8.1
1.2
6.7
1
5.1
0.8
5
4.6
1.2
8.1
1.2
6.7
1
5.1
0.8
5
UNIT
ns
ns
ns
ns
ns
ns
operating characteristics, TA = 25°C
VCCA =
VCCB = 1.2 V
VCCA =
VCCB = 1.5 V
VCCA =
VCCB = 1.8 V
VCCA =
VCCB = 2.5 V
VCCA =
VCCB = 3.3 V
TYP
TYP
TYP
TYP
TYP
1
1
1
1
2
1
1
1
1
1
12
13
14
15
16
Outputs
Disabled
1
1
1
1
1
Outputs
Enabled
13
13
14
15
16
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
PARAMETER
TEST
CONDITIONS
Outputs
Enabled
A to B
CpdA†
Outputs
Disabled
Outputs
Enabled
B to A
A to B
CpdB†
Outputs
Disabled
Outputs
Enabled
B to A
CL = 0,
f = 10 MHz,
tr = tf =1 ns
CL = 0,
f = 10 MHz,
tr = tf =1 ns
Outputs
Disabled
pF
pF
† Power-dissipation capacitance per transceiver
8
UNIT
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCES566F − MAY 2004 − REVISED APRIL 2005
typical total static power consumption (ICCA + ICCB)
TABLE 1
VCCB
VCCA
0V
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
0V
0
< 0.5
< 0.5
< 0.5
< 0.5
< 0.5
1.2 V
< 0.5
<1
<1
<1
<1
1
1.5 V
< 0.5
<1
<1
<1
<1
1
1.8 V
< 0.5
<1
<1
<1
<1
<1
2.5 V
< 0.5
1
<1
<1
<1
<1
3.3 V
< 0.5
1
<1
<1
<1
<1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
µA
A
9
SCES566F − MAY 2004 − REVISED APRIL 2005
TYPICAL CHARACTERISTICS
6
6
5
5
4
4
tPHL − ns
tPLH − ns
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 1.2 V
3
2
2
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
1
3
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
1
VCCB = 2.5 V
VCCB = 3.3 V
0
0
10
20
30
40
50
VCCB = 2.5 V
VCCB = 3.3 V
0
60
0
10
20
CL − pF
30
40
50
60
CL − pF
Figure 1
Figure 2
6
6
5
5
4
4
tPHL − ns
tPLH − ns
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 1.5 V
3
2
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
1
3
2
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
1
VCCB = 2.5 V
VCCB = 3.3 V
0
0
10
20
30
40
50
60
VCCB = 2.5 V
VCCB = 3.3 V
0
0
10
CL − pF
30
CL − pF
Figure 3
10
20
Figure 4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
40
50
60
SCES566F − MAY 2004 − REVISED APRIL 2005
6
6
5
5
4
4
tPHL − ns
tPLH − ns
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 1.8 V
3
2
2
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
1
3
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
1
VCCB = 2.5 V
VCCB = 3.3 V
0
0
10
20
30
40
50
VCCB = 2.5 V
VCCB = 3.3 V
0
60
0
10
20
CL − pF
30
40
50
60
40
50
60
CL − pF
Figure 5
Figure 6
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 2.5 V
6
6
5
5
4
VCCB = 2.5 V
VCCB = 3.3 V
4
tPHL − ns
tPLH − ns
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
3
2
VCCB = 1.2 V
VCCB = 1.5 V
1
VCCB = 1.8 V
3
2
1
VCCB = 2.5 V
VCCB = 3.3 V
0
0
10
20
30
40
50
60
0
0
10
CL − pF
20
30
CL − pF
Figure 7
Figure 8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
SCES566F − MAY 2004 − REVISED APRIL 2005
TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE
TA = 25°C, VCCA = 3.3 V
6
6
5
5
4
VCCB = 2.5 V
VCCB = 3.3 V
4
tPHL − ns
tPLH − ns
VCCB = 1.2 V
VCCB = 1.5 V
VCCB = 1.8 V
3
2
3
2
VCCB = 1.2 V
VCCB = 1.5 V
1
VCCB = 1.8 V
VCCB = 2.5 V
VCCB = 3.3 V
0
0
10
20
30
40
50
60
1
0
0
10
CL − pF
30
CL − pF
Figure 9
12
20
Figure 10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
40
50
60
SCES566F − MAY 2004 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
2 × VCCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2
Input
VCCO
1.2 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
CL
RL
15 pF
15 pF
15 pF
15 pF
15 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
VTP
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCA
Output
Control
(low-level
enabling)
VCCA/2
0V
tPLZ
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
VOH
VCCO/2
VOL
VCCO/2
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
tPHL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCCA/2
VCCO/2
VOL
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOL + VTP
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
Figure 11. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jan-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
74AVC20T245DGGRG4
ACTIVE
TSSOP
DGG
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVC20T245
SN74AVC20T245DGG
ACTIVE
TSSOP
DGG
56
35
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVC20T245
SN74AVC20T245DGGR
ACTIVE
TSSOP
DGG
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AVC20T245
SN74AVC20T245DGVR
ACTIVE
TVSOP
DGV
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
WG245
SN74AVC20T245ZQLR
LIFEBUY
BGA
MICROSTAR
JUNIOR
ZQL
56
1000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 85
WG245
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jan-2020
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
SN74AVC20T245DGGR
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TSSOP
DGG
56
2000
330.0
24.4
8.6
15.6
1.8
12.0
24.0
Q1
SN74AVC20T245DGVR
TVSOP
DGV
56
2000
330.0
24.4
6.8
11.7
1.6
12.0
24.0
Q1
SN74AVC20T245ZQLR
BGA MI
CROSTA
R JUNI
OR
ZQL
56
1000
330.0
16.4
4.8
7.3
1.5
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Feb-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74AVC20T245DGGR
TSSOP
DGG
56
2000
367.0
367.0
45.0
SN74AVC20T245DGVR
TVSOP
DGV
56
2000
367.0
367.0
45.0
SN74AVC20T245ZQLR
BGA MICROSTAR
JUNIOR
ZQL
56
1000
350.0
350.0
43.0
Pack Materials-Page 2
PACKAGE OUTLINE
ZQL0056A
JRBGA - 1 mm max height
SCALE 2.100
PLASTIC BALL GRID ARRAY
4.6
4.4
B
A
BALL A1 CORNER
7.1
6.9
1 MAX
C
SEATING PLANE
0.35
TYP
0.15
BALL TYP
0.1 C
3.25 TYP
(0.625) TYP
SYMM
K
(0.575) TYP
J
H
G
5.85
TYP
SYMM
F
E
D
C
56X
NOTE 3
B
A
0.65 TYP
BALL A1 CORNER
1
2
3
4
5
0.45
0.35
0.15
0.08
C B A
C
6
0.65 TYP
4219711/B 01/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. No metal in this area, indicates orientation.
www.ti.com
EXAMPLE BOARD LAYOUT
ZQL0056A
JRBGA - 1 mm max height
PLASTIC BALL GRID ARRAY
(0.65) TYP
56X ( 0.33)
2
1
3
4
5
6
A
(0.65) TYP
B
C
D
E
SYMM
F
G
H
J
K
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
0.05 MAX
METAL UNDER
SOLDER MASK
0.05 MIN
EXPOSED METAL
( 0.33)
METAL
( 0.33)
SOLDER MASK
OPENING
EXPOSED METAL
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4219711/B 01/2017
NOTES: (continued)
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For information, see Texas Instruments literature number SPRAA99 (www.ti.com/lit/spraa99).
www.ti.com
EXAMPLE STENCIL DESIGN
ZQL0056A
JRBGA - 1 mm max height
PLASTIC BALL GRID ARRAY
56X ( 0.33)
(0.65) TYP
1
2
3
4
5
6
A
(0.65) TYP
B
C
D
E
SYMM
F
G
H
J
K
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4219711/B 01/2017
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OUTLINE
DGG0056A
TSSOP - 1.2 mm max height
SCALE 1.200
SMALL OUTLINE PACKAGE
C
8.3
TYP
7.9
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
54X 0.5
56
1
14.1
13.9
NOTE 3
2X
13.5
28
B
6.2
6.0
29
56X
0.27
0.17
0.08
1.2 MAX
C A
B
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0 -8
0.15
0.05
0.75
0.50
DETAIL A
TYPICAL
4222167/A 07/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
DGG0056A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
56X (1.5)
SYMM
1
56
56X (0.3)
54X (0.5)
(R0.05)
TYP
SYMM
28
29
(7.5)
LAND PATTERN EXAMPLE
SCALE:6X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4222167/A 07/2015
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DGG0056A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
56X (1.5)
SYMM
1
56
56X (0.3)
54X (0.5)
(R0.05) TYP
SYMM
29
28
(7.5)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:6X
4222167/A 07/2015
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
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