Texas Instruments | SN74ALVCHS162830 (Rev. H) | Datasheet | Texas Instruments SN74ALVCHS162830 (Rev. H) Datasheet

Texas Instruments SN74ALVCHS162830 (Rev. H) Datasheet
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SN74ALVCHS162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
SCES097H – APRIL 1997 – REVISED SEPTEMBER 2004
FEATURES
•
•
•
•
•
•
Member of the Texas Instruments Widebus™
Family
Output Ports Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
Diodes on Inputs Clamp Overshoot
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
DESCRIPTION
This 1-bit to 2-bit address driver is designed for 2.3-V
to 3.6-V VCC operation.
Diodes to VCC have been added on the inputs to
clamp overshoot.
Active bus-hold circuitry holds unused or undriven
inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not
recommended.
The outputs, which are designed to sink up to 12 mA,
include equivalent 26-Ω series resistors to reduce
overshoot and undershoot.
To ensure the high-impedance state during power up
or power down, the output-enable (OE) input should
be tied to VCC through a pullup resistor; the minimum
value of the resistor is determined by the
current-sinking capability of the driver.
DBB PACKAGE
(TOP VIEW)
2Y2
1Y2
GND
2Y1
1Y1
VCC
A1
A2
GND
A3
A4
GND
A5
A6
VCC
A7
A8
GND
A9
OE1
OE2
A10
GND
A11
A12
VCC
A13
A14
GND
A15
A16
GND
A17
A18
VCC
2Y18
1Y18
GND
2Y17
1Y17
1
80
2
79
3
78
4
77
5
76
6
75
7
74
8
73
9
72
10
71
11
70
12
69
13
68
14
67
15
66
16
65
17
64
18
63
19
62
20
61
21
60
22
59
23
58
24
57
25
56
26
55
27
54
28
53
29
52
30
51
31
50
32
49
33
48
34
47
35
46
36
45
37
44
38
43
39
42
40
41
1Y3
2Y3
GND
1Y4
2Y4
VCC
1Y5
2Y5
GND
1Y6
2Y6
GND
1Y7
2Y7
VCC
1Y8
2Y8
GND
1Y9
2Y9
1Y10
2Y10
GND
1Y11
2Y11
VCC
1Y12
2Y12
GND
1Y13
2Y13
GND
1Y14
2Y14
VCC
1Y15
2Y15
GND
1Y16
2Y16
line space
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2004, Texas Instruments Incorporated
SN74ALVCHS162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES097H – APRIL 1997 – REVISED SEPTEMBER 2004
FUNCTION TABLE
INPUTS
OUTPUTS
OE1
OE2
A
1Yn
2Yn
L
H
H
H
Z
L
H
L
L
Z
H
L
H
Z
H
H
L
L
Z
L
L
L
H
H
H
L
L
L
L
L
H
H
X
Z
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
VCC
21
OE2
VCC
20
OE1
VCC
A1
5
1Y1
7
4
2Y1
To 17 Other Channels
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
-0.5
4.6
V
VI
Input voltage range (2)
-0.5
4.6
V
VO
Output voltage range (2) (3)
-0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
-50
mA
IOK
Output clamp current
VO < 0
-50
mA
IO
Continuous output current
±50
mA
±100
Continuous current through each VCC or GND
θJA
Package thermal impedance (4)
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
2
-65
UNIT
mA
64
°C/W
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
This value is limited to 4.6 V maximum.
The package thermal impedance is calculated in accordance with JESD 51-7.
www.ti.com
SN74ALVCHS162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
SCES097H – APRIL 1997 – REVISED SEPTEMBER 2004
RECOMMENDED OPERATING CONDITIONS (1)
VCC
Supply voltage
MIN
MAX
2.3
3.6
VCC = 2.3 V to 2.7 V
1.7
VCC = 2.7 V to 3.6 V
2
UNIT
V
VIH
High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
0
VCC
V
VO
Output voltage
0
VCC
V
VCC = 2.3 V to 2.7 V
0.7
VCC = 2.7 V to 3.6 V
0.8
VCC = 2.3 V
IOH
High-level output current
Low-level output current
∆t/∆v
Input transition rise or fall rate
TA
Operating free-air temperature
VCC = 2.7 V
-8
mA
-12
VCC = 2.3 V
6
VCC = 2.7 V
8
VCC = 3 V
(1)
V
-6
VCC = 3 V
IOL
V
mA
12
-40
10
ns/V
85
°C
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74ALVCHS162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES097H – APRIL 1997 – REVISED SEPTEMBER 2004
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
2.3 V
-1.2
2.3 V
VCC + 1.2
2.3 V to 3.6 V
2.3 V
1.9
VIH = 1.7 V
2.3 V
1.7
3V
2.4
IOH = -8 mA,
VIH = 2 V
2.7 V
2
IOH = -12 mA,
VIH = 2 V
3V
2
IOL = 100 µA
0.2
VIL = 0.7 V
2.3 V
0.4
VIL = 0.7 V
2.3 V
0.55
VIL = 0.8 V
3V
0.55
IOL = 8 mA,
VIL = 0.8 V
2.7 V
0.6
IOL = 12 mA,
VIL = 0.8 V
3V
0.8
IOL = 6 mA
II(hold)
3.6 V
VI = 0.7 V
2.3 V
45
VI = 1.7 V
2.3 V
-45
VI = 0.8 V
3V
75
VI = 2 V
3V
-75
IOZ
VO = VCC or GND
ICC
VI = VCC or GND,
IO = 0
∆ICC
One input at VCC - 0.6 V,
Other inputs at VCC or GND
Ci
Co
(1)
(2)
4
Control inputs
Data inputs
Outputs
±5
VI = VCC or GND
VI = 0 to 3.6 V (2)
V
V
2.3 V to 3.6 V
IOL = 4 mA,
UNIT
VCC - 0.2
VIH = 1.7 V
VIH = 2 V
IOH = -6 mA
II
MAX
II = 18 mA
IOH = -4 mA,
VOL
MIN TYP (1)
II = -18 mA
IOH = -100 µA
VOH
VCC
V
µA
µA
3.6 V
±500
3.6 V
±10
µA
3.6 V
40
µA
3 V to 3.6 V
750
µA
VI = VCC or GND
3.3 V
VO = VCC or GND
3.3 V
5.5
7
7.5
All typical values are at VCC = 3.3 V, TA = 25°C.
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to
another.
pF
pF
SN74ALVCHS162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES097H – APRIL 1997 – REVISED SEPTEMBER 2004
SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 and Figure 2)
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
ten
OE
tdis
OE
PARAMETER
VCC = 2.5 V
± 0.2 V
MIN
MAX
Y
1.2
Y
1
Y
1
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
MIN
UNIT
MAX
MIN
MAX
3.8
4
1.7
3.5
ns
5.7
5.7
1
4.8
ns
4.9
5.4
1.7
5.2
ns
OPERATING CHARACTERISTICS
TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
per bit (two outputs switching)
TEST CONDITIONS
All outputs enabled
All outputs disabled
CL = 0,
f = 10 MHz
VCC = 2.5 V
VCC = 3.3 V
TYP
TYP
49
53
6
7.5
UNIT
pF
5
SN74ALVCHS162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES097H – APRIL 1997 – REVISED SEPTEMBER 2004
PARAMETER MEASUREMENT INFORMATION
VCC = 2.5 V ± 0.2 V
2 × VCC
S1
500 Ω
From Output
Under Test
Open
TEST
tpd
tPLZ/tPZL
tPHZ/tPZH
GND
CL = 30 pF
(see Note A)
500 Ω
S1
Open
2 × VCC
GND
LOAD CIRCUIT
tw
VCC
Timing
Input
VCC/2
VCC/2
VCC/2
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC/2
VCC/2
0V
tPLH
Output
Control
(low-level
enabling)
VCC/2
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
tPLZ
VCC
VCC/2
tPZH
VOH
VCC/2
0V
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
tPHL
VCC/2
VCC
VCC/2
tPZL
VCC
Input
VOLTAGE WAVEFORMS
PULSE DURATION
th
VCC
Data
Input
VCC/2
0V
0V
tsu
Output
VCC
VCC/2
Input
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.15 V
VOL
tPHZ
VCC/2
VOH
VOH − 0.15 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
6
SN74ALVCHS162830
1-BIT TO 2-BIT ADDRESS DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES097H – APRIL 1997 – REVISED SEPTEMBER 2004
PARAMETER MEASUREMENT INFORMATION
VCC = 2.7 V AND 3.3 V ± 0.3 V
6V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
tw
LOAD CIRCUIT
2.7 V
2.7 V
Timing
Input
VOLTAGE WAVEFORMS
PULSE DURATION
th
2.7 V
Data
Input
1.5 V
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V
1.5 V
0V
tPLH
1.5 V
VOL
1.5 V
0V
tPLZ
3V
1.5 V
VOL + 0.3 V
VOL
tPZH
VOH
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V
Output
Waveform 1
S1 at 6 V
(see Note B)
tPHL
1.5 V
2.7 V
Output
Control
(low-level
enabling)
tPZL
2.7 V
Output
1.5 V
0V
0V
tsu
Input
1.5 V
Input
1.5 V
Output
Waveform 2
S1 at GND
(see Note B)
tPHZ
1.5 V
VOH − 0.3 V
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 2. Load Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
25-Apr-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
74ALVCHS162830GRE4
ACTIVE
TSSOP
DBB
80
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ALVCHS162830GRG4
ACTIVE
TSSOP
DBB
80
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TSSOP
DBB
80
TSSOP
DBB
80
SN74ALVCHS162830DBBR OBSOLETE
SN74ALVCHS162830GR
ACTIVE
Pins Package Eco Plan (2)
Qty
TBD
2000 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
Call TI
CU NIPDAU
MSL Peak Temp (3)
Call TI
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SN74ALVCHS162830GR TSSOP
DBB
80
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
2000
330.0
24.4
Pack Materials-Page 1
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
8.4
17.3
1.7
12.0
24.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74ALVCHS162830GR
TSSOP
DBB
80
2000
346.0
346.0
41.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS005D – JANUARY 1995 – REVISED MARCH 2002
DBB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
80 PINS SHOWN
0,23
0,13
0,40
80
0,07 M
41
6,20
6,00
8,30
7,90
0,20
0,09
1
Gage Plane
40
A
0,25
0°–ā8°
0,75
0,45
Seating Plane
1,20 MAX
0,15
0,05
PINS**
0,08
80
100
A MAX
17,10
20,90
A MIN
16,90
20,70
DIM
4040212 / E 03/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Falls within JEDEC : 80 Pin – MO-153 Variation FF
100 Pin – MO-194 Variation BB
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