Texas Instruments | The Bypass Capacitor in High-Speed Environments (Rev. A) | Application notes | Texas Instruments The Bypass Capacitor in High-Speed Environments (Rev. A) Application notes

Texas Instruments The Bypass Capacitor in High-Speed Environments (Rev. A) Application notes
The Bypass Capacitor
in High-Speed Environments
SCBA007A
November 1996
1
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2
Contents
Title
Page
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Bypass Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Bypassing Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitor Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitor Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Load Effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Capacitor Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
2
2
4
7
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
List of Illustrations
Figure
Title
Page
1
VCC Line Disturbance vs Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2
Typical Power Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3
Capacitive Storage (Bypass Capacitor) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
VCC Line Disturbance vs Capacitor Size at Different Distances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
5
VCC Line Disturbance vs Capacitor Size With Resistive Load at Different Frequencies . . . . . . . . . . . . . . . . . . . . . 4
6
VCC Line Disturbance vs Capacitor Size With 60-pF Load at Different Frequencies . . . . . . . . . . . . . . . . . . . . . . . . 5
7
VCC Line Disturbance vs Capacitor Size at Different Capacitive Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
8
ICC vs Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
9
VCC Line Disturbance vs Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Widebus is a trademark of Texas Instruments Incorporated.
iii
iv
Introduction
High-speed switching environments generate noise on power lines (or planes) due to the charging and discharging of internal
and external capacitors of an integrated circuit. The instantaneous current generated with the rising and falling edges of the
outputs causes the power line (or plane) to ring. This behavior can violate the VCC recommended operating conditions or
generate false signals, creating serious problems. A simple and easy solution must be considered to prevent such a problem
from occurring. This solution is the bypass capacitor.
Bypass Definition
A bypass capacitor stores an electrical charge that is released to the power line whenever a transient voltage spike occurs. It
provides a low-impedance supply, thereby minimizing the noise generated by the switching outputs of the device.
Bypassing Considerations
A system without bypassing techniques can create severe power disturbance and cause circuit failures. Figure 1 shows the VCC
line of the ’ABT541 ringing while all outputs are switching. Note that there is no bypass capacitor at the VCC pin. There are
a few issues that should be considered when bypassing power lines (or planes).
The capacitor type
The capacitor placement
The output load effect
The capacitor size
No Bypass Capacitor
7
6
VCC – V
•
•
•
•
VCC = 5 V,
TA = 25°C,
Output Load = 60 pF/500 W
5
4
3
VCC ringing amplitude due to
the switching of the outputs
2
1
0
0
10
20
30
40
50
Frequency – MHz
Figure 1. VCC Line Disturbance vs Frequency
1
Capacitor Type
In a high-speed environment the lead inductances of a bypass capacitor become very critical. High-speed switching of a part’s
outputs generates high frequency noise (>100 MHz) on the power line (or plane). These harmonics cause the capacitor with
high lead inductance to act as an open circuit, preventing it from supplying the power line (or plane) with the current needed
to maintain a stable level, and resulting in functional failure of the circuit. Therefore, bypassing a power line (or plane) from
the device internal noise requires capacitors with very small inductances. That is why the multilayer ceramic chip capacitors
(MLC) are more favorable than others for bypassing power lines (or planes). They exhibit negligible internal inductance,
thereby allowing the charge to flow easily, when needed, without degradation.
Capacitor Placement
Most of the printed circuit boards are designed to maintain a short distance between power and ground. This is done by
laminating the power line (or plane) with the ground plane and can be electrically approximated with lumped capacitances as
shown in Figure 2. However, this is not enough to have a reliable system, and another technique must be considered to provide
a low-impedance path for the transient current to be grounded. This can be done by placing the bypass capacitor close to the
power pin of the device.
VCC
Ǹ
Dielectric
ZO
+
L
C
GND
Figure 2. Typical Power Layout
Why This Location Is Very Important
Consider a device driving a line from low to high having an impedance (Z ≅ 100 Ω) and a supply voltage (VCC = 5 V) (see
Figure 3). In order for the device to change state, an output current (I = 50 mA) is needed instantaneously. Note that for eight
outputs switching, I = 50 × 8 = 400 mA. This current is provided by the power line (or plane) in a period less than or equal
to the rise time of the output (approximately 3 ns for ABT). The bypass capacitor must supply the charge in that same period
to avoid VCC drop; therefore, distance becomes an important issue. Line inductances can block the charge from flowing,
leaving the power line (or plane) disturbed.
Using the formula for paralleled wires:
L
+ l mp ln dr
0
(1)
Where:
d
l
r
µ0
= distance between wires
= length of the wires
= radius of the wires
= permeability of medium between wires
The inductance (L) is directly proportional to the distance between the lines as well as the length of the lines. Therefore, by
reducing the loop ABCD in Figure 3, the inductance is minimized, allowing the capacitor to function more efficiently and,
hence, keep the noise off the power line (or plane).
2
VCC
A
B
VCC
Z = 100 Ω
I = 5 V/100 Ω = 50 mA
GND
C
D
Figure 3. Capacitive Storage (Bypass Capacitor)
Several tests were performed on an ’ABT541 device to study the behavior of its power line (or plane) as the outputs switch
simultaneously. This data is taken at different distances from the power pin (0.3, 1, and 2 inches) using four capacitors (0.001,
0.01, 0.1, and 1 µF), with an input frequency of 33 MHz and all eight outputs switching simultaneously (worst case). Figure 4
shows that the line disturbance increases as the capacitor is moved away from the power pin.
Distance From Vcc Pin = 0.3 Inch
Distance From Vcc Pin = 1 Inch
6
VCC – V
VCC – V
6
5
4
0.001
0.010
0.100
1.000
Capacitance – µF
5
4
0.001
0.010
0.100
1.000
Capacitance – µF
Distance From Vcc Pin = 2 Inches
VCC – V
6
VCC = 5 V,
TA = 25°C,
Frequency = 33 MHz,
Output Load = 500 Ω
5
4
0.001
VCC ringing amplitude due to
the switching of the device outputs
0.010
0.100
1.000
Capacitance – µF
Figure 4. VCC Line Disturbance vs Capacitor Size at Different Distances
3
Output Load Effect
Capacitive loads combined with increased frequency result in higher transient current and possible VCC oscillation. If the
output load is purely resistive, the increase in frequency does not affect the rising and falling edge of the outputs; therefore,
it does not increase the VCC line disturbance. Figure 5 shows the power line behavior across frequency while driving only a
resistive load. Figure 6 shows the same plot with an additional 60-pF capacitive load.
Frequency = 1 MHz
Frequency = 10 MHz
6
VCC – V
VCC – V
6
5
4
0.001
0.010
0.100
5
4
0.001
1.000
Capacitance – µF
Frequency = 33 MHz
1.000
Frequency = 50 MHz
6
VCC – V
VCC – V
0.100
Capacitance – µF
6
5
4
0.001
0.010
0.010
0.100
1.000
Capacitance – µF
Distance From VCC Pin = 0.3 Inch,
VCC = 5 V,
TA = 25°C,
Output Load = 500 Ω
5
4
0.001
0.010
0.100
1.000
Capacitance – µF
VCC ringing amplitude due to
the switching of the device outputs
Figure 5. VCC Line Disturbance vs Capacitor Size With Resistive Load at Different Frequencies
4
Frequency = 1 MHz
Frequency = 10 MHz
6
VCC – V
VCC – V
6
5
4
0.001
0.010
0.100
5
4
0.001
1.000
Capacitance – µF
Frequency = 33 MHz
1.000
Frequency = 50 MHz
6
VCC – V
VCC – V
0.100
Capacitance – µF
6
5
4
0.001
0.010
0.010
0.100
1.000
Capacitance – µF
Distance From VCC Pin = 0.3 Inch,
VCC = 5 V,
TA = 25°C,
Output Load = 500 Ω
5
4
0.001
0.010
0.100
1.000
Capacitance – µF
VCC ringing amplitude due to
the switching of the device outputs
Figure 6. VCC Line Disturbance vs Capacitor Size With 60-pF Load at Different Frequencies
5
When driving large capacitive loads, more charge must be supplied to the output load, resulting in a slower rising or falling
edge. However, if the bypass capacitor is not capable of providing the needed charge, power lines (or planes) start to ring and
eventually oscillate, causing failures across the board. These oscillations can be of a great amplitude, 2- to 3-V p-to-p. Figure
7 shows these oscillations at four different loads (0, 60, 115, and 200 pF) using four different bypass capacitors (0.001, 0.01,
0.1, and 1 µF).
Output Load = 500 Ω
Output Load = 60 pF/500 Ω
6
VCC – V
VCC – V
6
5
4
4
3
0.001
0.010
0.100
3
0.001
1.000
0.010
0.100
Capacitance – µF
Capacitance – µF
Output Load = 115 pF/500 Ω
Output Load = 200 pF/500 Ω
5
4
5
4
3
0.001
0.010
0.100
1.000
Capacitance – µF
Distance From VCC Pin = 0.3 Inch,
VCC = 5 V,
TA = 25°C,
Frequency = 33 MHz
3
0.001
0.010
0.100
Capacitance – µF
VCC ringing amplitude due to
the switching of the device outputs
Figure 7. VCC Line Disturbance vs Capacitor Size at Different Capacitive Loads
6
1.000
6
VCC – V
6
VCC – V
5
1.000
Capacitor Size
How can we choose the right bypass capacitor? The most important parameter is the ability to supply instantaneous current
when it is needed.
There are two ways to calculate the bypass-capacitor size for a device:
1.
The amount of current needed to switch one output from low to high (I), the number of outputs switching (N), the
time required for the capacitor to charge the line (∆t), and the drop in VCC that can be tolerated (∆V) must be known.
The following equation can be used:
C
+I
N
DV
Dt
(2)
where ∆t and ∆V can be assumed.
For example, with ∆V = 0.1 V, ∆t = 3 ns, N = 8, and I obtained from either Figure 3 (for rough estimate) or from the plot in
Figure 8 (assuming 50-MHz frequency), using I = 44 mA, the equation is:
C
10 *3
8
0.1
3
10 *9
+ 10080
10 *12
+ 0.01 mF
(3)
Several capacitor manufacturers specify the maximum pulse slew rate. This allows the capacitor’s maximum current
to be calculated. For example, a 0.1-µF capacitor rated at 50 V/µs can supply: i = c dv/dt = 0.1 × 50 = 5 A. This
current is greater than the maximum current (I × N = 44 mA × 8 outputs switching = 352 mA) required by the device
used in the previous example.
One Output Switching
50
VCC = 5 V,
TA = 25°C,
Output Load = 60 pF/500 Ω
45
I CC – mA
2.
+ 44
40
35
30
25
20
0
10
20
30
Frequency – MHz
40
50
Figure 8. ICC vs Frequency
7
Summary
Bypass capacitors play a major role in achieving reliable systems. The absence of the bypass capacitor can generate false
signals and create major problems across the entire board. Figure 1 shows the undesired ringing caused by simultaneously
switching the outputs of the ’ABT541. Also, choosing a capacitor with negligible lead inductance can avoid unpredictable
behavior at high frequencies. Locating the capacitor closer to the VCC pin of a device can avoid further complications and
eliminate the ringing entirely. Figure 6 shows the VCC line behavior with the bypass capacitor placed 0.3 inch away from the
VCC pin, whereas Figure 9 shows the same plot with the same load, but the bypass capacitor is located at the pin; there is
dramatic improvement in the latter case. This technique can also be applied to Texas Instruments Widebus family by
bypassing all VCC pins. This is the most effective method for eliminating the VCC line ringing. It is always important to
minimize the loop between the VCC pin, the ground, and the bypass capacitor. Finally, choosing the capacitor size by using
either method mentioned earlier is highly recommended. If one considers all these issues, a good bypass technique can
be employed.
With 0.1-µF Bypass Capacitor
7
6
V CC – V
5
4
3
2
VCC = 5 V,
TA = 25°C,
Output Load = 60 pF/500 Ω
1
0
0
10
20
30
40
50
Frequency – MHz
Figure 9. VCC Line Disturbance vs Frequency
References
1 Texas Instruments Incorporated, “Advanced Schottky Family (ALS/AS) Applications,” ALS/AS Logic Data Book, 1995,
literature number SDAD001C.
2 Walton, D., “P.C.B. Layout for High-Speed Schottky TTL”.
8
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