Texas Instruments | DRV10974 12-V, Three-Phase, Sensorless BLDC Motor Driver (Rev. C) | Datasheet | Texas Instruments DRV10974 12-V, Three-Phase, Sensorless BLDC Motor Driver (Rev. C) Datasheet

Texas Instruments DRV10974 12-V, Three-Phase, Sensorless BLDC Motor Driver (Rev. C) Datasheet
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DRV10974
SLVSDN2C – JANUARY 2018 – REVISED SEPTEMBER 2018
DRV10974 12-V, Three-Phase, Sensorless BLDC Motor Driver
•
•
•
•
•
•
•
•
•
Input Voltage Range: 4.4 V to 18 V
Total Driver H + L rDS(on): 750 mΩ (Typical) at
TA = 25°C
Phase Drive Current: 1-A Continuous (1.5-A
Peak)
180° Sinusoidal Commutation for Optimal
Acoustic Performance
Resistor-Configurable Lead Angle
Resistor-Configurable Current Limit
Soft Start With Resistor-Configurable Acceleration
Profile
Built-In Current Sense to Eliminate External
Current-Sense Resistor
Proprietary Sensorless Control Without Motor
Center Tap
Simple User Interface:
– One-Pin Configuration for Start-Up
– PWM Input Designates Magnitude of Voltage
Applied to Motor
– Open-Drain FG Output Provides Speed
Feedback
– Pin for Forward and Reverse Control
Fully Protected:
– Motor-Lock Detect and Restart
– Overcurrent, Short-Circuit, Overtemperature,
Undervoltage
2 Applications
•
•
•
White Goods
Fans, Blowers, and Pumps
BLDC Motor Module
The DRV10974 device provides for simple control of
motor speed by applying a PWM input to control the
magnitude of the drive voltage, or by driving the PWM
pin with an analog voltage and monitoring the FG pin
for speed feedback.
The DRV10974 device includes a number of features
to improve efficiency. The resistor-configurable lead
angle allows the user to optimize the driver efficiency
by aligning the phase current and the phase BEMF.
In addition, the use of low-rDS(on) MOSFETs helps to
conserve power while the motor is being driven.
Device Information(1)
PART NUMBER
DRV10974
PACKAGE
BODY SIZE (NOM)
HTSSOP (16)
5.00 mm × 4.40 mm
WQFN (16
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Application Schematic
DRV10974
PWM
U
•
•
1
The DRV10974 device uses a proprietary sensorless
control scheme to provide dependable commutation.
The 180° sinusoidal commutation significantly
reduces pure tone acoustics that are typical with 120°
(trapezoidal) commutation. The DRV10974 spin-up is
configured using a single external low-power resistor.
The current limit can be set by an external low-power
resistor.
FR
FG
Lead Angle
180° Sensorless
Sinusoidal
V
M
W
1 Features
Accel Profile
Current Limit
4.4 V to 18 V
VCP
3 Description
The DRV10974 device is a three-phase sensorless
motor driver with integrated power MOSFETs, which
can provide continuous drive current up to 1 A (rms).
The device is designed for cost-sensitive, low-noise,
and low-external-component-count applications.
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
DRV10974
SLVSDN2C – JANUARY 2018 – REVISED SEPTEMBER 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
7
1
1
1
2
4
5
Absolute Maximum Ratings ...................................... 5
ESD Ratings.............................................................. 6
Recommended Operating Conditions....................... 6
Thermal Information .................................................. 6
Electrical Characteristics........................................... 6
Typical Characteristics ............................................ 10
Detailed Description ............................................ 11
7.1 Overview ................................................................. 11
7.2 Functional Block Diagram ....................................... 12
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 19
8
Application and Implementation ........................ 24
8.1 Application Information............................................ 24
8.2 Typical Application .................................................. 24
9 Power Supply Recommendations...................... 26
10 Layout................................................................... 26
10.1 Layout Guidelines ................................................. 26
10.2 Layout Example .................................................... 26
11 Device and Documentation Support ................. 28
11.1
11.2
11.3
11.4
11.5
11.6
Device Support ....................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
28
28
28
28
28
28
12 Mechanical, Packaging, and Orderable
Information ........................................................... 28
4 Revision History
Changes from Revision B (June 2018) to Revision C
Page
•
Changed document status from MIXED STATUS to PRODUCTION DATA.......................................................................... 1
•
Deleted "Adv. info." designation from the WQFN entry in the Device Information table........................................................ 1
•
Deleted the "Advance informatoin" note from the WQFN pinout drawing.............................................................................. 4
•
Deleted the "Advance Information" note from the Thermal Information table ........................................................................ 6
•
Added description of Analog Mode Speed Control .............................................................................................................. 14
•
Added Kt High and Kt Low descriptions in abnormal Kt lock detect figure .......................................................................... 17
•
Added layout example for QFN package type...................................................................................................................... 27
Changes from Revision A (April 2018) to Revision B
Page
•
Added WQFN package to the Device Information table......................................................................................................... 1
•
Added pinout drawing for the WQFN package....................................................................................................................... 4
•
Added a column to the Pin Functions table for the WQFN package, and added the TYPE column ..................................... 5
•
Added a column to the Thermal Information table for the VQFN package ............................................................................ 6
•
Changed rDS(on) vs. Temperature graph to include VCC condition......................................................................................... 10
•
Changed Speed-Control Transfer Function figure to clearly show when the device enters and exits low power mode .... 14
•
Updated Lock BEMF Abnormal text for clarity ..................................................................................................................... 16
•
Changed Detailed Design Procedure to cover the high level tuning process of the RMP, ADV, and CS settings.............. 25
Changes from Original (January 2018) to Revision A
Page
•
Added or changed several bullets in the Features list .......................................................................................................... 1
•
Changed text in the third paragraph of the Description section ............................................................................................. 1
•
Added parameter symbol (fPWM_OUT) to the 25-kHz PWM signal.......................................................................................... 12
•
Added parameter symbol (fPWM_OUT) to the 25-kHz PWM signal.......................................................................................... 13
•
Added parameter symbol (DCSTEP) for the control resolution............................................................................................... 13
•
Added parameter symbol (DCON_MIN) for the minimum-operation duty cycle ....................................................................... 14
2
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•
Changed "pulse durations" to "duty cycles".......................................................................................................................... 14
•
Changed PWMDC to PWMdc ................................................................................................................................................. 14
•
Added parameter symbol (fFG_MIN) for the motor speed ....................................................................................................... 15
•
Changed the number of lock-detect schemes from five to six ............................................................................................. 16
•
Added a table note stating the required resistor tolerance................................................................................................... 18
•
Added a new Initial Speed Detect section............................................................................................................................ 19
•
Added a parameter symbol (tALIGN) in the Align section, and reworded the last sentence thereof ...................................... 19
•
Changed the column headings of the two rightmost columns in Table 2............................................................................. 20
•
Added three table notes following Table 2 ........................................................................................................................... 20
•
Changed "programmed resistor" to "selected resistor" ........................................................................................................ 21
•
Added a table note stating the required resistor tolerance................................................................................................... 22
•
Added a table note stating the required resistor tolerance................................................................................................... 23
•
Added a ±30% tolerance to the V1P8 capacitor in Table 5 ................................................................................................. 24
•
Changed content of Row 4 in Table 6 to "Motor electrical constant" ................................................................................... 25
•
Deleted all previous content from the Detailed Design Procedure section and replaced it with a reference to the
DRV10974 Tuning Guide ..................................................................................................................................................... 25
•
Changed Figure 20 .............................................................................................................................................................. 25
•
Added location information for the capacitor in the Power Supply Recommendations section ........................................... 26
•
Added the Device Support section ....................................................................................................................................... 28
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SLVSDN2C – JANUARY 2018 – REVISED SEPTEMBER 2018
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5 Pin Configuration and Functions
PWP PowerPAD™ Package
16-Pin HTSSOP With Exposed Thermal Pad
Top View
ADV
1
16
GND
FR
2
15
VCP
FG
3
14
VCC
PWM
4
13
W
12
V
Thermal
V1P8
5
RMP
6
11
U
GND
7
10
PGND
CS
8
9
Pad
NC
Not to scale
NC – No internal connection
FR
ADV
GND
VCP
15
14
13
8
4
NC
RMP
Pad
7
3
PGND
V1P8
Thermal
6
2
CS
PWM
5
1
GND
FG
16
RUM Package
16-Pin WQFN With Exposed Thermal Pad
Top View
12
VCC
11
W
10
V
9
U
Not to scale
NC – No internal connection
4
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Pin Functions
PIN
NAME.
NO.
I/O
TYPE (1)
DESCRIPTION
HTSSOP
WQFN
ADV
1
15
I
D
Selects the applied lead angle by 1/8-W resistor; not to be driven externally with a
source; leaving the pin open results in the longest lead angle; the lead angle is
determined by the ADV pin voltage at power up.
CS
8
6
I
D
Selects current limit by 1/8-W resistor; not to be driven externally with a source; leaving
the pin open results in the highest current limit; the current limit is determined by the
CS pin voltage at power up.
FG
3
1
O
D
Provides motor speed feedback; open-drain output with internal pullup to V3P3; needs
a pullup resistor to limit current if pullup voltage is higher than V3P3
FR
2
16
I
D
Direction control. FR = 0: U→V→W; FR = 1: U→W→V; value is determined by the FR
pin state on exit of low-power mode; internal pulldown
GND
7, 16
5, 14
—
—
Digital and analog ground
NC
9
8
—
NC
No internal connection
PGND
10
7
—
P
Power ground connection for motor power
PWM
4
2
I
D
Motor speed-control input; auto detect for analog or digital mode; internal pullup to
2.2 V
RMP
6
4
I
D
Acceleration ramp-rate control; 1/8-W resistor to GND to set acceleration rate; leaving
the pin open results in the slowest acceleration rate; the acceleration rate is determined
by the RMP pin voltage at power up.
U
11
9
I/O
A
Motor phase U
V
12
10
I/O
A
Motor phase V
V1P8
5
3
O
P
LDO regulator for internal operation; 1-µF, 6.3-V ceramic capacitor tied to GND. Can
supply a maximum of 3 mA to an extenal load.
VCC
14
12
I
P
Power-supply connection; 10-µF, 25-V ceramic capacitor tied to GND
VCP
15
13
O
A
Charge-pump output; 100-nF, 10-V ceramic capacitor tied to VCC
W
13
11
I/O
A
Motor phase W
Thermal
pad
—
—
—
—
The exposed thermal pad must be electrically connected to the ground plane by
soldering to the PCB for proper operation, and connected to the bottom side of the
PCB through vias for better thermal spreading.
(1)
I = Input, O = Output, I/O = Input/output, P = Power, D = Digital, A = Analog, NC = No connection
6 Specifications
6.1 Absolute Maximum Ratings
over operating junction temperature range (unless otherwise noted) (1)
MIN
MAX
VCC
–0.3
20
PWM, FR
–0.3
5.5
CS, RMP, ADV
–0.3
2
GND, PGND
–0.3
0.3
–1
20
V1P8
–0.3
2
FG
–0.3
20
VCP
–0.3
VCC + 5.5
Maximum junction temperature, TJmax
–40
150
°C
Storage temperature, Tstg
–55
150
°C
Pin voltage
(1)
U, V, W
UNIT
V
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±1000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
Supply voltage
VCC
Voltage
Current
NOM
MAX
4.4
18
U, V, W
–0.7
18
PWM, FR
–0.1
5.5
FG
0.5
18
CS
–0.1
1.8
PGND, GND
–0.1
0.1
RMP, ADV
–0.1
1.8
V1P8 regulator-output current; external load
UNIT
V
V
0
3
mA
Operating ambient temperature, TA
–40
85
°C
Operating junction temperature, TJ
–40
125
°C
6.4 Thermal Information
DRV10974
THERMAL METRIC (1)
PWP (HTSSOP)
RUM (VQFN)
UNIT
16 PINS
16 PINS
RθJA
Junction-to-ambient thermal resistance
37.8
34.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
25.2
27
°C/W
RθJB
Junction-to-board thermal resistance
20.7
13.3
°C/W
ψJT
Junction-to-top characterization parameter
0.7
0.3
°C/W
ψJB
Junction-to-board characterization parameter
20.5
13.3
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
1.9
4
°C/W
(1)
For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.
6.5 Electrical Characteristics
over operating junction temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
5
7
UNIT
SUPPLY CURRENT
ICC
Supply current
TA = 25°C, VCC = 12 V, no motor load
ICC(LP)
Low power mode
TA = 25°C, VCC = 12 V
380
mA
µA
UVLO
V(UVLO_F)
VCC UVLO falling
4.2
4.3
4.4
V(UVLO_R)
VCC UVLO rising
4.5
4.7
4.85
Vhys(UVLO)
VCC UVLO hysteresis
VVCP(UVLO_F)
Charge pump UVLO falling
VVCP – VCC
3.35
3.7
4.05
VVCP(UVLO_R)
Charge pump UVLO rising
VVCP – VCC
3.65
4.0
4.37
Vhys(VCP)
Charge pump UVLO hysteresis
V(V1P8_F)
V1P8 UVLO falling
1.25
1.4
1.55
V(V1P8_R)
V1P8 UVLO rising
1.35
1.5
1.65
Vhys(V1P8)
V1P8 UVLO hysteresis
400
V
mV
330
100
V
V
V
mV
V
V
mV
VOLTAGE REGULATORS
6
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Electrical Characteristics (continued)
over operating junction temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VV1P8
V1P8 voltage
TA = 25°C, C(V1P8) = 1 μF
IV1P8
Maximum external load from V1P8
TA = 25°C, C(V1P8) = 1 μF
MIN
TYP
MAX
1.7
1.8
1.9
3
UNIT
V
mA
INTEGRATED MOSFET
rds(on)_HS
High-side FET on-resistance
TA = 25°C, VCC = 12 V, IO = 100 mA
0.375
0.425
Ω
rds(on)_LS
Low-side FET on-resistance
TA = 25°C, VCC = 12 V, IO = 100 mA
0.375
0.425
Ω
PHASE DRIVER
SLPH_LH
Phase slew rate switching low to high
SlewRate = 0; measure 20% to 80%;
VCC = 12 V; phase current > 20 mA
70
120
170
V/μs
SLPH_HL
Phase slew rate switching high to low
SlewRate = 0; measure 80% to 20%;
VCC = 12 V; phase current > 20 mA
70
120
170
V/μs
fPWM_OUT
Phase output PWM frequency
tdead_time
Recommended dead time
25
kHz
440
ns
CHARGE PUMP
VVCP
VCP voltage
VCC = 4.4 V to 18 V
VCC + 4 VCC + 5 VCC + 5.5
V
CURRENT LIMIT
ILIMIT
Current-limit threshold
VCC = 12 V, R(CS) = 7.32 kΩ ±1%
0.2
VCC = 12 V, R(CS) = 16.2 kΩ ±1%
0.4
VCC = 12 V, R(CS) = 25.5 kΩ ±1%
0.6
VCC = 12 V, R(CS) = 38.3 kΩ ±1%
0.8
VCC = 12 V, R(CS) = 54.9 kΩ ±1%
1
VCC = 12 V, R(CS) = 80.6 kΩ ±1%
1.2
VCC = 12 V, R(CS) = 115 kΩ ±1%
1.4
VCC = 12 V, R(CS) = 182 kΩ ±1%,
open loop and closed loop current
limit
1.6
VCC = 12 V, R(CS) = 182 kΩ ±1%,
align current limit
1.5
A
RANGE OF MOTORS SUPPORTED
Rm
Motor resistance measurement
Phase to center tap
1
20
Ω
Kt
Motor BEMF constant measurement
Phase to center tap
5
150
mV/Hz
tALIGN
Motor align time
0.67
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Electrical Characteristics (continued)
over operating junction temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
PWM - DIGITAL MODE
VIH(DIG)
PWM input high voltage
VIL(DIG)
PWM input low voltage
ƒPWM
PWM input frequency
2.2
V
0.1
VVCC < 14 V
100 %
VVCC ≥ 14 V
[(14 /
VVCC) ×
100] %
DCMAX
Maximum output PWM duty cycle
DCMIN
Minimum output PWM duty cycle device
needs to guarantee (irrespective of input
PWM DC)
DCON_MIN
Minimum input duty cycle that device uses
to drive motor
1.5 %
DCSTEP
Duty cycle step size/resolution
0.2 %
VIH(AUTO)
PWM input high voltage for auto detection
VIL(AUTO)
PWM input low voltage for exiting PWM
mode
Rpu(PWM)
Internal PWM pullup resistor to V3P3
Lower duty cycle from 15% down
0.6
V
100
kHz
15%
1.62
1.695
1.77
V
1.315
1.39
1.465
V
120
kΩ
LOW-POWER MODE
t(EX_LPM)
PWM pulse duration to exit low-power
mode
V(EX_LPM)
PWM voltage to exit low-power mode
t(EN_LPM)
PWM low time to enter low-power mode
PWM > VIH(DIG)
PWM < VIL(DIG);motor stationary
1
µs
1.5
V
25
ms
PWM - ANALOG MODE
VANA_FS
Analog full-speed voltage
1.8
V
VANA_ZS
Analog zero-speed voltage
Rout(PWM)
External analog driver output impedance
tSAM
Analog speed sample period
320
µs
VANA_RES
Analog voltage resolution
3.5
mV
10
Hz
20
mV
50
kΩ
DIGITAL I/O (FG OUTPUT, FR INPUT)
fFG_MIN
Minimum FG output frequency during
coast
VIH(FR)
Input high
VIL(FR)
Input low
I(FG_SINK)
Output sink current, FG
Rpu(FG)
Internal FG pullup resistor to 3.3V
Rpd(FR)
Internal FR pulldown resistor to ground
2.2
V
0.6
VO = 0.3 V
5
V
mA
20
kΩ
100
kΩ
LOCK DETECTION RELEASE TIME
t(LOCK_OFF)
Lock release time
5
s
OVERCURRENT PROTECTION
IOC_limit
Overcurrent protection
tOC_retry
Overcurrent protection retry time
TA = 25°C
2.5
A
5
s
THERMAL SHUTDOWN
TSD
Shutdown temperature threshold
TSD(hys)
Shutdown temperature threshold
hysteresis
8
140
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150
°C
15
°C
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Electrical Characteristics (continued)
over operating junction temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
LEAD ANGLE
ADVselect
Lead angle selection
VCC = 12 V, R(ADV) = 10.7 kΩ ±1%
10
VCC = 12 V, R(ADV) = 14.3 kΩ ±1%
25
VCC = 12 V, R(ADV) = 17.8 kΩ ±1%
50
VCC = 12 V, R(ADV) = 22.1 kΩ ±1%
100
VCC = 12 V, R(ADV) = 28 kΩ ±1%
150
VCC = 12 V, R(ADV) = 34 kΩ ±1%
200
VCC = 12 V, R(ADV) = 41.2 kΩ ±1%
250
VCC = 12 V, R(ADV) = 49.9 kΩ ±1%
300
VCC = 12 V, R(ADV) = 59 kΩ ±1%
400
VCC = 12 V, R(ADV) = 71.5 kΩ ±1%
500
VCC = 12 V, R(ADV) = 86.6 kΩ ±1%
600
VCC = 12 V, R(ADV) = 105 kΩ ±1%
700
VCC = 12 V, R(ADV) = 124 kΩ ±1%
800
VCC = 12 V, R(ADV) = 150 kΩ ±1%
900
VCC = 12 V, R(ADV) = 182 kΩ ±1%
1000
µs
ACCELERATION RAMP RATE
RMPselect
RMP selection for acceleration profile
VCC = 12 V, R(RMP) = 7.32 kΩ ±1%
0
VCC = 12 V, R(RMP) = 10.7 kΩ ±1%
1
VCC = 12 V, R(RMP) = 14.3 kΩ ±1%
2
VCC = 12 V, R(RMP) = 17.8 kΩ ±1%
3
VCC = 12 V, R(RMP) = 22.1 kΩ ±1%
4
VCC = 12 V, R(RMP) = 28 kΩ ±1%
5
VCC = 12 V, R(RMP) = 34 kΩ ±1%
6
VCC = 12 V, R(RMP) = 41.2 kΩ ±1%
7
VCC = 12 V, R(RMP) = 49.9 kΩ ±1%
8
VCC = 12 V, R(RMP) = 59 kΩ ±1%
9
VCC = 12 V, R(RMP) = 71.5 kΩ ±1%
10
VCC = 12 V, R(RMP) = 86.6 kΩ ±1%
11
VCC = 12 V, R(RMP) = 105 kΩ ±1%
12
VCC = 12 V, R(RMP) = 124 kΩ ±1%
13
VCC = 12 V, R(RMP) = 150 kΩ ±1%
14
VCC = 12 V, R(RMP) = 182 kΩ ±1%
15
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6.6 Typical Characteristics
0.8
4.98
4.97
0.7
4.95
0.6
4.94
0.5
rDS(on) (:)
ICC (mA)
4.96
4.93
4.92
0.4
4.91
0.3
4.9
0.2
4.89
0.1
4.88
4.87
0
5
10
VCC (V)
15
20
0
-40
-20
D001
0
20
40
Temperature (°C)
60
80
100
D002
VCC = 12 V
Figure 1. Supply Current vs Power Supply
10
Figure 2. rDS(on) vs Temperature When VCC = 12 V
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7 Detailed Description
7.1 Overview
The DRV10974 device is a three-phase sensorless motor driver with integrated power MOSFETs, which provide
drive-current capability up to 1 A continuous (rms). The device is specifically designed for low-noise, low
external-component count, 12-V motor-drive applications. The 180° commutation requires no configuration
beyond setting the peak current, the lead angle, and the acceleration profile, each of which is configured by an
external resistor.
The 180° sensorless-control scheme provides sinusoidal output voltages to the motor phases as shown in
Figure 3.
Figure 3. 180° Sensorless-Control Scheme
Interfacing to the DRV10974 device is simple and intuitive. The DRV10974 device receives a PWM input that it
uses to control the speed of the motor. The duty cycle of the PWM input is used to determine the magnitude of
the voltage applied to the motor. The resulting motor speed can be monitored on the FG pin. The FR pin is used
to control the direction of rotation for the motor. The acceleration ramp rate is controlled by the RMP pin. The
current limit is controlled by a resistor on the CS pin. The lead angle is controlled by a resistor on the ADV pin.
When the motor is not spinning, a low-power mode turns off unused circuits to conserve power.
The DRV10974 device features extensive protection and fault-detect mechanisms to ensure reliable operation.
The device provides overcurrent protection without the requirement for an external current-sense resistor. Rotorlock detect uses several methods to reliably determine when the rotor stops spinning unexpectedly. The device
provides additional protection for undervoltage lockout (UVLO), for thermal shutdown, and for phase short circuit
(phase to phase, phase to ground, phase to supply).
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7.2 Functional Block Diagram
VCC
VCC
VCP
VCC
VCC
VCP
VCC
Charge
Pump
Linear Reg
U
V1P8
Phase U
predriver
VCC
Linear Reg
V3P3
V3P3
PWM
VCC
VCP
VCC
V
FR
Phase V
predriver
RMP
ADC
(4 bit)
Core
Logic
VCC
VCP
VCC
CS
W
ADC
(3 bit)
Phase W
predriver
ADV
ADC
(4 bit)
V3P3
Lock
FG
Overcurrent
Thermal
GND
PGND
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7.3 Feature Description
7.3.1 Speed Input and Control
The DRV10974 device has a three-phase 25-kHz PWM (fPWM_OUT) output that has an average value of sinusoidal
waveforms from phase to phase as shown in Figure 4. When any phase is measured with reference to ground,
the waveform observed is a PWM-encoded sinusoid coupled with third-order harmonics as shown in Figure 5.
This encoding scheme simplifies the driver requirements because one phase output is always equal to zero.
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Feature Description (continued)
U-V
U
V-W
V
W-U
W
Sinusoidal Voltage from Phase to Phase
Sinusoidal Voltage from Phase to GND
With 3rd-Order Harmonics
Figure 4. Sinusoidal Voltage
PWM output
Average value
Figure 5. PWM Encoded Phase Output and the Average Value
The output amplitude is determined by the supply voltage (VCC) and the PWM-commanded duty cycle (PWM) as
calculated in Equation 1 and shown in Figure 6. The maximum amplitude is applied when the commanded PWM
duty cycle is slightly less than 100% in order to keep the 25-kHz PWM rate (fPWM_OUT).
Vph pk PWMdc u VCC
(1)
100% PWM input
100% peak output
50% PWM input
50% peak output
VM
VM/2
Figure 6. Output Voltage Amplitude Adjustment
The motor speed is controlled indirectly by using the PWM command to control the amplitude of the phase
voltages which are applied to the motor. The PWM pin can be driven by either a digital duty cycle or an analog
voltage.
The duty cycle of the PWM input (PWM) is passed through a low-pass filter that ramps from 0% to 100% duty
cycle in 120 ms. The control resolution is approximately 0.2% (DCSTEP). The signal path from PWM input to
PWM motor is shown in Figure 7.
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Amplitude of Output
Sine Wave
PWM Input
PWM Output
LPF
Figure 7. PWM Command Input Control Diagram
The output peak amplitude is described by Equation 1 when PWMdc > 15% (the minimum-operation duty cycle).
When the PWM-commanded duty cycle is lower than the minimum-operation duty cycle and higher than 1.5%
(DCON_MIN), the output is controlled the by the minimum-operation duty cycle (DCMIN). This is shown in Figure 8
for analog input, and for duty cycles greater than 1.5% (DCON_MIN) for digital input. If the supply voltage (VVCC) >
14 V, the maximum PWMdc is limited to 14 V / VVCC.
511 100%
Applied Duty Cycle Æ
PWM Mode
LOW-POWER
ENTRY
LOW-POWER
EXIT
15%
76
ton = t(EX_LPM)
0
ton d 100 ns
0
15%
76
PWM duty Æ
100%
511
Figure 8. PWM-Mode Speed-Control Transfer Function
When the PWM pin is driven with an analog voltage, the output peak amplitude depends on the supply voltage,
the analog voltage on the PWM pin (VANA), and the voltage of V1P8 (VV1P8). This is shown in Equation 2:
VANA
Vph pk
u VCC
V1P8
(2)
Note the output peak amplitude is described by Equation 2 when the VANA > 0.27 V or 15% of 1.8 V. This is the
equivalent of the minimum-operation duty cycle percentage of 15% (DCMIN). When the analog voltage on the
PWM pin is lower than the minimum-operation duty-cycle percentage but higher than the zero-speed analog
voltage (VANA_ZS), the output is controlled by the minimum-operation duty cycle. When the analog voltage on the
PWM pin is below zero-speed analog voltage, the DRV10974 enters low-power mode. This is shown in Figure 9.
14
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Analog Mode
V(EX_LPM) = 1.5 V
LOW-POWER
EXIT
Applied Duty Cycle Æ
511 100%
15%
LOW-POWER
ENTRY
Motor Speed = 0
76
0
0
VANA_ZS
15%
0.27 V Analog Voltage (VANA) Æ
100%
1.8 V
Figure 9. Analog-Mode Speed-Control Transfer Function
7.3.2 Motor Direction Change
The DRV10974 device can be easily configured to drive the motor in either direction by setting the input on the
FR (forward-reverse) pin to a logic 1 or logic 0 state. The direction of commutation as described by the
commutation sequence is defined as follows:
FR = 0
U→V→W
FR = 1
U→W→V
7.3.3 Motor-Frequency Feedback (FG)
During operation of the DRV10974 device, the FG pin provides an indication of the speed of the motor. The FG
pin toggles at a rate of one time during an electrical cycle. Using this information and the number of pole pairs in
the motor, use Equation 3 to calculate the mechanical speed of the motor.
¦(FG) u
RPM
pole _ pairs
(3)
During open-loop acceleration the FG pin indicates the frequency of the signal that is driving the motor. The lock
condition of the motor is unknown during open-loop acceleration and therefore the FG pin could toggle during
this time even though the motor is not moving.
During spin down, the DRV10974 device continues to provide speed feedback on the FG pin. The DRV10974
device provides the output of the U-phase comparator on the FG pin until the motor speed drops below 10 Hz
(fFG_MIN). When the motor speed falls below 10 Hz, the device enters into the low-power mode and the FG output
is held at a logic high.
7.3.4 Lock Detection
When the motor is locked by some external condition, the DRV10974 device detects the lock condition and acts
to protect the motor and the device. The lock condition must be properly detected whether the condition occurs
as a result of a slowly increasing load or a sudden shock.
The DRV10974 device reacts to the lock condition by stopping the motor drive. To stop driving the motor, the
phase outputs are placed into a high-impedance state. After successfully transitioning into a high-impedance
state as the result of a lock condition, the DRV10974 device attempts to restart the motor after t(LOCK_OFF)
seconds.
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The DRV10974 device has a comprehensive lock-detect function that includes six different lock-detect schemes.
Each of these schemes detects a particular condition of the lock as shown in Figure 10.
Kt Measure
No Motor
HighImpedance and
Restart Logic
Open Loop Abnormal
BEMF Abnormal
Closed Loop Abnormal
Speed Abnormal
Figure 10. Lock Detect
The following sections describe each lock-detect scheme.
7.3.4.1 Lock Kt Measure
The DRV10974 device measures the actual Kt of the motor when transitioning from open-loop acceleration to
closed-loop acceleration. If the measured Kt is less than 200 mV, the device indicates that the handoff Kt level
was not properly reached and the lock is triggered.
7.3.4.2 Lock No Motor
The phase-U current is checked at the end of the align state. If the phase-U current is not greater than 50 mA,
then the motor is not connected. This condition is reported as a lock condition.
7.3.4.3 Lock Open Loop Abnormal
Transition from open loop to closed loop is based on the estimated value of BEMF. If during open-loop
acceleration the electrical commutation rate exceeds 200 Hz without reaching the handoff threshold, this lock is
triggered.
7.3.4.4 Lock BEMF Abnormal
For any specific motor, the integrated value of BEMF during half of an electrical cycle is a constant as shown by
the shaded gray area in Figure 11. This value is constant regardless of whether the motor runs fast or slow. The
DRV10974 device monitors this value and uses it as a criterion to determine if the motor is in a lock condition.
The DRV10974 device uses the integrated BEMF to determine the Kt value of the motor during the initial motor
start. Based on this measurement, a range of acceptable Kt values is established. Then, during closed-loop
motor operation the Ktc (Kt calculated) value is continuously updated. Finally, the Ktc value is checked to see if it
is within the range between ½ Kt and 2Kt. If the Ktc value goes beyond the acceptable range, a lock condition is
triggered as shown in Figure 12. Note, there is a blanking period of 0.3 s after the transition from open loop to
closed loop where the abnormal BEMF lock is momentarily disabled. The device uses this time to finalize the Kt
value that Ktc is compared against.
Figure 11. BEMF Integration
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Kt
Kt_high = 2 Kt
Ktc
Kt
Kt_low = 0.5 Kt
time
Lock detect
Figure 12. Abnormal Kt Lock Detect
7.3.4.5 Lock Closed Loop Abnormal
This lock condition is active when the DRV10974 device is operating in the closed-loop mode. The motor is
indicated as not moving when the closed-loop commutation period becomes lower than half the previous
commutation period. This condition triggers the closed-loop abnormal-lock condition.
7.3.4.6 Lock Speed Abnormal
If the motor is in normal operation, the motor BEMF is always less than the voltage applied to the phase. The
sensorless-control algorithm of the DRV10974 device is continuously updating the value of the motor BEMF
based on the speed of the motor and the motor Kt as shown in Figure 13. If the calculated value for motor BEMF
is 1.5 times higher than the applied voltage on phase U (VU) for an electrical period then an error is present in
the system, and the calculated value for motor BEMF is wrong or the motor is out of phase with the commutation
logic. When this condition is detected, a lock is triggered.
Rm
VU
M
BEMF = Kt × speed
VU
Kt
Lock is triggered
If speed >
Figure 13. BEMF Monitoring
7.3.5 Soft Current-Limit
The current-limit function provides active protection for preventing damage as a result of high current. The soft
current-limit does not use direct-current measurement for protection, but rather, uses the measured motor
resistance (Rm) and motor velocity constant (Kt) to limit the voltage applied to the phase (U) such that the
current does not exceed the limit value (I(LIMIT)). The soft current-limit scheme is shown in Figure 14 based on the
calculation in Equation 4.
The soft current-limit is only active when in normal closed-loop mode and does not result in a fault condition nor
does it result in the motor being stopped. The soft current-limit is typically useful for limiting the current that
results from heavy loading during motor acceleration. The I(LIMIT) current is configured by an external resistor
(R(CS)) as shown in Table 1.
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Rm
VU = BEMF + I × Rm
If VU < BEMF + I(LIMIT) × Rm
I < I(LIMIT)
M
BEMF = Kt × speed
Current Limit:
VUmax = BEMF + I(LIMIT) × Rm
Figure 14. Current Limit
Use Equation 4 to calculate the I(LIMIT) value.
V(U)LIMIT - Speed ´ Kt
I (LIMIT) =
Rm
(4)
Table 1 can be used to determine the I(LIMIT) value.
Table 1. Soft Current-Limit Selections
(1)
R(CS) [kΩ] (1)
I(LIMIT) [mA]
7.32
200
16.2
400
25.5
600
38.3
800
54.9
1000
80.6
1200
115
1400
182
1600 (1500 during align)
All resistors are ±1 %.
Spacer
NOTE
The soft current-limit is not correct if the motor is out of phase with the commutation
control logic (locked rotor). The soft current-limit is not effective under this condition.
7.3.6 Short-Circuit Current Protection
The short-circuit current protection function shuts off drive to the motor by placing the motor phases into a highimpedance state if the current in any motor phase exceeds the short-circuit protection limit I(OC_LIMIT). The
DRV10974 device goes through the initialization sequence and attempts to restart the motor after the shortcircuit condition is improved. This function is intended to protect the device and the motor from catastrophic
failure when subjected to a short-circuit condition.
7.3.7 Overtemperature Protection
The DRV10974 device has a thermal shutdown function which disables the motor operation when the device
junction temperature has exceeded the TSD temperature. Motor operation resumes when the junction
temperature becomes lower than TSD – TSD(hys).
7.3.8 Undervoltage Protection
The DRV10974 device has an undervoltage lockout feature, which prevents motor operation whenever the
supply voltage (VCC) becomes too low. Upon power up, the DRV10974 device operates when VCC rises above
V(UVLO_F) + Vhys(UVLO). The DRV10974 device continues to operate until VCC falls below V(UVLO_F).
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7.4 Device Functional Modes
7.4.1 Spin-Up Settings
7.4.1.1 Motor Start
The DRV10974 device starts the motor using a procedure which is shown in Figure 15.
Power On (low
power mode)
PWM > 1 us
Initial Speed
Detection / Coast
FR Pin Change
Y
f < 10Hz or
t>5s
N
Temp <
threshold-hys
Y
N
Y
t=5s
Align
Y
N
UVLO
Over temp
t=5s
N
Sleep
Over current
Measure Motor
Resistance
Lock
Open Loop
Acceleration
Acceleration profile from
RMP pin
Coast / Measure Kt
Closed Loop
Acceleration / Run
Acceleration profile from
RMP pin
Figure 15. DRV10974 Initialization and Motor Start-Up Sequence
7.4.1.2 Initial Speed Detect
Every time the DRV10974 device exits low-power mode, it determines if the motor is spinning using a function
called initial speed detect. If the frequency on the FG pin is less than 10 Hz, the motor is considered stationary. If
the frequency is greater than 10 Hz the motor is decelerated until it is below 10 Hz or a 5-second time-out has
occurred.
7.4.1.3 Align
To align the rotor to the commutation logic, the DRV10974 device applies a current equivalent to the closed-loop
run current to phase U by driving phases V and W equally. This condition is maintained for a maximum of 0.67 s
(tALIGN). To avoid a sudden change in current that could result in undesirable acoustics, the voltage applied to the
motor is changed gradually to obtain a current change of 12 A/s.
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Device Functional Modes (continued)
7.4.2 Open-Loop Acceleration
After the motor is confirmed to be stationary and after completing the motor initialization, the DRV10974 device
begins to accelerate the motor. This acceleration is accomplished by applying a voltage to the motor at the
appropriate drive state and increasing the rate of commutation without regard to the actual position of the motor
(referred to as open-loop operation). The function of the open-loop operation is to drive the motor to a minimum
speed so that the motor generates sufficient BEMF to allow the commutation control logic to drive the motor
accurately.
The motor start-up profile can be configured using an external resistor to set the acceleration profile before
transitioning to closed-loop operation. Figure 16 shows this acceleration profile. During closed-loop operation the
RMP pin controls the closed-loop acceleration and deceleration. Table 2 lists the selectable acceleration
parameters.
Table 2. Acceleration Profile Settings
RMP SELECTION
RRMP [kΩ] (1)
Accel2 [Hz/s2]
Accel1 [Hz/s]
CLOSED-LOOPACCELERATION
TRANSITION TIME
[s] (2)
CLOSED-LOOPDECELERATION
TRANSITION TIME
[s] (3)
0
7.32
0.22
4.6
2.7
44
1
10.7
1.65
9.2
2.7
22
2
14.3
1.65
15
1
22
3
17.8
3.3
25
1
11
4
22.1
7
25
0.2
44
5
28
7
35
0.2
22
6
34
14
50
0.2
22
7
41.2
27
75
0.2
11
8
49.9
27
75
5.4
11
9
59
14
50
8
22
10
71.5
7
35
11
22
11
86.6
7
25
22
44
12
105
3.3
25
5.4
11
13
124
1.65
15
8
22
14
150
1.65
9.2
11
22
15
182
0.22
4.6
22
44
(1)
(2)
(3)
20
All resistors are ±1%
Time to transition from 0 to 100% duty cycle.
Time to transition from 100% to 0% duty cycle.
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Speed = Accel1 x t + 0.5 x Accel2 x t2
Speed
Closed Loop
Align Time
Time
Open Loop Acceleration
Figure 16. Start-Up Profile
7.4.3 Start-Up Current Sensing
The start-up peak current is controlled by the current-sense limit resistor, R(CS). The start current is set by
selecting the R(CS) resistor based on Table 3. The current should be selected to allow the motor to accelerate
reliably to the handoff threshold. Heavier loads may require a higher current setting, but the rate of acceleration
is limited by the selected resistor, R(RMP).
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Table 3. Start-Up Current Limit
(1)
R(CS) [kΩ] (1)
I(LIMIT) [mA]
7.32
200
16.2
400
25.5
600
38.3
800
54.9
1000
80.6
1200
115
1400
182
1600 (1500 for align)
All resistors are ±1%.
7.4.4 Closed Loop
When the motor accelerates to the target BEMF threshold, commutation control transitions from open-loop mode
to closed-loop mode. During this transition, the motor is allowed to coast for one electrical cycle to measure Kt.
The commutation drive sequence and timing are determined by the internal control algorithm, and the applied
voltage is determined by the PWM-commanded duty-cycle input. The closed-loop acceleration and deceleration
values are provided in Table 2.
7.4.5 Control Advance Angle
To achieve the best efficiency, the drive state of the motor must be controlled such that the current is aligned
with the BEMF voltage of the motor. Figure 17 illustrates the operation when the drive angle has been optimized.
For complete flexibility, the DRV10974 device offers a wide range of fixed lead times. The options for lead time
are controlled by a resistor on the ADV pin. The values available are shown in Table 4.
U phase voltage
U phase BEMF
U phase current
û§
Figure 17. Drive Angle Adjustment
22
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Table 4. Lead Time Selection
(1)
RADV [kΩ] (1)
LEAD TIME [µs]
10.7
10
14.3
25
17.8
50
22.1
100
28
150
34
200
41.2
250
49.9
300
59
400
71.5
500
86.6
600
105
700
124
800
150
900
182
1000
All resistors are ±1%.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DRV10974 device is used in sensorless 3-phase BLDC motor control. The driver provides a highperformance, high-reliability, flexible, and simple solution for appliance fan, pump, and blower applications. The
following design shows a common application of the DRV10974 device.
8.2 Typical Application
1
ADV
GND
16
FR
2
FR
VCP
15
FG
3
FG
VCC
14
PWM IN
4
PWM
W
13
5
V1P8
V
12
6
RMP
U
11
7
GND
PGND
10
8
CS
NC
9
59k
10uF
100nF
M
VCC
1 µF
7.32k
115k
Figure 18. Typical Application Schematic
Table 5. Recommended External Components
24
NODE 1
NODE 2
COMPONENT
VCC
GND
10-μF, 25-V ceramic capacitor tied from VCC to ground
VCP
VCC
100-nF, 10-V ceramic capacitor tied from VCP to VCC
V1P8
GND
1-μF ±30%, 6.3-V ceramic capacitor tied from V1P8 to ground
RMP
GND
1%, 1/8 watt resistor tied from RMP to ground to set the desired acceleration profile
CS
GND
1%, 1/8-watt resistor tied from CS to ground to set the desired current limit
ADV
GND
1%, 1/8-watt resistor tied from ADV to ground to set the desired lead angle (time)
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8.2.1 Design Requirements
Table 6 provides design input parameters and motor parameters for system design.
Table 6. Recommended Application Range
Motor voltage
MIN
NOM
MAX
4.4
12
18
UNIT
V
BEMF constant
Phase to center tap, measured while motor is coasting
5
150
mV/Hz
Motor phase resistance
Phase to center tap
1
20
Ω
Motor electrical
constant
1 phase; inductance divided by resistance, measured phase to
phase, yields the electrical constant for 1 phase.
100
5000
μs
1
A
2.5
A
Motor winding current
(rms)
Absolute maximum
current
During locked condition
8.2.2 Detailed Design Procedure
Assuming the motor used in the application falls within the recommended application range shown in Table 6, the
DRV10974 device is simple and intuitive to interface with. The DRV10974 device receives a PWM input that it
uses to control the speed of the motor. The duty cycle of the PWM input is used to determine the magnitude of
the voltage applied to the motor. The resulting motor speed can be monitored on the FG pin. The FR pin is used
to control the direction of rotation for the motor. As a result, the only configuration and customization is dictated
by the RMP, ADV, and CS pins.
The resistor on the CS pin is usually determined by the application specifications. Because the CS pin
determines the current limit, specifications such as motor current or input power can determine what value the
current limit can be set to. Then, the RMP and ADV resistors must be set experimentally through tuning. The
RMP pin sets the acceleration profile of the motor. If the RMP pin is set to faster acceleration, the motor starts up
faster but may be more likely to fail start-up. In addition, the ADV resistor controls the lead time so the applied
current is aligned with the BEMF of the motor. If the ADV resistor is incorrectly selected, the motor may not run
efficiently or at all.
As a result, the RMP pin is usually set to the slowest profile while ADV is correctly tuned. Then, the RMP can be
set to a different value that allows for a faster acceleration with no impact to start-up reliability. This process, and
other design considerations, are documented extensively in the DRV10974 Technical Documents tab on the
DRV10974 product page.
8.2.3 Application Curves
Figure 19. DRV10974 Operation Current Waveform
Figure 20. DRV10974 Start-Up Waveform
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9 Power Supply Recommendations
The DRV10974 device is designed to operate from an input voltage supply, VCC , range between 4.4 V and 18 V.
The user must place a minimum of a 10-µF capacitor rated for VCC between the VCC and GND pins and as close
as possible to the VCC and GND pins.
If the power supply ripple is more than 200 mV, in addition to the local decoupling capacitors, a bulk capacitance
is required and must be sized according to the application requirements.
10 Layout
10.1 Layout Guidelines
•
•
•
•
•
Use thick traces when routing to the VCC, GND, U, V, and W pins, because high current passes through these
traces.
Place the 10-µF capacitor between VCC and GND, and as close to the VCC and GND pins as possible.
Place the 100-nF capacitor between VCP and VCC, and as close to the VCP and VCC pins as possible.
Connect GND and PGND under the thermal pad.
Keep the thermal pad connection as large as possible. It should be one piece of copper without any gaps.
10.2 Layout Example
ADV
1
16
GND
FR
2
15
VCP
10 mF
100 nF
FG
59 kW
1 mF
3
GND
(Thermal pad)
14
VCC
13
W
PWM
4
V1P8
5
12
V
RMP
6
11
U
GND
7
10
PGND
CS
8
9
NC
7.32 kW
115 kW
GND
Figure 21. HTSSOP Layout Example
26
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Copyright © 2018, Texas Instruments Incorporated
Product Folder Links: DRV10974
DRV10974
www.ti.com
SLVSDN2C – JANUARY 2018 – REVISED SEPTEMBER 2018
1uF
FG
1
PWM
2
V1P8
3
RMP
4
GND
14
VCP
ADV
15
13
FR
16
59k
100nF
10uF
Layout Example (continued)
GND
(PPAD)
12
VCC
11
W
10
V
9
U
115k
8
7
PGND
NC
6
CS
GND
5
7.32k
GND
Figure 22. QFN Layout Example
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Copyright © 2018, Texas Instruments Incorporated
Product Folder Links: DRV10974
27
DRV10974
SLVSDN2C – JANUARY 2018 – REVISED SEPTEMBER 2018
www.ti.com
11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated device. This data is subject to change without notice and without
revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane.
28
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Copyright © 2018, Texas Instruments Incorporated
Product Folder Links: DRV10974
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
DRV10974PWPR
ACTIVE
HTSSOP
PWP
16
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 125
10974
DRV10974RUMR
ACTIVE
WQFN
RUM
16
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 125
DRV
10974
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2018
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Feb-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
DRV10974PWPR
HTSSOP
PWP
16
2000
330.0
12.4
DRV10974RUMR
WQFN
RUM
16
3000
330.0
12.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
6.9
5.6
1.6
8.0
12.0
Q1
4.25
4.25
1.15
8.0
12.0
Q2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Feb-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
DRV10974PWPR
HTSSOP
PWP
16
2000
350.0
350.0
43.0
DRV10974RUMR
WQFN
RUM
16
3000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
PWP0016J
TM
PowerPAD TSSOP - 1.2 mm max height
SCALE 2.500
SMALL OUTLINE PACKAGE
C
6.6
TYP
6.2
A
SEATING
PLANE
0.1 C
PIN 1 INDEX
AREA
14X 0.65
16
1
2X
5.1
4.9
NOTE 3
4.55
8
9
B
0.30
0.19
0.1
C A B
4.5
4.3
16X
(0.15) TYP
SEE DETAIL A
9
8
0.25
GAGE PLANE
3.55
2.68
0 -8
16
1
2.46
1.75
1.2 MAX
0.15
0.05
0.75
0.50
DETAIL A
A 20
TYPICAL
THERMAL
PAD
4223595/A 03/2017
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PWP0016J
TM
PowerPAD TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(3.4)
NOTE 8
METAL COVERED
BY SOLDER MASK
(2.46)
16X (1.5)
16X (0.45)
SEE DETAILS
SYMM
1
16
(1.3) TYP
(R0.05) TYP
(0.65)
SYMM
(3.55)
(5)
NOTE 8
14X (0.65)
( 0.2) TYP
VIA
8
9
(1.35) TYP
SOLDER MASK
DEFINED PAD
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4223595/A 03/2017
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
8. Size of metal pad may vary due to creepage requirement.
9. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged
or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
PWP0016J
TM
PowerPAD TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(2.46)
BASED ON
0.125 THICK
STENCIL
16X (1.5)
16X (0.45)
METAL COVERED
BY SOLDER MASK
1
16
(R0.05) TYP
(3.55)
BASED ON
0.125 THICK
STENCIL
SYMM
14X (0.65)
9
8
SYMM
(5.8)
SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
0.125
0.15
0.175
2.75 X 3.97
2.46 X 3.55 (SHOWN)
2.25 X 3.24
2.08 X 3.00
4223595/A 03/2017
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
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