Texas Instruments | ATL431LI / ATL432LI High Bandwidth Low-Iq Programmable Shunt Regulator (Rev. D) | Datasheet | Texas Instruments ATL431LI / ATL432LI High Bandwidth Low-Iq Programmable Shunt Regulator (Rev. D) Datasheet

Texas Instruments ATL431LI / ATL432LI High Bandwidth Low-Iq Programmable Shunt Regulator (Rev. D) Datasheet
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ATL431LI
ATL432LI
SLVSDU6D – JULY 2017 – REVISED NOVEMBER 2019
ATL431LI / ATL432LI High Bandwidth Low-Iq Programmable Shunt Regulator
1 Features
3 Description
•
The ATL43xLI device is a three-terminal adjustable
shunt regulator, with specified thermal stability over
applicable automotive, commercial, and military
temperature ranges. The output voltage can be set to
any value between Vref (approximately 2.5 V) and 36
V, with two external resistors. These devices have a
typical output impedance of 0.3 Ω. Active output
circuitry provides a very sharp turn-on characteristic,
making these devices excellent replacements for
Zener diodes in many applications, such as onboard
regulation, adjustable power supplies, and switching
power supplies. This device is a pin-to-pin alternative
to the TL431LI and TL432LI, with lower minimum
operating current to help reduce system power
consumption. The ATL432LI device has exactly the
same functionality and electrical specifications as the
ATL431LI device, but has a different pinout for the
DBZ package. The ATL431LI is also offered in a tiny
X2SON (1.00 mm x 1.00 mm) package which makes
it ideal for space constraint applications.
1
•
•
•
•
•
•
•
•
•
Reference voltage tolerance at 25°C
– 0.5% (B Grade)
– 1% (A Grade)
Minimum typical output voltage: 2.5 V
Adjustable output voltage: Vref to 36 V
Operation from −40°C to +125°C (Q temp)
Maximum temperature drift
– 17 mV (I Temp)
– 27 mV (Q Temp)
0.3-Ω Typical output impedance
Sink-current capability
– Imin = 0.08 mA (max)
– IKA = 15 mA (max)
Reference input current IREF: 0.4 μA (max)
Deviation of reference input current over
temperature, II(dev): 0.3 μA (max)
Packages: 1-mm x 1-mm X2SON or SOT23-3
The ATL431LI device is offered in two grades, with
initial tolerances (at 25°C) of 0.5%, and 1%, for the B
and A grade, respectively. In addition, low output drift
versus temperature ensures good stability over the
entire temperature range.
2 Applications
•
•
•
•
•
•
Adjustable voltage and current referencing
Secondary side regulation in Flyback SMPS
Zener diode replacement
Voltage monitoring
Precision constant current sink/source
Comparator with integrated reference
The ATL43xLIxQ devices are characterized for
operation from –40°C to +125°C.
Device Information(1)
PART NUMBER
PACKAGE (PIN)
BODY SIZE (NOM)
ATL43xLI
SOT-23 (3)
2.90 mm x 1.30 mm
ATL431LI
X2SON (4)
1.00 mm x 1.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
VKA
Input
IKA
Vref
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
ATL431LI
ATL432LI
SLVSDU6D – JULY 2017 – REVISED NOVEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
4
4
4
4
5
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Thermal Information ..................................................
Recommended Operating Conditions.......................
Electrical Characteristics...........................................
Typical Characteristics.......................................... 6
Parameter Measurement Information .................. 9
9.1 Temperature Coefficient............................................ 9
9.2 Dynamic Impedance ............................................... 10
10 Detailed Description ........................................... 11
10.1 Overview ............................................................... 11
10.2 Functional Block Diagram ..................................... 11
10.3 Feature Description............................................... 12
10.4 Device Functional Modes...................................... 12
11 Applications and Implementation...................... 13
11.1 Application Information.......................................... 13
11.2 Typical Applications .............................................. 13
11.3 System Examples ................................................. 21
12 Power Supply Recommendations ..................... 25
13 Layout................................................................... 25
13.1
13.2
13.3
13.4
Layout Guidelines .................................................
SOT23-3 Layout Example.....................................
X2SON (DQN) Layout Example............................
Thermal Considerations ........................................
25
25
25
26
14 Device and Documentation Support ................. 27
14.1
14.2
14.3
14.4
14.5
14.6
14.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
27
27
27
27
27
27
28
15 Mechanical, Packaging, and Orderable
Information ........................................................... 28
4 Revision History
Changes from Revision C (August 2019) to Revision D
Page
•
Changed typical graph to match Electrical Characteristics ................................................................................................... 6
•
Added X2SON (DQN) Layout Example ............................................................................................................................... 25
•
Added Thermal Considerations ............................................................................................................................................ 26
Changes from Revision B (November 2018) to Revision C
Page
•
Changed Imin description to match Electrical Characteristics ................................................................................................. 1
•
Added X2SON package option .............................................................................................................................................. 1
•
Added X2SON pinout and specifications................................................................................................................................ 3
Changes from Revision A (October 2018) to Revision B
•
Page
Changed ATL43xLI from Product Preview to Production Data. ............................................................................................. 1
Changes from Original (July 2018) to Revision A
Page
•
Initial release of full version ................................................................................................................................................... 1
•
Changed Stability Boundary Conditions for All ATL431, ATL432 Devices Above 1 mA graph ............................................. 7
•
Added Stability Boundary Conditions for All ATL431, ATL432 Devices Below 1 mA graph ................................................. 7
•
Added Test Circuit for Stability Boundary Conditions image ................................................................................................. 7
2
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SLVSDU6D – JULY 2017 – REVISED NOVEMBER 2019
5 Device Comparison Table
DEVICE PINOUT
INITIAL ACCURACY
OPERATING FREE-AIR TEMPERATURE (TA)
ATL431LI
ATL432LI
A: 1%
B: 0.5%
I: -40°C to 85°C
Q: -40°C to 125°C
6 Pin Configuration and Functions
ATL431LI DBZ Package
3-Pin SOT-23
Top View
CATHODE
1
REF
2
3
ATL431LI DQN Package
4-Pin X2SON
Top View
ANODE
Thermal
Pad
ATL432LI DBZ Package
3-Pin SOT-23
Top View
REF
CATHODE
1
ANODE
1
3
CATHODE
3
REF
4
ANODE
2
NC
2
Pin Functions
PIN
NAME
ATL431LIx
ATL431LIx
ATL432LIx
DBZ
DQN
DBZ
TYPE
ANODE
3
1
3
O
Common pin, normally connected to ground
CATHODE
1
3
2
I/O
Shunt Current/Voltage input
REF
2
4
1
I
NC
N/A
2
N/A
—
No internal connection
Thermal Pad
N/A
Available
N/A
—
Connect to ground or to a floating copper
plane for mechanical stability.
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DESCRIPTION
Threshold relative to common anode
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
VKA
Cathode Voltage (2)
IKA
Continuos Cathode Current Range
II(ref)
Reference Input Current
TJ
Tstg
(1)
(2)
MAX
UNIT
37
V
–10
18
mA
–5
10
mA
Operating Junction Temperature Range
–40
150
C
Storage Temperature Range
–65
150
C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to ANODE, unless otherwise noted.
7.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001pins (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22- ±1000
VC101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Thermal Information
ATL43xLI
THERMAL METRIC (1)
DBZ
DQN
3 PINS
4 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
371.7
173.7
C/W
RθJC(top)
Junction-to-case (top) thermal resistance
145.9
185.5
C/W
RθJB
Junction-to-board thermal resistance
104.7
119.9
C/W
ψJT
Junction-to-top characterization parameter
23.9
13.1
C/W
ψJB
Juction-to-board characterization parameter
102.9
119.9
C/W
RθJC(bottom)
Juction-to-case (bottom) thermal resistance
N/A
93.0
C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.4 Recommended Operating Conditions
See
(1)
MIN
MAX
UNIT
VKA
Cathode Voltage
VREF
36
V
IKA
Continuous Cathode Current Range
0.08
15
mA
TA
Operating Free-Air Temperature
ATL43xLIxI
–40
85
C
ATL43xLIxQ
–40
125
C
(1)
4
Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
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SLVSDU6D – JULY 2017 – REVISED NOVEMBER 2019
7.5 Electrical Characteristics
over recommended operating conditions, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CIRCUIT
VREF
Reference Voltage
VI(dev)
Deviation of reference
input voltage over full
temperature range (1)
See Figure 17
VKA = Vref, IKA = 1 mA
ΔVref /
ΔVKA
Ratio of change in
reference voltage to the
change in cathode
voltage
See Figure 18
IKA = 1 mA
Iref
Reference Input Current See Figure 18
II(dev)
Deviation of reference
input current over full
temperature range (1)
Imin
Minimum cathode
current for regulation
Ioff
Off-state cathode
current
|ZKA|
(1)
(2)
Dynamic Impedance
See Figure 17
TEST CONDITIONS
(2)
VKA = Vref, IKA = 1 mA
MIN
TYP MAX
UNIT
ATL43xLIAx devices
2475 2500 2525
mV
ATL43xLIBx devices
2487 2500 2512
mV
ATL43xLIxI devices
6
17
mV
ATL43xLIxQ devices
10
27
mV
–1.4
–2.7
mV/V
–1
–2
mV/V
IKA = 1 mA, R1 = 10kΩ, R2 = ∞
0.2
0.4
µA
See Figure 18
IKA = 1 mA, R1 = 10kΩ, R2 = ∞
0.1
0.3
µA
See Figure 17
VKA = Vref
65
80
uA
See Figure 19
VKA = 36 V, Vref = 0
0.1
1
µA
See Figure 17
VKA = Vref, IKA = 1 mA to 15 mA
0.3
0.65
Ω
ΔVKA = 10 V - Vref
ΔVKA = 36 V - 10 V
The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. For more details on VI(dev) and how it relates to the average temperature coefficient, see Parameter
Measurement Information.
The dynamic impedance is defined by |ZKA| = ΔVKA/ΔIKA. For more details on |ZKA| and how it relates to VKA, see Parameter
Measurement Information.
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8 Typical Characteristics
Data at high and low temperatures are applicable only within the recommended operating free-air temperature
ranges of the various devices.
2.505
1
2.502
2.5005
2.499
2.4975
2.496
2.4945
2.493
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
2.4915
2.49
-50
0
-50
-25 0
25 50 75 100 125 150
TA - Free-Air Temperature - °C
Figure 1. Reference Voltage vs Free-Air Temperature
-25
0
25
50
75 100
TA - Free-Air Temperature - °C
125
D002
Figure 2. Reference Current vs Free-Air Temperature
200
15
VKA = Vref
175 T = 25°C
A
VKA = Vref
TA = 25°C
12
IKA - Cathode Current - µA
IKA - Cathode Current - mA
IKA = 1 mA
0.9
Iref - Reference Current - µA
Vref - Reference Voltage - V
Vka = Vref
2.5035 I = 1 mA
KA
9
6
3
0
150
125
Imin
100
75
50
25
0
-25
-50
-3
0.5
1
1.5
2
2.5
VKA - Cathode Voltage -V
0.5
1
1.5
2
VKA - Cathode Voltage - V
D003
2.5
D004
Figure 3. Cathode Current vs Cathode Voltage
Figure 4. Cathode Current vs Cathode Voltage
0.064
-0.35
VKA = 36 V
0.056 VREF = 0 V
VKA = 3 V to 36 V
-0.4
-0.45
0.048
0.04
0.032
0.024
0.016
-0.5
-0.55
-0.6
-0.65
-0.7
0.008
-0.75
0
-50
-25
0
25
50
75 100
TA - Free-Air Temperature - °C
125
Figure 5. Off-State Cathode Current
vs Free-Air Temperature
6
0
3
'Vref / 'VKA = mV/V
Ioff - Off-State Cathode Current - PA
0
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-0.8
-50
-25
D004
0
25
50
75
Temperature (°C)
100
125
D006
Figure 6. Ratio of Delta Reference Voltage to Delta Cathode
Voltage vs Free-Air Temperature
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200
60
160
45
120
30
80
15
40
IKA = 10 mA
TA = 25°C
Output
Phase - q
AV - Small-Signal Voltage Amplification - dB
Typical Characteristics (continued)
75
IKA
15 kΩ
9 µF
+
AV
Phase
0
100
1k
10k
100k
f - Frequency - Hz
0
10M
1M
232 Ω
−
8.25 kΩ
D000
GND
Figure 7. Small-Signal Voltage Amplification
vs Frequency
Figure 8. Test Circuit for Voltage Amplification
|ZKA| - Reference Impedance - Ohms
100
1 kΩ
IKA = 1 mA
50 T = 25°C
A
30
20
IKA
10
50 Ω
5
3
2
−
+
1
GND
0.5
0.3
0.2
0.1
1k
10k
100k
f - Frequency - Hz
1M
Figure 9. Reference Impedance vs Frequency
Figure 10. Test Circuit for Reference Impedance
6
Input
Input and Output Voltage - V
Output
220 Ω
TA = 25qC
Output
5
Pulse
Generator
f = 100 kHz
4
3
Output
50 Ω
2
GND
1
0
-1
0
1
2
3
4
t - Time - Ps
5
6
7
puls
Figure 11. Pulse Response
Figure 12. Test Circuit for Pulse Response
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Typical Characteristics (continued)
150 Ω
15
IKA - Cathode Current - mA
13
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
IKA
Stable Region
+
11
VBATT
CL
−
9
7
TEST CIRCUIT FOR CURVE A
5
3
1
0.001
IKA
R1 = 10 kΩ
0.01
0.1
1
CL - Load Capacitance - µF
150 Ω
10
ATL4
The areas under the curves represent conditions that may cause the
device to oscillate. For curves B and C, R2 and V+ are adjusted to
establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL
then are adjusted to determine the ranges of stability.
Figure 13. Stability Boundary Conditions for All ATL431LI,
ATL432LI Devices Above 1 mA
CL
+
R2
VBATT
−
TEST CIRCUIT FOR CURVES B, C, AND D
Figure 14. Test Circuit for Stability Boundary Conditions
150 Ω
IKA - Cathode Current - mA
1
0.8
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
IKA
+
VBATT
CL
−
0.6
0.4
TEST CIRCUIT FOR CURVE A
Stable Region
0.2
IKA
0
0.001
R1 = 10 kΩ
0.01
0.1
1
CL - Load Capacitance - µF
150 Ω
10
ATL4
The areas in-between the curves represent conditions that may cause
the device to oscillate. For curves B, and C, R2 and V+ are adjusted
to establish the initial VKA and IKA conditions, with CL = 0. VBATT and
CL then are adjusted to determine the ranges of stability.
Figure 15. Stability Boundary Conditions for All ATL431LI,
ATL432LI Devices Below 1 mA
CL
+
R2
VBATT
−
TEST CIRCUIT FOR CURVES B, C, AND D
Figure 16. Test Circuit for Stability Boundary Conditions
8
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9 Parameter Measurement Information
VKA
Input
IKA
Vref
Figure 17. Test Circuit for VKA = Vref
Input
VKA
IKA
R1
Iref
R2
Vref
R1 ö
æ
VKA = Vref ç 1 +
÷ + Iref × R1
R2 ø
è
Figure 18. Test Circuit for VKA > Vref
Input
VKA
Ioff
Figure 19. Test Circuit for Ioff
9.1 Temperature Coefficient
The deviation of the reference voltage, Vref, over the full temperature range is known as VI(dev). The parameter of
VI(dev) can be used to find the temperature coefficient of the device. The average full-range temperature
coefficient of the reference input voltage, αVref, is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the
lower temperature. The full-range temperature coefficient is an average and therefore any subsection of the rated
operating temperature range can yield a value that is greater or less than the average. For more details on
temperature coefficient, check out Voltage Reference Selection Basics.
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9.2 Dynamic Impedance
'VKA
'IKA . When the device is operating with two external resistors
The dynamic impedance is defined as:
'V
z'
'I which is approximately equal to
(see Figure 18), the total dynamic impedance of the circuit is given by:
R1 ·
§
ZKA ¨ 1
¸
© R2 ¹ .
ZKA
Itest
P/
IKA (mA)
The VKA of the ATL431LI can be affected by the dynamic impedance. The ATL431LI test current Itest for VKA is
specified on the Eletrical Characteristics . Any deviation from Itest can cause deviation on the output VKA.
Figure 20 shows the effect of the dynamic impedance on the VKA.
IKA
IKA(min)
0
VKA (V)
Ps
Figure 20. Dynamic Impedance
10
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10 Detailed Description
10.1 Overview
This standard device has proven ubiquity and versatility across a wide range of applications, ranging from power
to signal path. This is due to its key components containing an accurate voltage reference and opamp, which are
very fundamental analog building blocks. ATL431LI is used in conjunction with its key components to behave as
a single voltage reference, error amplifier, voltage clamp or comparator with integrated reference.
ATL431LI can be operated and adjusted to cathode voltages from 2.5V to 36V, making this part optimal for a
wide range of end equipments in industrial, auto, telecom & computing. In order for this device to behave as a
shunt regulator or error amplifier, >80µA (Imin(maximum)) must be supplied in to the cathode pin. Under this
condition, feedback can be applied from the Cathode and Ref pins to create a replica of the internal reference
voltage.
Various reference voltage options can be purchased with initial tolerances (at 25°C) of 0.5%, and 1%. These
reference options are denoted by B (0.5%) and A (1.0%) after the ATL431LI or ATL432LI. ATL431LI and
ATL432LI are both functionally the same, but have separate pinout options.
The ATL43xLIxQ devices are characterized for operation from –40°C to +125°C.
10.2 Functional Block Diagram
CATHODE
+
REF
_
Vref
ANODE
Figure 21. Equivalent Schematic
CATHODE
REF
ANODE
Figure 22. Detailed Schematic
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10.3 Feature Description
ATL431LI consists of an internal reference and amplifier that outputs a sink current based on the difference
between the reference pin and the virtual internal pin. The sink current is produced by the internal Darlington
pair, shown in the above schematic (Figure 21). A Darlington pair is used in order for this device to be able to
sink a maximum current of 15 mA.
When operated with enough voltage headroom (≥ 2.5 V) and cathode current (IKA), ATL431LI forces the
reference pin to 2.5 V. However, the reference pin can not be left floating, as it needs IREF ≥ 0.4 µA ( see
Specifications). This is because the reference pin is driven into an NPN, which needs base current in order
operate properly.
When feedback is applied from the Cathode and Reference pins, ATL431LI behaves as a Zener diode,
regulating to a constant voltage dependent on current being supplied into the cathode. This is due to the internal
amplifier and reference entering the proper operating regions. The same amount of current needed in the above
feedback situation must be applied to this device in open loop, servo or error amplifying implementations in order
for it to be in the proper linear region giving ATL431LI enough gain.
Unlike many linear regulators, ATL431LI is internally compensated to be stable without an output capacitor
between the cathode and anode. However, if it is desired to use an output capacitor Figure 13 can be used as a
guide to assist in choosing the correct capacitor to maintain stability.
10.4 Device Functional Modes
10.4.1 Open Loop (Comparator)
When the cathode/output voltage or current of ATL431LI is not being fed back to the reference/input pin in any
form, this device is operating in open loop. With proper cathode current (Ika) applied to this device, ATL431LI will
have the characteristics shown in SLVA987. With such high gain in this configuration, ATL431LI is typically used
as a voltage comparator. The integrated voltage reference makes the ATL431LI a flexible device for monitoring a
signal for undervoltage and overvoltage detection.
10.4.2 Closed Loop
When the cathode/output voltage or current of ATL431LI is being fed back to the reference/input pin in any form,
this device is operating in closed loop. The majority of applications involving ATL431LI use it in this manner to
regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier, computing
a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by relating the
output voltage back to the reference pin in a manner to make it equal to the internal reference voltage, which can
be accomplished via resistive or direct feedback.
12
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11 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
11.1 Application Information
As this device has many applications and setups, there are many situations that this datasheet can not
characterize in detail. The linked application notes will help the designer make the best choices when using this
part.
Application note Understanding Stability Boundary Conditions Charts in TL431, TL432 Data Sheet, SLVA482
provides a deeper understanding of this device's stability characteristics and aid the user in making the right
choices when choosing a load capacitor. Application note Setting the Shunt Voltage on an Adjustable Shunt
Regulator, SLVA445 assists with setting the shunt voltage to achieve optimum accuracy for this device.
11.2 Typical Applications
11.2.1 Comparator With Integrated Reference
Vsup
Rsup
Vout
CATHODE
R1
VIN
RIN
REF
VL
+
R2
2.5V
ANODE
Figure 23. Comparator Application Schematic
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Typical Applications (continued)
11.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input Voltage Range
0 V to 5 V
Input Resistance
10 kΩ
Supply Voltage
24 V
Cathode Current (Ik)
5 mA
Output Voltage Level
~2 V – VSUP
Logic Input Thresholds VIH/VIL
VL
11.2.1.2 Detailed Design Procedure
When using ATL431LI as a comparator with reference, determine the following:
• Input Voltage Range
• Reference Voltage Accuracy
• Output logic input high and low level thresholds
• Current Source resistance
11.2.1.2.1 Basic Operation
In the configuration shown in Figure 23 ATL431LI will behave as a comparator, comparing the VREF pin voltage
to the internal virtual reference voltage. When provided a proper cathode current (IK), ATL431LI will have enough
open loop gain to provide a quick response. This can be seen in Figure 24, where the RSUP=10 kΩ (IKA=500 µA)
situation responds much slower than RSUP=1 kΩ (IKA=5 mA). With the ATL431LI max Operating Current (IMIN)
being 0.08 mA, operation near that could result in low gain, leading to a slow response.
11.2.1.2.1.1 Overdrive
Slow or inaccurate responses can also occur when the reference pin is not provided enough overdrive voltage.
This is the amount of voltage that is higher than the internal virtual reference. The internal virtual reference
voltage will be within the range of 2.5 V ±(0.5% or 1.0%) depending on which version is being used. The more
overdrive voltage provided, the faster the ATL431LI will respond.
For applications where ATL431LI is being used as a comparator, it is best to set the trip point to greater than the
positive expected error (that is +1.0% for the A version). For fast response, setting the trip point to >10% of the
internal VREF should suffice.
For minimal voltage drop or difference from Vin to the ref pin, TI recommends to use an input resistor <10kΩ to
provide Iref.
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11.2.1.2.2 Output Voltage and Logic Input Level
In order for ATL431LI to properly be used as a comparator, the logic output must be readable by the receiving
logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically
denoted by VIH and VIL.
As seen in Figure 24, ATL431LI's output low level voltage in open-loop/comparator mode is approximately 2 V,
which is typically sufficient for 5V supplied logic. However, would not work for 3.3 V and 1.8 V supplied logic. To
accommodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible
to the receiving low voltage logic device.
ATL431's output high voltage is equal to VSUP due to ATL431LI being open-collector. If VSUP is much higher than
the receiving logic's maximum input voltage tolerance, the output must be attenuated to accommodate the
outgoing logic's reliability.
When using a resistive divider on the output, be sure to make the sum of the resistive divider (R1 and R2 in
Figure 23) is much greater than RSUP in order to not interfere with ATL431LI's ability to pull close to VSUP when
turning off.
11.2.1.2.2.1 Input Resistance
ATL431LI requires an input resistance in this application in order to source the reference current (IREF) needed
from this device to be in the proper operating regions while turning on. The actual voltage seen at the ref pin will
be VREF=VIN-IREF*RIN. Because IREF can be as high as 4 µA. TI recommends to use a resistance small enough
that will mitigate the error that IREF creates from VIN.
11.2.1.3 Application Curve
5.5
5
4.5
4
Voltage (V)
3.5
3
2.5
2
1.5
1
Vin
Vka(Rsup=10k:)
Vka(Rsup=1k:)
0.5
0
-0.5
-0.001
-0.0006
-0.0002
0.0002
Time (s)
0.0006
0.001
D001
Figure 24. Output Response With Various Cathode Currents
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11.2.2 Precision Constant Current Sink
VI(BATT)
IO
IO =
ATL43xLIx
Vref
RS
RS
0.1%
Copyright © 2017, Texas Instruments Incorporated
Figure 25. Precision Constant Current Sink Application Schematic
11.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Supply Voltage (VI(BATT))
5V
Sink Current (IO)
100mA
Cathode Current (Ik)
5 mA
11.2.2.2 Detailed Design Procedure
When using ATL43xLI as a constant current sink, determine the following:
• Output Current Range
• Output Current Accuracy
• Power Consumption for ATL43xLI
11.2.2.2.1 Basic Operation
In the configuration shown, ATL43xLI acts as a control component within a feedback loop of the constant current
sink. Working with an external passing component such as an BJT, ATL43xLI provides precision current sink
with accuracy set by itself and the sense resistor RS. This circuit can also be used as LED driving circuit.
11.2.2.2.1.1 Output Current Range and Accuracy
The output current range of the circuit is determined by the equation shown in the configuration. Keep in mind
that the VREF equals to 2.5V. When choosing the sense resistor RS, it needs to generate 2.5V for the ATL43xLI
when IO reaches the target current. If the overhead voltage of 2.5V is not acceptable, please consider lower
voltage reference devices such as TLV43x or TLVH43x.
The output current accuracy is determined by both the accuracy of ATL43xLI chosen, as well as the accuracy of
the sense resistor RS. The internal virtual reference voltage of ATL43xLI will be within the range of 2.5 V ±(0.5%
or 1.0%) depending on which version is being used. Another consideration for the output current accuracy is the
temperature coefficient of the ATL43xLI and RS. Please refer to the electrical characterization table for the
specification of these parameters.
11.2.2.2.2 Power Consumption
In order for ATL43xLI to properly be used as a control component in this circuit, the minimum operating current
needs to be reached. This is accomplished by setting the external biasing resistor in series with the ATL43xLI.
For ATL43xLI, the minimum operating current is 80µA and with margin consideration, most of the designs set
this current to be higher than 100µA. To achieve lower power consumption, please consider devices such as
ATL43x.
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11.2.3 Shunt Regulator/Reference
RSUP
VSUP
VO = ( 1 +
R1
0.1%
CATHODE
REF
Vr ef
R1
) Vref
R2
R2
0.1%
ATL43xLIx
ANODE
CL
Copyright © 2017, Texas Instruments Incorporated
Figure 26. Shunt Regulator Schematic
11.2.3.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 3. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Reference Initial Accuracy
1.0%
Supply Voltage
24 V
Cathode Current (Ik)
5 mA
Output Voltage Level
2.5 V - 36 V
Load Capacitance
2 µF
Feedback Resistor Values and Accuracy (R1 and R2)
10 kΩ
11.2.3.2 Detailed Design Procedure
When using ATL431LI as a Shunt Regulator, determine the following:
• Input Voltage Range
• Temperature Range
• Total Accuracy
• Cathode Current
• Reference Initial Accuracy
• Output Capacitance
11.2.3.2.1
Programming Output/Cathode Voltage
In order to program the cathode voltage to a regulated voltage a resistive bridge must be shunted between the
cathode and anode pins with the mid point tied to the reference pin. This can be seen in Figure 26, with R1 and
R2 being the resistive bridge. The cathode/output voltage in the shunt regulator configuration can be
approximated by the equation shown in Figure 26. The cathode voltage can be more accuratel determined by
taking in to account the cathode current:
Vo = (1+R1/R2) × VREF-IREF × R1
(1)
In order for this equation to be valid, ATL431LI must be fully biased so that it has enough open loop gain to
mitigate any gain error. This can be done by meeting the Imin spec denoted in Specifications.
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11.2.3.2.2 Total Accuracy
When programming the output above unity gain (VKA=VREF), ATL431LI is susceptible to other errors that may
effect the overall accuracy beyond VREF. These errors include:
•
•
•
•
R1 and R2 accuracies
VI(dev) - Change in reference voltage over temperature
ΔVREF / ΔVKA - Change in reference voltage to the change in cathode voltage
|zKA| - Dynamic impedance, causing a change in cathode voltage with cathode current
Worst case cathode voltage can be determined taking all of the variables in to account. Application note Setting
the Shunt Voltage on an Adjustable Shunt Regulator, SLVA445 assists designers in setting the shunt voltage to
achieve optimum accuracy for this device.
11.2.3.2.3 Stability
Though ATL431LI is stable with no capacitive load, the device that receives the shunt regulator's output voltage
could present a capacitive load that is within the ATL431LI region of stability, shown in Figure 13. Also, designers
may use capacitive loads to improve the transient response or for power supply decoupling. When using
additional capacitance between Cathode and Anode, see Figure 13. Also, application note Understanding
Stability Boundary Conditions Charts in TL431, TL432 Data Sheet, SLVA482 will provide a deeper understanding
of this devices stability characteristics and aid the user in making the right choices when choosing a load
capacitor.
11.2.3.2.4 Start-Up Time
As shown in Figure 27, ATL431LI has a fast response up to approximately 2 V and then slowly charges to its
programmed value. This is due to the compensation capacitance (shown in Figure 13) the ATL43xLIx has to
meet its stability criteria. Despite the secondary delay, ATL43xLIx still has a fast response suitable for many
clamp applications.
11.2.3.3 Application Curve
27
24
21
Voltage (V)
18
Vsup
Vka=Vref
R1=10k: & R2=10k:
R1=38k: & R2=10k:
15
12
9
6
3
0
-3
-6
-5E-6
-3E-6
-1E-6
1E-6
Time (s)
3E-6
5E-6
D001
Figure 27. ATL43xLIx Start-Up Response
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11.2.4 Isolated Flyback with Optocoupler
VOUT
VIN AC
VDD
VPC
VDD
VSC
HV
UCC28740
PWM Controller
VS
UCC24636
SR Controller
DRV
DRV
FB
TBLK
CS
ATL431LI
GND
Copyright © 2018, Texas Instruments Incorporated
Figure 28. Isolated Flyback with Optocoupler
11.2.4.1 Design Requirements
The ATL431LI is used in the feedback network on the secondary side for a isolated flyback with optocoupler
design. Figure 28 shows the simplified flyback converter that used the ATL431LI. For this design example, use
the parameters in Table 4 as the input parameters.
Table 4. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Voltage Output
20 V
Feedback Network Quiescent Current (Iq)
<40 mW
11.2.4.1.1 Detailed Design Procedure
In this example a simplified design procedure will be discussed. The compensation network for the feedback
network is beyond the scope of this section. Details on compensation network can be found on SLUA671.
The goal of this design is to design a low standby current feedback network to meet the Europe CoC Tier 2 and
United States DoE Level VI requirements. To meet the design requirements, the system standby power needs to
be below 75mW. In order to meet this, the feedback network needs to consume less than 40mW to allow margin
for the power losses on the primary side controller and passive components and this can pose a challenge in
systems greater than 10V.
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VOUT
Rs
Iq
Iq
IKA
R1
IREF
ATL431LI
R2
Copyright © 2017, Texas Instruments Incorporated
Figure 29. Feedback Quiescent Current
11.2.4.1.1.1 ATL431LI Biasing
Figure 29 shows the simplified version of the feedback network. The standby Iq of the system is dependent on
two paths, ATL431LI biasing path and the resistor feedback path. With the given design requirements the total
current through the feedback network cannot exceed 2mA.
The design goal is to take full advantage of the Imin to set the IKA of the ATL431LI. The benefit of the ATL431LI is
its low Imin of 80 µA which allows the IKA to be lower at a full load condition compared to typical TL431LI devices.
This helps lower the IKA at the no-load condition which is higher than the full load condition due to the dynamic
changes in the IKA as the system load varies. The IKA at no-load, IOPTNL, is dependent the value of Rs which is
the biasing resistor. Rs is very application specific and is dependent on variables such as optocoupler's CTR,
voltage, and current at no-load and this can be seen on Equation 2. By using an optocoupler with a high CTR it
is possible to lower IOPTNL to a value of 1.5 mA for a power loss of 30 mW.
Rs | (VOUT VOPTNL 2 V) / I OPTNL
VOPTNL
IOPTNL
Optocoupler Voltage at No Load Conditions
Optocoupler Current at No Load Conditions
(2)
11.2.4.1.1.2 Resistor Feedback Network
The feedback resistors set the output voltage of the secondary side and will consume the same Iq at a fixed
voltage. The design goal for the feedback resistor path is to minimize the resistor error while maintaining a low Iq.
For this system example the feedback network path in this design will consume 0.5 mA to allow enough current
for ATL431LI biasing. The resistors, R1 and R2, are sized based on a 0.5 mA budget for Iq and Iref. By using the
resistor values from Equation 3 and Equation 4 the total power consumption will be 10mW and this can be
further decreased by using larger resistors.
R1 (VOUT VREF ) / IFB
20
R1
(20 V 2.5 V) / 0.5mA
R1
35k:
R2
V REF / (I FB I REF )
R2
2.5 V / (0.5mA 0.4PA)
R2
5.004k:
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(3)
(4)
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11.3 System Examples
VI(BATT)
R
(see Note A)
2N222
2N222
30 Ω
4.7 kΩ
0.01 µF
ATL43xLIx
VO
R2
0.1%
R1
0.1%
R1 ö
æ
VO = ç 1 +
÷ Vref
R2 ø
è
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A.
R should provide cathode current ≥ 0.08 mA to the ATL431LI at minimum V(BATT).
Figure 30. Precision High-Current Series Regulator
VI(BATT)
IN
uA7805
OUT
Common
VO
R1
ATL43xLIx
(
(
VO = 1 + R1 Vref
R2
Minimum V
V + 5V
O = ref
R2
Copyright © 2017, Texas Instruments Incorporated
Figure 31. Output Control of a Three-Terminal Fixed Regulator
VI(BATT)
VO
(
R2
(
VO = 1 + R1 Vref
R2
R1
ATL43xLIx
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Figure 32. High-Current Shunt Regulator
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System Examples (continued)
VI(BATT)
VO
R1
ATL43xLIx
C
(see Note A)
R2
Copyright © 2017, Texas Instruments Incorporated
A.
Refer to the stability boundary conditions in and Figure 13 to determine allowable values for C.
Figure 33. Crowbar Circuit
IN
VI(BATT)
LM317
8.2 kΩ
OUT
VO ≈5 V, 1.5 A
Adjust
243 Ω
0.1%
ATL43xLIx
243 Ω
0.1%
Copyright © 2017, Texas Instruments Incorporated
Figure 34. Precision 5-V, 1.5-A Regulator
VI(BATT)
VO ≈5 V
Rb
(see Note A)
27.4 kΩ
0.1%
ATL43xLIx
27.4 kΩ
0.1%
Copyright © 2017, Texas Instruments Incorporated
A.
Rb should provide cathode current ≥0.08 mA to the ATL431LI.
Figure 35. Efficient 5-V Precision Regulator
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System Examples (continued)
12 V
VCC
6.8 kΩ
10 kΩ
5V
10 kΩ
0.1%
ATL43xLIx
10 kΩ
0.1%
−
+
X
Not
Used
TL598
Feedback
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Figure 36. PWM Converter With Reference
R3
(see Note A)
VI(BATT)
R4
(see Note A)
R1B
R1A
ATL43xLIx
Low Limit = 1 + R1B V ref
R2B
High Limit = 1 + R1A V ref
R2A
R2A
LED on When Low Limit < VI(BATT) < High Limit
R2B
Copyright © 2017, Texas Instruments Incorporated
A.
Select R3 and R4 to provide the desired LED intensity and cathode current ≥ 0.08 mA to the ATL431LI at the
available VI(BATT).
Figure 37. Voltage Monitor
650 Ω
12 V
R
2 kΩ
ATL43xLIx
Off
C
On
æ
ö
12 V
Delay = R × C × In çç
÷÷
12
V
–
V
ref
è
ø
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Figure 38. Delay Timer
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System Examples (continued)
RCL
0.1%
VI(BATT)
IO
Iout =
R1
R1 =
ATL43xLIx
V ref
+ IKA
R CL
V I(BATT)
I
O
h FE
+ IKA
Copyright © 2017, Texas Instruments Incorporated
Figure 39. Precision Current Limiter
VI(BATT)
IO
IO =
ATL43xLIx
Vref
RS
RS
0.1%
Copyright © 2017, Texas Instruments Incorporated
Figure 40. Precision Constant-Current Sink
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12 Power Supply Recommendations
When using ATL43xLIx as a Linear Regulator to supply a load, designers will typically use a bypass capacitor on
the output/cathode pin. When doing this, be sure that the capacitance is within the stability criteria shown in
Figure 13.
To not exceed the maximum cathode current, be sure that the supply voltage is current limited. Also, be sure to
limit the current being driven into the Ref pin, as not to exceed its absolute maximum rating.
For applications shunting high currents, pay attention to the cathode and anode trace lengths, adjusting the width
of the traces to have the proper current density.
13 Layout
13.1 Layout Guidelines
Bypass capacitors should be placed as close to the part as possible. Current-carrying traces need to have widths
appropriate for the amount of current they are carrying; in the case of the ATL43xLIx, these currents will be low.
13.2 SOT23-3 Layout Example
ATL43xLIx
(TOP VIEW)
Rref
REF
Vin
1
Rsup
ANODE
3
CATHODE
Vsup
GND
2
CL
GND
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Figure 41. DBZ Layout Example
13.3 X2SON (DQN) Layout Example
VOUT
VIN
Rs
R1
REF
4
3
1
ANODE
2
R2
GND PLANE
Figure 42. DQN Layout Example
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13.4 Thermal Considerations
The thermal performance of the ATL431LI will depend on the power dissipation, thermal resistance, and ambient
temperature. The ability to remove heat from the die is different for each package type, presenting different
considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other
components moves the heat from the device to the ambient air. Performance data for JEDEC thermal metrics are
given in the Specifications table.
Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of
the output current and the voltage drop across the output pass element. For a ATL431LI, the pass element
voltage drop will be across the cathode and anode as shown in Equation 5. In certain packages, like the DQN
package, the thermal metrics will vary with how the thermal pad is connected. The DQN package is designed to
be soldered to a thermal pad on the board. It is reccomended that the DQN thermal pad is conencted to a
thermal dissipative section of the PCB if the ATL431LI in DQN package is expected to dissipate a significant
amount of power. It is reccomended to use large biasing resistors to keep the cathode current low on the
ATL431LI for better thermal performance. For more information on designing and manufacturing with DQN, see
Texas Instruments literature number SLUA271 and SCEA055. For reliable operation, limit junction temperature to
125°C (maximum) or its respective temperature maximum from the Reccomended Operating Conditions.
PD (VKA VANODE ) / IKA
(5)
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14 Device and Documentation Support
14.1 Documentation Support
14.1.1 Device Nomenclature
TI assigns suffixes and prefixes to differentiate all the combinations of the ATL43xLI family. More details and
possible orderable combinations are located in the Package Option Addendum.
ATL431LI X X XXX X
Product
Initial
Accuracy
Operating Free-Air
Temperature
Package
Type
Package
Quantity
B: 0.5%
A: 1%
I: -40°C to 85°C
Q: -40°C to 125°C
DBZ: SOT-23-3
DQN: X2SON
R: Tape & Reel
1: ATL431LI
2: ATL432LI*
*(Cathode and REF
pins are switched)
14.1.2 Related Documentation
For related documentation see the following:
• Understanding Stability Boundary Conditions Charts in TL431, TL432 Data Sheet, SLVA482
• Setting the Shunt Voltage on an Adjustable Shunt Regulator, SLVA445
14.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 5. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
ATL431LI
Click here
Click here
Click here
Click here
Click here
ATL432LI
Click here
Click here
Click here
Click here
Click here
14.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
14.4 Community Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
14.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
14.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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14.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
15 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Copyright © 2017–2019, Texas Instruments Incorporated
Product Folder Links: ATL431LI ATL432LI
PACKAGE OPTION ADDENDUM
www.ti.com
4-Dec-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
ATL431LIAIDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
1TUP
ATL431LIAIDQNR
ACTIVE
X2SON
DQN
4
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
IA
ATL431LIAQDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
1BHP
ATL431LIAQDQNR
ACTIVE
X2SON
DQN
4
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
QA
ATL431LIBIDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
1TVP
ATL431LIBIDQNR
ACTIVE
X2SON
DQN
4
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
IB
ATL431LIBQDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
1BIP
ATL431LIBQDQNR
ACTIVE
X2SON
DQN
4
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
QB
ATL432LIAIDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
1TWP
ATL432LIAQDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
1BJP
ATL432LIBIDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 85
1TXP
ATL432LIBQDBZR
ACTIVE
SOT-23
DBZ
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
1BKP
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
4-Dec-2019
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF ATL431LI, ATL432LI :
• Automotive: ATL431LI-Q1, ATL432LI-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Nov-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
ATL431LIAIDBZR
SOT-23
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
DBZ
3
3000
178.0
9.0
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIAIDBZR
SOT-23
DBZ
3
3000
178.0
9.2
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIAIDQNR
X2SON
DQN
4
3000
180.0
9.5
1.16
1.16
0.5
4.0
8.0
Q2
ATL431LIAQDBZR
SOT-23
DBZ
3
3000
178.0
9.0
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIAQDBZR
SOT-23
DBZ
3
3000
178.0
9.2
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIAQDQNR
X2SON
DQN
4
3000
180.0
9.5
1.16
1.16
0.5
4.0
8.0
Q2
ATL431LIBIDBZR
SOT-23
DBZ
3
3000
178.0
9.0
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIBIDBZR
SOT-23
DBZ
3
3000
178.0
9.2
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIBIDQNR
X2SON
DQN
4
3000
180.0
9.5
1.16
1.16
0.5
4.0
8.0
Q2
ATL431LIBQDBZR
SOT-23
DBZ
3
3000
178.0
9.0
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIBQDBZR
SOT-23
DBZ
3
3000
178.0
9.2
3.15
2.77
1.22
4.0
8.0
Q3
ATL431LIBQDQNR
X2SON
DQN
4
3000
180.0
9.5
1.16
1.16
0.5
4.0
8.0
Q2
ATL432LIAIDBZR
SOT-23
DBZ
3
3000
178.0
9.2
3.15
2.77
1.22
4.0
8.0
Q3
ATL432LIAIDBZR
SOT-23
DBZ
3
3000
178.0
9.0
3.15
2.77
1.22
4.0
8.0
Q3
ATL432LIAQDBZR
SOT-23
DBZ
3
3000
178.0
9.0
3.15
2.77
1.22
4.0
8.0
Q3
ATL432LIAQDBZR
SOT-23
DBZ
3
3000
178.0
9.2
3.15
2.77
1.22
4.0
8.0
Q3
ATL432LIBIDBZR
SOT-23
DBZ
3
3000
178.0
9.2
3.15
2.77
1.22
4.0
8.0
Q3
ATL432LIBIDBZR
SOT-23
DBZ
3
3000
178.0
9.0
3.15
2.77
1.22
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Nov-2019
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
ATL432LIBQDBZR
SOT-23
DBZ
3
3000
178.0
9.0
ATL432LIBQDBZR
SOT-23
DBZ
3
3000
178.0
9.2
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3.15
2.77
1.22
4.0
8.0
Q3
3.15
2.77
1.22
4.0
8.0
Q3
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
ATL431LIAIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIAIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIAIDQNR
X2SON
DQN
4
3000
184.0
184.0
19.0
ATL431LIAQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIAQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIAQDQNR
X2SON
DQN
4
3000
184.0
184.0
19.0
ATL431LIBIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIBIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIBIDQNR
X2SON
DQN
4
3000
184.0
184.0
19.0
ATL431LIBQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIBQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL431LIBQDQNR
X2SON
DQN
4
3000
184.0
184.0
19.0
ATL432LIAIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL432LIAIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL432LIAQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Nov-2019
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
ATL432LIAQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL432LIBIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL432LIBIDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL432LIBQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
ATL432LIBQDBZR
SOT-23
DBZ
3
3000
180.0
180.0
18.0
Pack Materials-Page 3
PACKAGE OUTLINE
DQN0004A
X2SON - 0.4 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
A
1.05
0.95
B
1
1.05
0.95
PIN 1
INDEX AREA
C
0.4 MAX
SEATING PLANE
0.08
NOTE 6
0.48+0.12
-0.1
(0.05) TYP
2
0.05
0.00
NOTE 6
3
EXPOSED
THERMAL PAD
5
2X 0.65
(0.07) TYP
NOTE 5
1
PIN 1 ID
(OPTIONAL)
NOTE 4
4
4X 0.28
0.15
0.3
0.2
0.1
0.05
C A B
C
(0.11)
3X 0.30
0.15
4215302/E 12/2016
NOTES:
1.
2.
3.
4.
5.
6.
All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
This drawing is subject to change without notice.
The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
Features may not exist. Recommend use of pin 1 marking on top of package for orientation purposes.
Shape of exposed side leads may differ.
Number and location of exposed tie bars may vary.
www.ti.com
EXAMPLE BOARD LAYOUT
DQN0004A
X2SON - 0.4 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.86)
SYMM
SEE DETAIL
4X
(0.03)
4X (0.36)
4
4X (0.21)
1
5
SYMM
(0.65)
4X (0.18)
2
3
(
0.48)
(0.22) TYP
EXPOSED METAL
CLEARANCE
LAND PATTERN EXAMPLE
SCALE: 40X
0.05 MIN
ALL AROUND
SOLDER MASK
OPENING
EXPOSED METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
SOLDER MASK DETAIL
4215302/E 12/2016
NOTES: (continued)
7.
8.
This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271) .
If any vias are implemented, it is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
DQN0004A
X2SON - 0.4 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.9)
SYMM
4X (0.4)
4X (0.03)
4
1
4X (0.21)
5
SYMM
(0.65)
SOLDER MASK
EDGE
4X (0.22)
2
3
(
0.45)
4X (0.235)
SOLDER PASTE EXAMPLE
BASED ON 0.075 - 0.1mm THICK STENCIL
EXPOSED PAD
88% PRINTED SOLDER COVERAGE BY AREA
SCALE: 60X
4215302/E 12/2016
NOTES: (continued)
9.
Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
4203227/C
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.4
1.2
PIN 1
INDEX AREA
1.12 MAX
B
A
0.1 C
1
0.95
3.04
2.80
1.9
3X
3
0.5
0.3
0.2
2
(0.95)
C A B
0.25
GAGE PLANE
0 -8 TYP
0.10
TYP
0.01
0.20
TYP
0.08
0.6
TYP
0.2
SEATING PLANE
4214838/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214838/C 04/2017
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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