Texas Instruments | TPS212x 2.8-V to 22-V Priority Power MUX with Seamless Switchover (Rev. D) | Datasheet | Texas Instruments TPS212x 2.8-V to 22-V Priority Power MUX with Seamless Switchover (Rev. D) Datasheet

Texas Instruments TPS212x 2.8-V to 22-V Priority Power MUX with Seamless Switchover (Rev. D) Datasheet
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TPS212x 2.8-V to 22-V Priority Power MUX with Seamless Switchover
1 Features
3 Description
•
The TPS212x devices are Dual-Input, Single-Output
(DISO) Power Multiplexer (MUX) that are well suited
for a variety of systems having multiple power
sources.
The devices will Automatically Detect,
Select, and Seamlessly Transition between available
inputs.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
Wide operating range: 2.8 V to 22 V
– Absolute maximum input voltage of 24 V
Low RON resistance:
– TPS2120: 62 mΩ (typical)
– TPS2121: 56 mΩ (typical)
Adjustable overvoltage supervisor (OVx):
– Accuracy < ±5%
Adjustable priority supervisor (PR1):
– Accuracy < ±5%
TPS2121 Supports external voltage reference
(CP2) with an accuracy of <1%
Output current limit (ILM):
– TPS2120: 1 A – 3 A
– TPS2121: 1 A – 4.5 A
Channel status indication (ST)
Adjustable input settling time (SS)
Adjustable output soft start time (SS)
TPS2121 Fast output switchover (tSW): 5 µs
(typical)
Low Iq from enabled input: 200 µA (typical)
Low Iq from disabled input: 10 µA (Typical)
Manual input source selection (OVx)
Over temperature protection (OTP)
2 Applications
•
•
•
•
•
•
Backup and standby power
Input source selection
Multiple battery management
EPOS and barcode scanners
Building automation and surveillance
Tracking and telematics
Priority can be automatically given to the highest
input voltage or manually assigned to a lower voltage
input to support both ORing and Source Selection
operations. A priority voltage supervisor is used to
select an input source.
An Ideal Diode operation is used to seamlessly
transition between input sources. During switchover,
the voltage drop is controlled to block reverse current
before it happens and provide uninterrupted power to
the load with minimal hold-up capacitance.
Current limiting is used during startup and switchover
to protect against overcurrent events, and also
protects the device during normal operation. The
output current limit can be adjusted with a single
external resistor.
The TPS212x devices are available in WCSP and
small VQFN-HR package options characterized for
operation for a temperature range of –40°C to 125°C.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS2120
WCSP (20)
1.5 mm x 2.0 mm
TPS2121
VQFN-HR (12)
2.0 mm x 2.5 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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Table of Contents
1
2
3
4
5
6
7
8
9
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6
7.1
7.2
7.3
7.4
7.5
7.6
6
6
6
6
7
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics .............................................
Parameter Measurement Information ................ 10
Detailed Description ............................................ 11
9.1
9.2
9.3
9.4
9.5
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
TPS2120 Device Functional Modes........................
TPS2121 Device Functional Modes........................
11
11
12
18
18
10.1
10.2
10.3
10.4
Application Information..........................................
Typical Application ................................................
Automatic Switchover with Priority (XCOMP) .......
Automatic Seamless Switchover with Priority
(XREF) .....................................................................
10.5 Highest Voltage Operation (VCOMP) ...................
10.6 Reverse Polarity Protection with TPS212x ...........
10.7 Hotplugging with TPS212x....................................
19
19
24
26
28
30
31
11 Power Supply Recommendations ..................... 32
12 Layout................................................................... 32
12.1 Layout Guidelines ................................................. 32
12.2 Layout Example .................................................... 32
13 Device and Documentation Support ................. 33
13.1
13.2
13.3
13.4
13.5
13.6
Documentation Support .......................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
33
33
33
33
33
33
14 Mechanical, Packaging, and Orderable
Information ........................................................... 33
10 Application and Implementation........................ 19
4 Revision History
Changes from Revision C (February 2019) to Revision D
Page
•
Updated the Reverse Polarity Protection with TPS212x section ........................................................................................ 30
•
Updated the Hotplugging with TPS212x section ................................................................................................................. 31
Changes from Revision B (December 2018) to Revision C
Page
•
Changed the Adjustable Overvoltage Supervisor (OVx) Accuracy to < ±5% in the Features section ................................... 1
•
Changes made in the Recommended Operating Conditions and Electrical Characteristics table in the Specifications
section .................................................................................................................................................................................... 6
•
Changes made in the Active Current Limiting (ILM) section ................................................................................................ 13
•
Changed (typical) from 170°C to 160°C in the Thermal Protection (TSD) section ................................................................ 14
•
Changed Equation 8 and Equation 9 ................................................................................................................................... 23
Changes from Revision A (November 2018) to Revision B
•
Page
Changed from Advance Information to Production Data........................................................................................................ 1
Changes from Original (August 2018) to Revision A
Page
•
Changed Wide Operating Range to 2.7 V to 22 V ................................................................................................................. 1
•
Revised the Application and Implementation section........................................................................................................... 19
2
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5 Device Comparison Table
Part Number
Package
On-Resistance
Maximum Current
Fastest Switchover
TPS2120
WCSP (20)
62 mΩ
3A
100 us
SEL
TPS2121
VQFN-HR (12)
56 mΩ
4.5 A
5 us
CP2
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6 Pin Configuration and Functions
TPS2120 (YFP) Package
20-Pin WCSP
Bottom View
TPS2121 (RUX) Package
12-Pin VQFN-HR
Bottom View
Pin Functions
PIN
TPS2120
TPS2121
WCSP
VQFN-HR
B1, B2, C1
7
I
Power Input for Source 1
IN2
B3, B4, C4
2
I
Power Input for Source 2
OUT
C2, C3, D1,
D2, D3, D4
1, 8
I
Power Output
ST
E1
9
O
Status output indicating which channel is selected. Connect to GND if not required.
ILIM
E2
10
O
Output Current Limiting for both channels.
SS
E3
11
O
Adjusts Input Setting Delay Time and Output Soft Start Time
GND
E4
12
—
Device Ground
PR1
A1
6
I
Enables Priority Operation. Connect to IN1 to set switchover voltage. Connect to
GND if not required.
OV1
A2
5
I
Active Low Enable Supervisor for IN1 Overvoltage Protection. Connect to GND if
not required.
NAME
IN1
4
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I/O
DESCRIPTION
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Pin Functions (continued)
PIN
TPS2120
TPS2121
WCSP
VQFN-HR
OV2
A3
4
I
Active Low Enable Supervisor for IN2 Overvoltage Protection. Connect to GND if
not required.
SEL
A4
—
I
Active low Enable for IN1. Allows GPIO to override priority operation and manually
select IN2. TPS2120 only.
CP2
—
3
I
Enables Comparator Operation and is compared to PR1 to set switchover voltage.
Connect to GND if not required. TPS2121 only.
NAME
I/O
DESCRIPTION
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
VIN1 ,
Maximum Power Pin Voltage
VIN2 , VOUT
VOV1 ,
VOV2
Maximum Overvoltage Pin Voltage
VPRI , VSEL Maximum Control Pin Voltage
VST
Maximum Control Pin Voltage
IOUT
Maximum Output Current
TJ, MAX
Maximum Junction Temperature
TSTG
Storage temperature
(1)
Pins
MIN
MAX
IN1, IN2,
OUT
-0.3
24
V
OV1, OV2
-0.3
6
V
PRI, SEL
-0.3
6
V
ST
-0.3
6
V
OUT
UNIT
Internally Limited
Internally Limited
-65
150
°C
Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VESD
(1)
(2)
Electrostatic discharge
Pins
VALUE
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001, (1)
All
±2000
Charged device model (CDM), per JEDEC
specification JESD22-C101, (2)
All
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Pins
MIN
MAX
VIN1 , VIN2
Input Voltage Range (1)
IN1, IN2
2.8
22
V
VOUT
Output Voltage Range
OUT
0
22
V
VOV1 ,
VOV2
Overvoltage Pin Voltage
OV1, OV2
0
5.5
V
PRI, SEL
0
5.5
V
ST
0
5.5
V
VPRI , VSEL Control Pin Voltage
UNIT
VST
Control Pin Voltage
RST
Status Pin Pull Up Resistance
ST
6
20
kΩ
RILM
Current Limit Resistance
ILM
18
100
kΩ
VSS
SS Pin Output Voltage
SS
4
V
IIN1 , IIN2
TPS2120 Continuous Input Current
IN1, IN2
3
A
IIN1 , IIN2
TPS2121 Continuous Input Current
IN1, IN2
4.5
A
TJ
Junction temperature
125
°C
(1)
-
-40
See Power Supply Recommendations Section for more Details
7.4 Thermal Information
THERMAL METRIC
(1)
TPS2120
TPS2121
YFP (WCSP)
RNW (PKG FAM)
20 PINS
11 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
72.5
72.2
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
0.5
38.5
°C/W
(1)
6
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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Thermal Information (continued)
THERMAL METRIC (1)
TPS2120
TPS2121
YFP (WCSP)
RNW (PKG FAM)
20 PINS
11 PINS
UNIT
RθJB
Junction-to-board thermal resistance
16.4
15.4
°C/W
ΨJT
Junction-to-top characterization parameter
0.3
0.9
°C/W
ΨJB
Junction-to-board characterization parameter
16.6
15.5
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
°C/W
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TJ
MIN
TYP
MAX
UNIT
300
400
µA
15
25
µA
INPUT SOURCE (IN1, IN2)
IQ, INx
Quiescent Current
(INx Powering OUT)
ISBY, INx
Standby Current
(INx not powering OUT) (1)
ILK, INx
Leakage Current
(INx to OUT)
VUV,
Undervoltage Lockout
INx
(1)
OUT = Open
VOUT = VINx
-40°C to 125°C
25°C
0
25
µA
25°C
-200
200
µA
-40°C to 125°C
-500
500
µA
VINx Rising
-40°C to 125°C
2.5
2.65
2.8
V
VINx Falling
-40°C to 125°C
2.4
2.55
2.7
V
|VINx - VOUT| > 0
-40°C to 125°C
OUTPUT SWITCHOVER (OUT)
tSW
Switchover Time
VOUT < VINx
CP2 or SEL < VREF
-40°C to 125°C
100
µs
tFSW
Fast Switchover Time
(TPS2121 only)
VOUT < VINx
CP2 ≥ VREF
-40°C to 125°C
5
µs
VCOMP
Input Voltage Comparator
(VIN2 referenced to VIN1)
VIN1 ≥ VIN2
-40°C to 125°C
0
280
600
mV
VIN1 > VIN2, Falling Hysteresis
-40°C to 125°C
2.5
3.5
4.5
%
62
ON-RESISTANCE (INx to OUT)
25°C
ON-State Resistance (TPS2120)
IOUT = -200 mA
VPRI > VREF
VINx ≥ 5.0 V
RON
75
mΩ
-40°C to 85°C
90
mΩ
-40°C to 105°C
100
mΩ
-40°C to 125°C
120
mΩ
70
mΩ
-40°C to 85°C
85
mΩ
-40°C to 105°C
90
mΩ
-40°C to 125°C
100
mΩ
25°C
ON-State Resistance (TPS2121)
IOUT = -200 mA
VPRI > VREF
VINx ≥ 5.0 V
56
CURRENT LIMIT (ILM)
(1)
When PR1 < VREF, CP2 < VREF, and |VIN1-VIN2| < 1V, Quiescent current can be drawn from both IN1 and IN2 with combined current not
to exceed IQ,INx.
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Electrical Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
Output Current Limit (TPS2120)
ILM
(2)
Output Current Limit (TPS2121)
tLM
(3)
Current Limit Response Time
TEST CONDITIONS
TJ
MIN
TYP
MAX
UNIT
RILM = 31.6kΩ
-40°C to 125°C
3
3.5
4
A
RILM = 46.4kΩ
-40°C to 125°C
2
2.5
3
A
RILM = 85kΩ
-40°C to 125°C
1
1.5
2
A
RILM < 1kΩ
-40°C to 125°C
1.5
2.5
3.5
A
RILM = 18.7kΩ
-40°C to 125°C
4.6
5.2
5.8
A
RILM = 22.1kΩ
-40°C to 125°C
4
4.5
5
A
RILM = 29.8kΩ
-40°C to 125°C
3
3.5
4
A
RILM = 44.2kΩ
-40°C to 125°C
2
2.5
3
A
RILM = 80kΩ
-40°C to 125°C
1
1.5
2
A
RILM < 1kΩ
-40°C to 125°C
1.5
2.5
3.5
A
Output Steady State
-40°C to 125°C
VPR1, VCP2, VOV1, VOV2 Rising
-40°C to 125°C
1.01
1.06
1.1
V
V
250
µs
CONTROL PINS (PRI, SEL, OV1, OV2)
VREF,
x
Internal Voltage Reference
VPR1, VCP2, VOV1, VOV2 Falling
-40°C to 125°C
0.99
1.04
1.09
VOFST
Comparator Offset Voltage
(TPS2121 only)
VPR1 > VREF
VCP2 > VREF
-40°C to 125°C
5
20
40
mV
ILK, x
Pin Leakage Current
VPR1, VCP2, VOV1, VOV2 = 0 V to 5.5
V
-40°C to 125°C
-0.1
0.1
µA
-0.1
0.1
µA
STATUS INDICATION PIN (ST)
ILK, ST
Pin Leakage
VST = 0 V to 5.5 V
-40°C to 125°C
tST
Status Delay
L to H
-40°C to 125°C
1
µs
FAST REVERSE CURRENT BLOCKING (RCB)
IRCB
Fast Reverse Current Detection
Threshold
VOUT > VINx
-40°C to 125°C
0.2
1
2
A
VRCB
RCB Release Voltage
VOUT > VINx
-40°C to 125°C
0
25
50
mV
tRCB
Fast Reverse Current Blocking
Response Time
-40°C to 125°C
10
µs
THERMAL SHUTDOWN (TSD)
TSD
(2)
(3)
8
Thermal Shutdown
Shutdown
Rising
160
°C
Recovery
Falling
150
°C
The current limit can be measured by forcing a voltage differential from VIN to VOUT. This value must be at least 200mV greater than
the voltage drop across the device at the current limit threshold (ILM x RON(MAX)). For example, the TPS2121 would need a minimum
voltage drop of (1.5A x 100mΩ + 200mV) = 350mV from VIN to VOUT for a current limit setting of 1.5A (typical).
For more information on device behavior during short circuit conditions, see Section 9.3.3.
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7.6 Typical Characteristics
260
320
312
240
Quiescent Current (PA)
Quiescent Current (PA)
304
296
288
280
272
264
-40qC
25qC
85qC
125qC
256
248
220
200
-40qC
25qC
85qC
125qC
180
240
160
2
4
6
8
10
12
14
Input Voltage (V)
16
18
20
22
2
4
6
8
D001
ILM = 5.2A
10
12
14
Input Voltage (V)
16
18
20
22
D002
ILM = 1.5A
Figure 1. Quiescent Current vs Input Voltage
Figure 2. Quiescent Current vs Input Voltage
16
18
15
16
Standby Current (PA)
Standby Current (PA)
14
13
12
11
10
9
-40qC
25qC
85qC
125qC
8
7
14
12
10
-40qC
25qC
85qC
125qC
8
6
6
2
4
6
8
10
12
14
Input Voltage (V)
16
18
20
22
2
ILM = 5.2A
6
8
10
12
14
Input Voltage (V)
16
18
20
22
D004
ILM = 1.5A
Figure 3. Standby Current vs Input Voltage
Figure 4. Standby Current vs Input Voltage
104
18
-40qC
25qC
85qC
125qC
88
5V
12V
20V
15
Output Slew Rate (V/ms)
96
On-Resistance (m:)
4
D003
80
72
64
56
12
9
6
3
48
40
0
2
4
6
8
10
12
14
Input Voltage (V)
16
18
20
22
D005
IOUT = -200 mA
1
2
3 4 5 67 10
20 30 50 70100
CSS Capacitor (nF)
VIN1 > UVLO
Figure 5. TPS2121 On-Resistance vs Input Voltage
200
500 1000
D006
VIN2 = 0V
Figure 6. Output Slew Rate vs CSS Capacitor
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Typical Characteristics (continued)
VIN1 = 12 V
VIN2 = 0 V
VIN1 = 12 V
RILM = 71.5kΩ
Figure 7. TPS2121 Hot Short on OUT while IN1 is Enabled
VIN2 = 0 V
VOUT = GND
Figure 8. TPS2120 IN1 is Enabled with a Short on OUT
8 Parameter Measurement Information
Figure 9. Timing Parameter Diagram
10
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9 Detailed Description
9.1 Overview
The TPS212x devices are Dual-Input, Single-Output (DISO) Power Multiplexer (MUX) that are well suited for a
variety of systems having multiple power sources. The devices will automatically detect, select, and seamlessly
transition between available inputs. Priority can be automatically given to the highest input voltage or manually
assigned to a lower voltage input to support both ORing and Source Selection operations. A priority voltage
supervisor is used to select an input source.
An Ideal Diode operation is used to seamlessly transition between input sources. During switchover, the voltage
drop is controlled to block reverse current before it happens and provide uninterrupted power to the load with
minimal hold-up capacitance. Active current limiting is used during startup and switchover to protect against
overcurrent, and also protects the device during normal operation. The output current limit can be adjusted with a
single external resistor.
9.2 Functional Block Diagram
The below figures show the block diagrams for the TPS2120 and TPS2121. The TPS2120 has the SEL pin,
while the TPS2121 has the CP2 pin and supports fast switchover.
BFET1
HFET1
IN1
Temp
SNS
+
PR1
ST
±
VREF
GND
Control Logic
+ Gate Drivers
SS
+
SEL
±
VREF
+
OV1
OUT
±
VREF
+
OV2
±
IN2
Current
Limit
Temp
SNS
VREF
BFET2
ILM
HFET2
Figure 10. TPS2120 Functional Block Diagram
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Functional Block Diagram (continued)
BFET1
HFET1
IN1
Temp
SNS
+
PR1
ST
±
VREF
GND
Control Logic
+ Gate Drivers
+
VOFST
±
SS
+
CP2
±
VREF
+
OV1
OUT
±
VREF
+
OV2
±
VREF
IN2
Current
Limit
Temp
SNS
BFET2
ILM
HFET2
Figure 11. TPS2121 Functional Block Diagram
9.3 Feature Description
This section describes the different features of the TPS212x power mux device.
9.3.1
Input Settling Time and Output Soft Start Control (SS)
The TPS212x will automatically select the first source to become valid (INx >UV and INx <OV). The external
capacitor (CSS) will then be used as a timer to wait for the input to finish setting (tSETx). When the settling timer
has expired, CSS will continue to charge and set the output slew rate (SRON) for a soft start. After the total turn
on time (tONx), soft start will not be used again for INx until it ceases to be valid (INx <UV or INx >OV).
When the second source becomes valid (INy >UV and INy <OV), the external capacitor (Css) will be used again
for a second settling time (tSETy). After tSETy, the TPS212x will decide whether to continue sourcing the first
source, or switchover to the second source. If the second source is selected at the end of tSETy, then CSS will
be reused to set the output slew rate (SRON) for a second soft start. After the total turn on time (tONy), soft start
will not be used again for INy until it ceases to be valid (INy <UV or INy >OV).
Figure 12. Settling and Soft Start Timing
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Feature Description (continued)
If INy becomes valid before the end of tONx, tSETy will be delayed and start after tONx has ended.
If INy is not selected during tSETy, a second soft start will not take place, skipping tONy, and CSS will be retired
until one of the inputs ceases to be valid.
9.3.1.1 Slew Rate vs. CSS Capacitor
Table 1 shows the estimated slew rate across CSS capacitance and VIN.
Table 1. Slew Rate vs. CSS Capacitor
CSS CAPACITOR
VIN = 5 V
VIN = 12 V
VIN = 20 V
UNITS
100 nF
780
800
880
V/s
9.3.2
1 uF
88
92
92
V/s
10 uF
8.8
9.6
10.4
V/s
Active Current Limiting (ILM)
The load current is monitored at all times. When the load current exceed the current limit trip point ILM
programmed by RILM resistor, the device regulates the current within tILM. The following equations can be used
to find the RILM value for a desired current limit, where RILM is in kΩ and between 18 kΩ to 100 kΩ.
I LM
TPS2120:
I LM
TPS2121:
69.1
R ILM0.861
(1)
65.2
R ILM0.861
(2)
During current regulation, the output voltage will drop resulting in increased device power dissipation. If the
device junction temperature (TJ) reaches the thermal shutdown threshold (TSD) the internal FETs are turned off.
After cooling down, the device will automatically restart.
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Figure 13. Current Limiting Behavior
9.3.3 Short-Circuit Protection
During a transient short circuit event, the current through the device increases very rapidly. As the current-limit
amplifier cannot respond quickly to this event due to its limited bandwidth, the device incorporates a fast-trip
overcurrent protection (OCP) comparator, with a threshold IOCP. This comparator shuts down the pass device
within 1 µs, when the current through internal FET IOUT exceeds IOCP (IOUT> IOCP). The trip threshold is set to
about 2.4x of the programmed current limit IOCP = 2.4 × ILM. The OCP circuit holds the internal FET off for about
25 ms, after which the device turns back on. If the short is still present then the current-limit loop will regulate the
output current to ILM and behave in a manner similar to a power up into a short.
9.3.4 Thermal Protection (TSD)
The TPS212x devices have built-in absolute thermal shutdown and relative thermal shutdown to ensure
maximum reliability of the power mux. The absolute thermal shutdown is designed to disable the power FETs, if
the junction temperature exceeds 160°C (typical). The device auto recovers about 25 ms after TJ < [T (TSD) –
10°C]. The relative thermal shutdown protects the device by turning off when the temperature of the power FETs
increases sharply such that the FET temperature rises about 60°C above the rest of the die. The device auto
recovers about 25 ms after the FETs cools down by 20°C. The relative thermal shutdown is critical for protecting
the device against faults such as a power up into a short which causes the FET temperature to increase sharply.
9.3.5
Overvoltage Protection (OVx)
Output Overvoltage Protection is available for both IN1 and IN2 in case either applied voltage is greater than the
maximum supported load voltage. The VREF comparator on the OVx pins allow for the Overvoltage Protection
threshold to be adjusted independently for each input. When overvoltage is engaged, the corresponding channel
will turn off immediately. Fast switchover to the other input is supported if it is a valid voltage.
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VSUPPLY
R1
OVx
R2
Figure 14. OVP Resistor Configuration
9.3.6
Fast Reverse Current Blocking (RCB)
Each channel has the always on reverse current blocking. If the output is forced above the selected input by
VIRCB, the channel will switch off to stop the reverse current IRCB within tRCB. As the output falls to within VRCB of
VIN, the selected channel will quickly turn back on to avoid unnecessary voltage drops during fast switchover
(tSW).
Figure 15. Reverse Current Blocking Behavior
9.3.7
Output Voltage Dip and Fast Switchover Control (TPS2121 only)
After input settling and soft start time, the TPS2121 utilizes a fast switchover to minimize output voltage drop.
Where VSW is the output voltage when the switchover is triggered and tSW is the time until the output voltage
stops dipping. The amount of voltage dip during the switchover time is a function of output load current (IOUT)
and load capacitance (COUT). The minimum output voltage during switchover can be found using the following
equations:
V OUT,MIN = V SW - V DIP
(3)
Where:
V DIP
§ I OUT
t SW u¨
¨ C OUT
©
·
¸
¸
¹
(4)
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Figure 16. Minimum Output Voltage During Fast Switchover
If switching from a lower to a higher voltage, the selected channel will not detect reverse voltage and shall turn
on immediately using the current monitor to limit the output current to a safe level. If the output current reaches
the current limit during fast switchover, this will increase the total time until the output reaches steady state.
VIN2
Input
Voltages
PRI
VIN1
0V
H
L
VREF
VIN2
VOUT
tSW
VIN1
VSW
SROUT
VOUT,MIN
Current Limited
IIN2
IOUT
0
Time
VOUT,MIN = VSW - (tSWxSROUT) where SROUT = IOUT/COUT
VOUT,MIN = 3.5 V - (5µs x 30mV/µs) = 3.35 V
VOUT,MIN = 3.5 V - (5µs x 1A/10µF) = 3 V
VOUT,MIN = 3.5 V - (5µs x 1A/100µF) = 3.45 V
Figure 17. Fast Switchover from Lower to Higher Voltage
If an input is selected while the output voltage is still a higher voltage, that channel will continue to block reverse
current by waiting to fast turn on until the output drops below the VRCB threshold.
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VIN2
Input
Voltages
VIN1
0V
1
OV2
0
VIN2
VOUT
tSW
SROUT
VRCB
VIN1
VOUT,MIN
No Spikes
IOUT
IIN1
0
Time
VOUT,MIN = VIN1 + VRCB - (tSW x SROUT) where SROUT = IOUT/COUT
VOUT,MIN = 4.25 V + 50 mV - (5µs x 30mV/µs) = 4.15 V
VOUT,MIN = 4.25 V + 50 mV - (5µs x 1A/10µF) = 3.8 V
VOUT,MIN = 4.25 V + 50 mV (5µs x 1A/100µF) = 4.25 V
Figure 18. Fast Switchover from Higher to Lower Voltage
9.3.8
Input Voltage Comparator (VCOMP)
If both PR1 and CP2 are < VREF, the device will use an internal comparator between the two inputs to
determine the priority source. VCOMP is configured to ensure IN2 will take priority if the input voltages are equal. If
IN2 falls below the VCOMP Hysteresis, then IN1 will have priority.
Figure 19. VCOMP Priority Source Selection
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9.4 TPS2120 Device Functional Modes
Table 2 shows the TPS2120 functional behavior.
Table 2. TPS2120 Output Source Selection Table
DEVICE INPUTS
IN1 ≤ UV OR
OV1 ≥ VREF OR
SEL ≥VREF
IN2 ≤ UV OR
OV2 ≥ VREF
PR1 ≥ VREF
0
0
0
IN2 < IN1
IN1
0
0
0
IN2 ≥ IN1
0
0
1
X
0
1
X
1
0
1
1
A
•
•
•
•
•
MODE OF
OPERATION
DEVICE OUTPUTS
VCOMP
OUT
ST
MODE
H
VCOMP
IN2
L
VCOMP
IN1
H
VREF
X
IN1
H
Invalid Input
X
X
IN2
L
SEL / Invalid Input
X
X
Hi-Z
H
Invalid Inputs
summary of the operation of the TPS2120 device can be found below:
If only one input voltage is valid (above UV and below OV) then that input will power the output.
If both inputs are not valid, then the output is Hi-Z.
ST is pulled high when the output is Hi-Z or IN1. It is pulled low when IN2 is powering the output.
If both inputs are valid and PR1 is pulled high (higher than VREF, 1.06-V typical), then IN1 is used.
If both inputs are valid and PR1 is pulled low, then the highest voltage input is used.
9.5 TPS2121 Device Functional Modes
Table 3 shows the TPS2121 functional behavior.
Table 3. TPS2121 Output Source Selection Table
DEVICE INPUTS
DEVICE OUTPUTS
MODE OF
OPERATION
IN1 ≤ UV OR
OV1 ≥ VREF
IN2 ≤ UV OR
OV2 ≥ VREF
CP2 ≥
VREF
PR1 ≥
VREF
VCOMP
XCOMP
OUT
ST
MODE
0
X
0
0
IN2 < IN1
X
IN1
H
VCOMP
X
0
0
0
IN2 ≥ IN1
X
IN2
L
VCOMP
0
X
0
1
X
X
IN1
H
VREF
X
0
1
0
X
X
IN2
L
VREF
0
X
1
1
X
PR1 > CP2
IN1
H
XCOMP / XREF
X
0
1
1
X
PR1 ≤ CP2
IN2
L
XCOMP / XREF
0
1
X
X
X
X
IN1
H
Invalid Input
1
0
X
X
X
X
IN2
L
Invalid Input
1
1
X
X
X
X
Hi-Z
H
Invalid Inputs
A
•
•
•
•
•
summary of the operation of the TPS2121 device can be found below:
If only one input voltage is valid (above UV and below OV) then that input will power the output.
If both inputs are not valid, then the output is Hi-Z.
ST is pulled high when the output is Hi-Z or IN1. It is pulled low when IN2 is powering the output.
If CP2 is pulled low, then the TPS2121 ignores this pin.
When CP2 is pulled high, this enables fast switchover and is compared to PR1. If PR1 > CP2 then IN1 is
used, and if PR1 < CP2 then IN2 is used.
• If both inputs are valid, CP2 is low, and PR1 is pulled high, (higher than VREF, 1.06-V typical), then IN1 is
used.
• If both inputs are valid, CP2 is low, and PR1 is pulled low, then the highest voltage input is used.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The TPS212x device is a highly configurable power mux that can be designed to meet various application
requirements. When designing the TPS212x for a power mux configuration, 3 key factors should be considered:
• VOUT voltage dip
• Manual and Automatic Switchover
• Switchover Time
The TPS212x device can be configured in various modes to meet these considerations and provides a general
table that describes each mode of operation. This application section will highlight 3 common modes of operation
that address these factors.
10.2 Typical Application
Table 4 summarizes the applications highlighted in the following sections.
Table 4. TPS212x Application Summary Table
MODE
DEVICE(S)
DESCRIPTION
SECTION
Manual Switchover
TPS2120 / TPS2121
An external controller (such as an MCU) can be used
to manually select between the two input sources.
11.2.1
Automatic Switchover with
Priority (XCOMP)
TPS2121
Prioritizes Supply 1 when present, and quickly
switches to Supply 2 when Supply 1 drops.
11.3
Automatic Switchover with
Priority (XREF)
TPS2121
Prioritizes Supply 1 when present, and quickly
switches to Supply 2 when Supply 1 drops. An
external supply is used to increase the accuracy of the
comparator for switchover.
11.4
Highest Voltage Operation
(VCOMP)
TPS2120 / TPS2121
The device automatically selects the highest voltage
supply to power the output.
11.5
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10.2.1 Manual Switchover Schematic
Figure 20 and Figure 21 show the application schematic for manual switchover on the TPS2120 and TPS2121.
Figure 20. TPS2120 Manual Switchover
Figure 21. TPS2121 Manual Switchover
10.2.2 Design Requirements
In certain power architectures, an external MCU or controller monitors the downstream load. If the controller
needs to select between multiple supplies, the controller can manually switch between inputs through a single
GPIO. In this configuration, an external signal will switch between two input supplies, a 5-V supply (IN1) and a
3.3-V supply (IN2). Table 5 summarizes the design parameters for this example.
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Table 5. Manual Switchover Design Requirements
DESIGN PARAMETER
Specification
Details
IN1 Voltage
VIN1
5V
IN2 Voltage
VIN1
3.3 V
Load Current
IOUT
500mA
Load Capacitance
CL
100 µF
Maximum Inrush Current
IINRUSH
100 mA
Switchover Time
tSW
TPS2121: 5 µs
TPS2120: 100 µs
Mode of Operation
Manual Switchover
TPS2120: VREF
TPS2121: XREF
External MCU Signal
VMCU
3.3 V
Overvoltage Protection
VOV1
VOV2
OV1 : 6.1 V
OV2: 4 V
Current Limit
2A
10.2.3 Detailed Design Description
The TPS212x devices can be configured to manually switch between IN1 and IN2 through an external GPIO. In
this example, an external MCU signal is selecting between main power and auxiliary power to power a
downstream load. By manually toggling the TPS212x, the device will switch between both sources, even if one
supply is higher than the other supply. Ultimately, the main factor that will determine the switchover time between
IN1 (5 V) and IN2 (3.3 V) is the output load.
Manual switchover can be enabled by configuring the TPS212x for internal voltage reference control scheme
(VREF). In the VREF scheme, if the voltage on PR1 is higher than the internal VREF voltage, 1.06 V (typical),
the device will select IN1 as the output. If the voltage on PR1 drops below VREF, then the device will switch to
IN2, as long as IN2 is presenting a valid input voltage. IN1 is commonly connected to PR1 with an external
resistor divider. OV1 and OV2 can be configured to provide overvoltage protection. The ST pin can be pulled
high with a resistor to provide feedback on the status of the system. If the status pin is high, IN1 is the output. If
the pin is low, IN2 is the output. If this feature is not required, the ST pin can be connected to GND.
On the TPS2120, by connecting an external signal to the select pin (SEL), the device can override the
PR1/VREF comparison. If the voltage on SEL is higher than VREF at approximately (1.06 V), then the device will
select IN2, as shown on Table 2. If the voltage on SEL drops below VREF, then the device will switch to IN1 as
long as PR1 >= VREF. Otherwise, the highest voltage input will be chosen between IN1 and IN2. In this
example, since the IN1 is higher than IN2, at 5 V, it will be selected.
Figure 22 shows the application schematic for this design example on the TPS2120.
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Figure 22. TPS2120 Manual Switchover
On the TPS2121, fast switchover can be enabled to minimize the voltage drop on VOUT. The internal
comparator will detect and seamlessly switch between IN1 and IN2 as long as a reverse voltage condition does
not exist on that channel. To enable fast switchover on the TPS2121, CP2 needs to be higher than VREF, 1.06-V
(typical). By using the external voltage reference control scheme (XREF), the voltages on PR1 and CP2 pins are
compared to determine whether IN1 or IN2 is powering the output. If the voltage on PR1 is higher than CP2, then
IN1 is powering the output. If the voltage on PR1 is lower than CP2, then IN2 is powering the output.
Manual switchover on the TPS2121 is configured by connecting PR1 to IN1 with a resistor divider, and
connecting CP2 to the external 3.3-V MCU signal. If the voltage on CP2 is higher than the voltage on PR1, then
IN2 will power the output. However, if CP2 is toggled low, then IN1 will power the output, assuming IN1 has a
valid input voltage.
The diagram below shows the application schematic for this design example on the TPS2121.
Figure 23. TPS2121 Manual Switchover
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10.2.4 Design Procedure
10.2.4.1 Selecting PR1 and CP2 Resistors
The TPS2120 does not contain a CP2 pin. Instead, a select pin (SEL), enables override of the PR1 / VREF
comparison. Once the voltage on SEL is greater than VREF, the device will select IN2 as the output. For manual
switchover, an external signal can be connected to the SEL pin. For this example, the external MCU signal is a
3.3-V enable.
The TPS2121 can be configured for manual switchover in a similar manner as the TPS2120. Instead of a SEL
pin, the 3.3-V external MCU signal can be connected to CP2. As long as the voltage on CP2 is higher than PR1,
the device will select IN2 as the output. When the voltage on CP2 drops below PR1, the device will switch back
to IN1. Therefore, the resistor divider on PR1 is configured the same as above, with the 5 kΩ and 10.2 kΩ.
For additional precautions, the voltage on PR1 can also be configured. If the voltage on IN1 were to drop, the
device can automatically switchover to IN2. In this example, if voltage on IN1 drops below IN2 (3.3 V) then the
device will switch to IN2. Therefore, the resistor divider on PR1 should be configured such that the voltage on
PR1 will drop below VREF, when IN1 dips below 3.3 V. The bottom resistor is chosen to be 5 kΩ due to it's
commonality and minimal current leakage. If a smaller leakage is desired, a larger resistor can be used. With this
configuration, the top resistor was selected to be 10.2 kΩ. With this resistor configuration, the device will switch
to IN2 when the voltage on IN1 dips to 3.22 V. Refer to Table 2 for additional information regarding the
switchover configuration.
See Equation 5 for the VPR1 Calculation
V PR1
1.06 V
V IN1 u
VIN1 u
5 k:
5 k: 10.2 k:
5 k:
5 k: 10.2 k:
3.22 V
(5)
10.2.4.2 Selecting OVx Resistors
Independent output overvoltage protection is available for both IN1 and IN2. The VREF comparator on the OV1
and OV2 pins allows for the overvoltage protection thresholds to be adjusted independently, allowing for different
overvoltage thresholds on each channel. When overvoltage is engaged, the corresponding channel will turn off
immediately if the pin reaches VREF, 1.06 V (typical). On this design, the overvoltage thresholds are triggered at
roughly 1-V higher than the nominal input voltages. On IN1, the overvoltage resistor divider was programmed to
be 6.08 V, where as the divider on IN2 was programmed to be 3.96 V. The OV resistor calculations are shown in
Equation 6 and Equation 7.
1.06 V
1.06 V
§
·
5 k:
VIN1 u ¨
¸ 6.08 V
© 5 k: 23.7 k: ¹
§
·
5 k:
VIN2 u ¨
¸ 3.96 V
© 5 k: 13.7 k: ¹
(6)
(7)
10.2.4.3 Selecting Soft-Start Capacitor and Current Limit Resistors
Equation 1 can be used to determine the RLIM values for this application. In this example, the DC load current is
1 A. Setting the current limit to 2 A will limit potential inrush current events and protect downstream loads. See
Equation 8 for the TPS2120 ILM Calculation:
I LM
69.1
590.861
2.06 A
(8)
See Equation 9 for the TPS2121 ILM Calculation:
I LM
65.2
590.861
1.95 A
(9)
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To calculate the slew rate needed to limit the inrush current to 100 mA, the Slew Rate Calculation can be used in
Equation 10:
SR ON
SR ON
I INRUSH
CL
100 mA
100 PF
(10)
1000 V / S
(11)
Using this equation, the slew rate must be limited to 1000V/S or below to keep the inrush current below 100 mA.
According to Table 1, at 5 V a CSS capacitance of 100 nF will provide a slew rate of 780V/S (typical), which is
below the calculated threshold of 1000V/S. Therefore, a 100 nF capacitor will limit the inrush below 100 mA in a
typical application.
10.2.5 Application Curves
Figure 24. TPS2120 Switchover from IN1 to IN2
Figure 25. TPS2120 Switchover from IN2 to IN1
Figure 26. TPS2121 Switchover from IN1 to IN2
Figure 27. TPS2121 Switchover from IN2 to IN1
10.3 Automatic Switchover with Priority (XCOMP)
In certain applications, the system needs to provide uninterrupted sources of power. If one of the input power
supplies were to fail, the system needs to automatically switchover to a backup power source without interrupting
normal operation. In this example, two scenarios will be demonstrated. The first example will prioritize a 12-V
main supply, and switchover to a 5-V auxiliary supply whenever the 12 V is not present. The second example will
showcase power redundancy with two 12-V supplies. If one 12-V supply were to fail, the device will seamlessly
switchover to the backup supply.
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Automatic Switchover with Priority (XCOMP) (continued)
10.3.1 Application Schematic
Figure 28 shows the application schematic for automatic switchover on the TPS2121 between a 12-V and 5-V
supply.
IN1
(12V)
IN1
OUT
18.2kO
System Load
(2A, 200µF)
PRI
5kO
63.4kO
ST
OV1
5kO
TPS2121
IN2
(5V)
IN2
SS
10.2kO
1µF
CP2
5kO
ILM
23.7kO
OV2
GND
21.5kO
5kO
Figure 28. Automatic Switchover Between 12 V and 5 V
10.3.2 Design Requirements
Table 6. Automatic Switchover Design Requirements
DESIGN PARAMETER
Specification
Details
IN1 Voltage
VIN1
12 V
IN2 Voltage
VIN1
5V
Load Current
IOUT
2A
Load Capacitance
CL
200 µF
Maximum Inrush Current
IINRUSH
100 mA
Switchover Time
tSW
TPS2120: 5 µs
Mode of Operation
Automatic Switchover
TPS2121: XCOMP
10.3.3 Detailed Design Description
The first example demonstrates automatic switchover from main power (IN1) to standby power (IN2). This
architecture is commonly found on applications that require a secondary/auxiliary input to conserve power while
keeping downstream loads on. When switching between main and auxiliary power, the voltage drop on the
output should also be minimal to prevent the downstream load from resetting or entering a lockout condition.
In this first example, the system is prioritizing the 12-V main supply on IN1. When the 12-V supply drops below
7.6 V, the device will automatically switch to the 5-V auxiliary supply on IN2. When the 12-V supply returns, it will
become the output supply again. Furthermore, the voltage drop on the output should be minimal, providing the
output with uninterrupted redundant power.
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To minimize the voltage dip on the output, the TPS2121 will be used in fast switchover mode. By configuring the
device in external comparator control scheme (XCOMP), the voltages on PR1 and CP2 are compared to
determine whether IN1 or IN2 is powering the output. However, unlike the XREF mode, described above in the
manual switchover configuration, XCOMP does not connect an external GPIO signal to the CP2 pin. Instead,
PR1 and CP2 are connected to IN1 and IN2 respectively, allowing a direct voltage comparison between the two
input channels. PR1 and CP2 are connected to IN1 and IN2 with a resistor divider. If the voltage on CP2 is
higher than the voltage on PR1, then IN2 will power the output. If the voltage on PR1 is higher than the voltage
on CP2, then IN1 will power the output.
10.3.4 Design Procedure
10.3.4.1 Selecting PR1 and CP2 Resistors
In this example, the device will switch from IN1 to IN2 when the voltage on IN1 drops below 7.6 V. Therefore, the
voltage on PR1 needs to remain higher than the voltage on CP2 until this condition exists.
Since this example was tested on the TPS2121EVM, the resistor divider configured the voltage on CP2 to be
1.644 V.
See Equation 12 for the VCP2 Calculation
V CP2
5Vu
5 k:
5 k: 10.2 k:
1.64 V
(12)
Since the voltage on CP2 is higher than VREF, fast switchover mode is enabled.
Next, to calculate the necessary resistor divider on PR1, the voltage on PR1 needs to drop below 1.64 V when
IN1 reaches 7.6 V. On the EVM, the PR1 resistors were configured as followed:
See Equation 13 for the VPR1 Caculation
V PR1
12 V u
1.64 V
5 k:
5 k: 18.2 k:
VSW u
5 k:
5 k: 18.2 k:
2.59 V
7.6 V
(13)
10.3.5 Application Curves
Figure 29. Automatic Switchover from IN1 to IN2
Figure 30. Automatic Switchover from IN2 to IN1
10.4 Automatic Seamless Switchover with Priority (XREF)
In this second automatic switchover example, the application design will showcase power redundancy with two
12-V supplies. If one 12-V supply were to fail, the device will seamlessly switchover to the backup supply.
26
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Automatic Seamless Switchover with Priority (XREF) (continued)
10.4.1 Application Schematic
Figure 31 shows the application schematic for automatic switchover with redundant supplies on the TPS2121.
IN1
(12V)
IN1
OUT
12kO
System Load
(2.5A, 320µF)
3.24k
PRI
1MO
Hyst
57.6kO
XREF
3V
ST
CP2
OV1
5kO
TPS2121
IN2
(12V)
IN2
57.6kO
SS
OV2
1µF
5kO
ILM
GND
21.5kO
Figure 31. Automatic Switchover Between Two 12-V Supplies
10.4.2 Design Requirements
Table 7. Automatic Switchover Design Requirements
DESIGN PARAMETER
Specification
Details
Input Voltage Range
VIN1, VIN2
12.1 V ± 3%
Output Voltage Range
VOUT
12 V ± 5%
Load Current
IOUT
2.5 A
Load Capacitance
CL
320 µF
Switchover Time
tSW
TPS2120: 5 µs
Mode of Operation
Automatic Switchover
TPS2121: XREF
10.4.3 Detailed Design Description
In the second example, the system seamlessly switches between two 12-V supplies, providing uninterrupted
power to a downstream load. Priority is given to IN1, the main 12-V power rail, and switches over to IN2, the
backup 12-V power rail, whenever IN1 dips. When the main power rail returns, the device will switch back to the
main supply. Redundant power is critical in systems that require uninterrupted sources of power. If the output
voltage were to dip on these systems, this could cause the downstream load to reset to enter an undervoltage
lockout condition. Therefore, the TPS2121 will be used in fast switchover mode to minimize the output voltage
dip.
Similar to the automatic switchover example shown above, the TPS2121 can be configured in XCOMP mode.
However, to minimize the voltage switchover error for a more seamless switchover, an external precision
regulator can be connected to CP2 in XREF mode. In this configuration, a REF3325 provides an external
reference voltage on 2.5 V ± 0.15% (2.50375V). If the voltage on PR1 is higher than this external reference,
priority will be given to IN1. If the voltage on PR1 drops below 2.50375V, then the device will switchover to IN2.
The design specifications detail the input voltage range for 12.1 ± 3%. Therefore, the resistor divider on PR1 is
configured such that the voltage on the pin dips below 2.50375V before IN1 crosses 11.73 V (12.1 V – 3%).
Once this occurs, the design will start fast switchover to IN2 within 5 us.
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For additional information regarding this configuration, including full design procedures, schematics, and layout,
please refer to TIDA-01638: Seamless Switchover for Backup Power Reference Design.
10.4.4 Application Curves
Figure 33. Fast Switchover Demonstration
Figure 32. Seamless Switchover Between Two 12-V
Supplies
10.5 Highest Voltage Operation (VCOMP)
10.5.1 Application Schematic
Figure 34 shows the application schematic for highest voltage operation on the TPS2121. The same
configuration can be completed on the TPS2120, with the SEL pin connected to GND instead of the CP2 pin.
IN1
(5V)
IN1
System Load
(0.5A, 100µF)
OUT
23.7kO
OV1
5k
PR1
ST
TPS2121
IN2
(5V)
IN2
SS
23.7kO
0.01uF
OV2
5kO
CP2
ILM
GND
51.1kO
Figure 34. Highest Voltage Operation
28
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Highest Voltage Operation (VCOMP) (continued)
10.5.2 Design Requirements
Table 8. Highest Voltage Design Requirements
DESIGN PARAMETER
Specification
Details
Input Voltage
VIN1, VIN2
5V
Output Voltage
VOUT
5V
Load Current
IOUT
0.5 A
Load Capacitance
CL
100 µF
Switchover Time
tSW
TPS2121: 100 µs
Mode of Operation
Automatic Switchover
TPS2121: VCOMP
10.5.3 Detailed Design Description
In this mode of operation, the device will use an internal comparator between the two inputs to determine the
priority source. If both PR1 and CP2 are below VREF, priority is given to the highest input voltage. If both of the
inputs voltages are equal, VCOMP and hysteresis ensures that IN2 takes priority. If IN2 falls below the VCOMP
hysteresis, then IN1 will have priority. If IN2 gets reapplied, it will take priority when it falls within VCOMP of IN1.
In this example, the TPS2120 is configured with two 5-V inputs. When IN2 is applied to the system, it takes
priority over IN1. Once it gets removed, priority returns to IN1.
10.5.4 Detailed Design Procedure
See Table 2 to summarize the priority between IN1 and IN2. Once IN2 reaches within VCOMP of IN1, the
TPS2120 will switchover to IN2. Since IN1 is 5 V, once IN2 reaches 4.7 V (5 V – 300 mV), typically, the device
will switch over to IN2. On the falling transition, once IN2 drops below VCOMP of IN1, the added hysteresis will
prevent the device from switching back to IN1. Once IN2 drops below VCOMP and the hysteresis (3.5% typical) ,
the device will switch. Therefore, the device will switch back to IN1 once IN1 reaches (5 V – 300 mV – 175 mV),
4.525 V.
10.5.5 Application Curves
Figure 35. Switchover from IN1 to IN2
Figure 36. Timing from IN1 to IN2
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Figure 37. Switchover from IN2 to IN1
10.6 Reverse Polarity Protection with TPS212x
For applications that require reverse polarity protection, the TPS212x can be configured to protect against miswiring input power supplies and block reverse current that could potentially damage the system. By connecting a
diode on the GND pin of the TPS212x, this prevents reverse current from flowing back into the device when VIN
is below system ground.
Since the TPS212x has an absolute maximum rating of 24 V when referenced to device ground, the GND diode
should be rated to standoff voltages up to the maximum reverse voltage. Furthermore, since the control pin
voltages (PR1, OV1, OV2, etc.) are in reference to system GND, the voltage thresholds will need to be
recalculated based on the voltage drop across the diode. To reduce the voltage drop, a resistor in parallel with
the diode can also be used.
Supply 1
IN1
System Load
OUT
ESD Diode
ESD Diode
PR1
Supply 2
OV1
SEL
ST
IN2
SS
µC
CSS
ESD Diode
OV2
Device GND
System GND
ILM
GND
Diode
RILM
Device GND
System GND
Figure 38. TPS212x Reverse Polarity Configuration
30
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10.7 Hotplugging with TPS212x
Some applications require power muxing between hotplugged inputs, such as USB applications or systems with
secondary supplies coming from a long cable. During a hot plug event, the inherent inductance in the cable and
input traces can cause a voltage spike on the input pin (V = LCABLE * dI / dT). This can cause a voltage spike on
the input of the TPS212x that could potentially exceed the absolute maximum rating.
+
VIN1
-
Supply 1
IN1
OUT
System Load
PR1
+
VIN2
-
Supply 2
IN2
SS
CP2
ILM
GND
Figure 39. TPS212x Hotplug Configuration
Figure 40 shows a hotplug event where a 12-V supply is connected to the TPS212x through a 15ft cable. Without
an external TVS, the input voltage spikes to over 30 V. To protect against this voltage transient, a clamping
device such as a TVS (Transient Voltage Suppression) diode can be used. As shown in Figure 41 , by using the
TVS1800, the same voltage spike was clamped to 19.3 V.
Figure 40. TPS2121 Hotplug Event without TVS
Figure 41. TPS2121 Hotplug Event with TVS1800
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11 Power Supply Recommendations
IN1, IN2, and OUT traces should all be wide enough to accomodate the amount of current passing through the
device. Bypass capacitors on these pins should be placed as close to the device as possible. Low ESR ceramic
capacitors with X5R or X7R dielectric are recommended.
To avoid output voltage drop, the capacitance on OUT can be increased. If the power supply cannot handle the
inrush current transients due to the output capacitance, a higher input capacitance can be used. In the case
where there are long cables or wires connected to the input of the device, there may be ringing on the supply,
especially during the fast switchover of the TPS2121. To help nullify the inductance of the cables and prevent
ringing, a large capacitance can be used near the input of the device.
12 Layout
12.1 Layout Guidelines
Use short wide traces for input and output planes. For high current applications place vias under input and output
pins to avoid current density and thermal resistance bottlenecks.
12.2 Layout Example
The example layout for the TPS2121 shows where to place vias for better thermal dissipation. This can improve
the junction-to-ambient thermal resistance (RθJA).
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 9. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS2120
Click here
Click here
Click here
Click here
Click here
TPS2121
Click here
Click here
Click here
Click here
Click here
13.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.3 Community Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.4 Trademarks
E2E is a trademark of Texas Instruments.
13.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS2120YFPR
ACTIVE
DSBGA
YFP
20
3000
Green (RoHS
& no Sb/Br)
SAC396 | SNAGCU
Level-1-260C-UNLIM
-40 to 125
20
TPS2120YFPT
ACTIVE
DSBGA
YFP
20
250
Green (RoHS
& no Sb/Br)
SAC396 | SNAGCU
Level-1-260C-UNLIM
-40 to 125
20
TPS2121RUXR
ACTIVE
VQFN-HR
RUX
12
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2121
TPS2121RUXT
ACTIVE
VQFN-HR
RUX
12
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
2121
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2019
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
TPS2120YFPR
DSBGA
YFP
20
3000
180.0
8.4
TPS2120YFPR
DSBGA
YFP
20
3000
180.0
TPS2120YFPT
DSBGA
YFP
20
250
180.0
TPS2120YFPT
DSBGA
YFP
20
250
TPS2121RUXR
VQFNHR
RUX
12
TPS2121RUXT
VQFNHR
RUX
12
1.66
2.06
0.56
4.0
8.0
Q1
8.4
1.66
2.06
0.56
4.0
8.0
Q1
8.4
1.66
2.06
0.56
4.0
8.0
Q1
180.0
8.4
1.66
2.06
0.56
4.0
8.0
Q1
3000
180.0
8.4
2.25
2.8
1.1
4.0
8.0
Q1
250
180.0
8.4
2.25
2.8
1.1
4.0
8.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS2120YFPR
DSBGA
YFP
20
3000
182.0
182.0
20.0
TPS2120YFPR
DSBGA
YFP
20
3000
182.0
182.0
20.0
TPS2120YFPT
DSBGA
YFP
20
250
182.0
182.0
20.0
TPS2120YFPT
DSBGA
YFP
20
250
182.0
182.0
20.0
TPS2121RUXR
VQFN-HR
RUX
12
3000
182.0
182.0
20.0
TPS2121RUXT
VQFN-HR
RUX
12
250
182.0
182.0
20.0
Pack Materials-Page 2
PACKAGE OUTLINE
VQFN-HR - 1 mm max height
RUX0012A
PLASTIC QUAD FLAT-NO LEAD
A
2.1
1.9
B
2.6
2.4
PIN 1 INDEX AREA
1 MAX
C
SEATING PLANE
0.05
0.00
0.08 C
SYMM
(0.1) TYP
4X 0.95
0.75
6
3
4X 0.45
0.25
2X 0.7
2
0.1
0.05
7
SYMM
C A B
C
8
1
8X 0.5
0.3
12
9
8X 0.25
0.15
6X 0.5
2X 1.5
0.1
0.05
C A B
C
4224010/A 11/2017
NOTES:
1.
2.
All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
VQFN-HR - 1 mm max height
RUX0012A
PLASTIC QUAD FLAT-NO LEAD
6X 0.5
8X (0.2)
2X (0.8)
9
12
8X (0.6)
VIA TYP
8
1
(2.3)
SYMM
2X
(0.7)
2
7
4X (0.4)
6
3
(R0.05) TYP
4X (1.05)
SYMM
1.35
LAND PATTERN EXAMPLE
SCALE: 25X
0.05 MAX
ALL AROUND
METAL
SOLDER MASK
OPENING
EXPOSED METAL
NON- SOLDER MASK
DEFINED
4224010/A 11/2017
NOTES: (continued)
3.
For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
EXAMPLE STENCIL DESIGN
VQFN-HR - 1 mm max height
RUX0012A
PLASTIC QUAD FLAT-NO LEAD
6X 0.5
8X (0.2)
9
12
1
(2.3)
8X (0.6)
8
SYMM
2X
(0.7)
7
2
4X (0.4)
6
3
(R0.05) TYP
4X (1.05)
SYMM
1.35
SOLDER PASTE EXAMPLE
BASED ON 0.1mm THICK STENCIL
EXPOSED PAD
100% PRINTED COVERAGE BY AREA
SCALE: 25X
4224010/A 11/2017
NOTES: (continued)
4.
Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
D: Max = 1.948 mm, Min =1.888 mm
E: Max = 1.548 mm, Min =1.488 mm
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