Texas Instruments | REF34xx-EP Low-Drift, Low-Power, Small-Footprint Series Voltage Reference (Rev. B) | Datasheet | Texas Instruments REF34xx-EP Low-Drift, Low-Power, Small-Footprint Series Voltage Reference (Rev. B) Datasheet

Texas Instruments REF34xx-EP Low-Drift, Low-Power, Small-Footprint Series Voltage Reference (Rev. B) Datasheet
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REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
REF34xx-EP Low-Drift, Low-Power, Small-Footprint Series Voltage Reference
1 Features
3 Description
•
•
•
•
•
•
•
•
•
The REF34xx-EP device is a low temperature drift
(10 ppm/°C), low-power, high-precision CMOS
voltage reference, featuring ±0.05% initial accuracy,
low operating current with power consumption less
than 95 µA. This device also offers very low output
noise of 3.8 µVp-p/V, which enables its ability to
maintain high signal integrity with high-resolution data
converters in noise critical systems. With a small
SOT-23 package, REF34xx-EP offers enhanced
specifications and pin-to-pin replacement for
MAX607x and ADR34xx. The REF34xx-EP family is
compatible to most ADC and DAC.
1
Initial accuracy: ±0.05% (maximum)
Temperature coefficient: 10 ppm/°C (maximum)
Output current: ±10 mA
Low quiescent current: 95 µA (maximum)
Wide input voltage: 12 V
Output 1/f noise (0.1 Hz to 10 Hz): 3.8 µVPP/V
Small footprint 6-pin SOT-23 package
Excellent long-term stability 25 ppm/1000 hrs
Supports defense, aerospace, and medical
applications:
– Controlled baseline
– One assembly/test site
– One fabrication site
– Available extended (–55°C to 125°C)
temperature range
– Extended product life cycle
– Extended product-change notification
– Product traceability
REF34xx-EP is specified for the wide temperature
range of –55°C to 125°C. Contact the TI sales
representative for additional voltage options.
Device Information(1)
PART NAME
2 Applications
•
•
•
•
•
•
Stability and system reliability are further improved by
the low output-voltage hysteresis of the device and
low long-term output voltage drift. The small size and
low operating current of the devices (95 µA) can
benefit portable and battery-powered applications.
REF3430-EP
REF3433-EP
Dropout vs Current Load Over Temperature
10
+
2.90 mm × 1.60 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
0.4
0.36
124
+125°C
0.32
1 nF
ADS1287
REF
VIN
CIN
1 µF
REF34xx-EP
COUT
10 µF
Dropout Voltage (V)
Input Signal
SOT-23 (6)
REF3440-EP
Simplified Schematic
±
BODY SIZE (NOM)
REF3425-EP
Precision data acquisition systems
PLC analog I/O modules
Field transmitters
Industrial instrumentation
Test equipment
Power monitoring
10
PACKAGE
0.28
+25°C
0.24
-40°C
0.2
0.16
0.12
0.08
0.04
Copyright © 2017, Texas Instruments Incorporated
0
0
5
Load Current (mA)
10
D001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
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Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
4
4
5
7
Parameter Measurement Information ................ 10
8.1
8.2
8.3
8.4
9
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Solder Heat Shift.....................................................
Long-Term Stability .................................................
Power Dissipation ...................................................
Noise Performance .................................................
10
11
11
12
Detailed Description ............................................ 13
9.1 Overview ................................................................. 13
9.2 Functional Block Diagram ....................................... 13
9.3 Feature Description................................................. 13
9.4 Device Functional Modes........................................ 14
10 Application and Implementation........................ 15
10.1 Application Information.......................................... 15
10.2 Typical Application: Basic Voltage Reference
Connection ............................................................... 15
11 Power Supply Recommendations ..................... 17
12 Layout................................................................... 18
12.1 Layout Guidelines ................................................. 18
12.2 Layout Example .................................................... 18
13 Device and Documentation Support ................. 19
13.1
13.2
13.3
13.4
13.5
13.6
13.7
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
19
19
19
19
19
14 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (March 2019) to Revision B
Page
•
Added information about long-term stability throughout the data sheet................................................................................. 1
•
Added long-term stability in Electrical Characteristics table................................................................................................... 5
•
Added Long-Term Stability section in Parameter Measurement Information section .......................................................... 11
Changes from Original (December 2018) to Revision A
•
2
Page
Added new devices to the data sheet .................................................................................................................................... 1
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
5 Device Comparison Table
PRODUCT
VOUT
REF3425-EP
2.5 V
REF3430-EP
3V
REF3433-EP
3.3 V
REF3440-EP
4.096 V
6 Pin Configuration and Functions
DBV Package
6-Pin SOT-23
Top View
GND_F
1
GND_S
2
ENABLE
3
6
OUT_F
5
OUT_S
4
IN
Not to scale
Pin Functions
PIN
NO.
NAME
TYPE
DESCRIPTION
1
GND_F
Ground
Ground force connection.
2
GND_S
Ground
Ground sense connection.
3
ENABLE
Input
Enable connection. Enables or disables the device.
4
IN
Power
Input supply voltage connection.
5
OUT_S
Output
Reference voltage output sense connection.
6
OUT_F
Output
Reference voltage output force connection.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Input voltage
Output voltage
MIN
MAX
IN
VREF + 0.05
13
EN
–0.3
IN + 0.3
VREF
–0.3
5.5
V
20
mA
Output short circuit current
Temperature
(1)
(2)
Operating, Tj (2)
–55
150
Storage, Tstg
–65
170
UNIT
V
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
By design, the device is specified functional over the operating temperature of –55°C to 150°C.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2500
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VREF + VDO (1)
12
Enable voltage
0
IN
V
IL
Output current
–10
10
mA
Tj
Operating temperature
–55
125
°C
IN
Supply input voltage (IL = 0 mA, TA = 25°C)
EN
(1)
25
V
Dropout voltage.
7.4 Thermal Information
REF34xx-EP
THERMAL METRIC (1)
DBV (SOT-23)
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
185
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
156
°C/W
RθJB
Junction-to-board thermal resistance
29.6
°C/W
ψJT
Junction-to-top characterization parameter
33.8
°C/W
ψJB
Junction-to-board characterization parameter
29.1
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
7.5 Electrical Characteristics
At TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage
accuracy
TA = 25°C
Output voltage
temperature
coefficient (1)
–55°C ≤ TA ≤ 125°C
–0.05%
0.05%
2.5
10
ppm/°C
LINE AND LOAD REGULATION
ΔV(OΔVIN) Line regulation (2)
VIN = 2.55 V to 12 V, TA = 25°C
2
VIN = VREF + VDO to 12 V, –55°C ≤ TA ≤ 125°C
15
IL = 0 mA to 10 mA, VIN = 3
Sourcing
V, TA = 25°C
20
IL = 0 mA to 10 mA, VIN = 3
Sourcing
V, –55°C ≤ TA ≤ 125°C
ΔV(OΔIL)
Load regulation (2)
IL = 0 mA to –10 mA, VIN =
VREF + VDO, TA = 25°C
IL = 0 mA to –10 mA, VIN =
VREF + VDO, –55°C ≤ TA ≤
125°C
Short-circuit
current (output
shorted to ground)
ISC
Sinking
Sinking
ppm/V
30
REF3425-EP
40
REF3430-EP
43
REF3440-EP
48
REF3440-EP
60
ppm/mA
REF3425-EP
70
REF3430-EP
75
REF3433-EP
84
REF3440-EP
98
VREF = 0, TA = 25°C
18
22
mA
NOISE
ƒ = 0.1 Hz to 10 Hz
en p-p
Output voltage
noise (3)
Output voltage
noise density
en
5
ƒ = 0.1 Hz to 10 Hz (REF3440-EP)
3.8
ƒ = 10 Hz to 10 kHz
24
ƒ = 1 kHz
µV p-p/V
µV rms
0.25
ƒ = 1 kHz (REF3440-EP)
0.2
Long-term
stability (4)
0 - 1000 hours at 35°C
25
1000 - 2000 hours at 35°C
10
Turnon time
0.1% of output voltage settling, CL = 10 µF
2.5
ppm/√Hz
LONG-TERM STABILITY
ppm
TURNON
tON
ms
CAPACITIVE LOAD
CL
(1)
(2)
(3)
(4)
Stable output
capacitor value
–55°C ≤ TA ≤ 125°C
0.1
10
µF
Temperature drift is specified according to the box method. See the Feature Description section for more details.
The ppm/V and ppm/mA in line and load regulation can be also expressed as µV/V and µV/mA.
The peak-to-peak noise measurement procedure is explained in more detail in the Noise Performance section.
Long-term stability measurement procedure is explained in more in detail in the Long-Term Stability section.
Copyright © 2018–2019, Texas Instruments Incorporated
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Electrical Characteristics (continued)
At TA = 25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT VOLTAGE
VREF
Output voltage
REF3425-EP
2.5
REF3430-EP
3
REF3433-EP
3.3
REF3440-EP
4.096
V
POWER SUPPLY
VIN
Input voltage
IL
Output current
capacity
IQ
Quiescent current
VDO
Dropout voltage
VEN
ENABLE pin
voltage
IEN
ENABLE pin
leakage current
VREF + VDO
12
VIN = VREF + VDO to 12 V
Sourcing
VIN = VREF + VDO to 12 V
Sinking
10
–55°C ≤ TA ≤ 125°C
Active mode
72
95
–55°C ≤ TA ≤ 125°C
Shutdown mode
2.5
3
mA
–10
IL = 0 mA, TA = 25°C
100
IL = 10 mA, –55°C ≤ TA ≤ 125°C
6
mV
500
1.6
Voltage reference in shutdown mode (EN = 0)
0.5
VEN = VIN = 12 V, –55°C ≤ TA ≤ 125°C
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µA
50
IL = 0 mA, –55°C ≤ TA ≤ 125°C
Voltage reference in active mode (EN = 1)
V
1
2
V
µA
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
7.6 Typical Characteristics
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
81
79.5
2.6 V
3.3 V
79
79
Quiescent Current (PA)
Quiescent Current (PA)
80
5V
12 V
78
77
76
75
78.5
78
77.5
77
74
76.5
73
72
-55
-35
-15
5
25
45
65
Temperature (qC)
85
105
125
76
-55
-15
5
25
45
65
Temperature (qC)
85
105
125
D004
D003
Figure 1. VIN vs IQ Over Temperature
Figure 2. Quiescent Current vs Temperature
800
-20
CL = 1uF
CL = 10uF
720
640
-40
Noise (nV/vHz)
Power Supply Rejection Ratio (dB)
-35
-60
-80
560
480
400
320
240
160
-100
80
-120
10
100
1k
Frequency (Hz)
10k
100k
0
10
100
D005
Figure 3. Power-Supply Rejection Ratio vs Frequency
10k
100k
D009
Figure 4. Noise Performance 10 Hz to 10 kHz
ILOAD
ILOAD
+1mA
+1mA
+1mA
-1mA
+1mA
-1mA
1mA/div
4mV/div
1k
Frequency(Hz)
1mA/div
VOUT
4mV/div
250µs/div
(CL = 1µF, IOUT = 1mA)
Figure 5. Load Transient
Copyright © 2018–2019, Texas Instruments Incorporated
D010
VOUT
250µs/div
(CL = 10µF, IOUT = 1mA)
D010
Figure 6. Load Transient
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Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
ILOAD
ILOAD
+10mA
-10mA
+10mA
+10mA
10mA/div
10mA/div
-10mA
+10mA
VOUT
100mV/div
VOUT
20mV/div
250µs/div
(CL = 1µF, IOUT = 10mA)
250µs/div
(CL = 10µF, IOUT = 10mA)
D010
Figure 7. Load Transient
Figure 8. Load Transient
VIN
VIN
4V/div
4V/div
VOUT
15mV/div
VOUT
5mV/div
250µs/div
250µs/div
(CL = 1µF)
(CL = 10µF)
D011
Figure 9. Line Transient
D011
Figure 10. Line Transient
2.55
50%
2.5
40%
2.45
Population (%)
2.4
2.35
2.3
30%
20%
2.25
10%
2.2
5
25
45
65
Temperature (qC)
85
105
125
D013
0.02
-15
0.01
-35
0
0
2.1
-55
-0.01
2.15
-0.02
Quiescent Current Shutdown Mode (PA)
D010
D017
Solder Heat Shift (%)
Refer to Solder Heat Shift for more information
Figure 11. Quiescent Current Shutdown Mode
8
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Figure 12. Solder Heat Shift Distribution
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Typical Characteristics (continued)
at TA = 25°C, VIN = VEN = 12 V, IL = 0 mA, CL = 10 µF, CIN = 0.1 µF (unless otherwise noted)
2µV/div
En
1V/div
VOUT
Time 1s/div
0.5ms/div
D08_
D018
Figure 13. Turnon Time (Enable)
Copyright © 2018–2019, Texas Instruments Incorporated
Figure 14. 0.1-Hz to 10-Hz Noise (VREF)
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8 Parameter Measurement Information
8.1 Solder Heat Shift
The materials used in the manufacture of the REF34xx-EP have differing coefficients of thermal expansion,
resulting in stress on the device die when the part is heated. Mechanical and thermal stress on the device die
can cause the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow
soldering is a common cause of this error.
In order to illustrate this effect, a total of 32 devices were soldered on four printed circuit boards [16 devices on
each printed circuit board (PCB)] using lead-free solder paste and the paste manufacturer suggested reflow
profile. The reflow profile is as shown in Figure 15. The printed circuit board is comprised of FR4 material. The
board thickness is 1.65 mm and the area is 114 mm × 152 mm.
300
Temperature (ƒC)
250
200
150
100
50
0
0
50
100
150
200
250
300
Time (seconds)
350
400
C01
Figure 15. Reflow Profile
The reference output voltage is measured before and after the reflow process; the typical shift is displayed in
Figure 16. Although all tested units exhibit very low shifts (< 0.01%), higher shifts are also possible depending on
the size, thickness, and material of the printed circuit board. An important note is that the histograms display the
typical shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on PCBs with
surface-mount components on both sides, causes additional shifts in the output bias voltage. If the PCB is
exposed to multiple reflows, the device must be soldered in the second pass to minimize its exposure to thermal
stress.
50%
Population (%)
40%
30%
20%
0.02
0.01
0
-0.01
0
-0.02
10%
D017
Solder Heat Shift (%)
Figure 16. Solder Heat Shift Distribution, VREF (%)
10
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
8.2 Long-Term Stability
One of the key parameters of the REF34xx-EP references is long-term stability. Figure 17 shows the typical drift
value for the REF34xx-EP is 25 ppm from 0 to 1000 hours. This parameter is characterized by measuring 32
units at regular intervals for a period of 1000 hours. It is important to understand that long-term stability is not
ensured by design and that the output from the device may shift beyond the typical 25 ppm specification at any
time. For systems that require highly stable output voltages over long periods of time, the designer should
consider burning in the devices prior to use to minimize the amount of output drift exhibited by the reference over
time.
10
Output Voltage Stability (ppm)
5
0
-5
-10
-15
-20
-25
-30
-35
-40
0
100
200
300
400
500 600
Hours
700
800
900 1000
D022
Figure 17. Long Term Stability - 1000 hours (VREF)
8.3 Power Dissipation
The REF34xx-EP voltage references are capable of source and sink up to 10 mA of load current across the rated
input voltage range. However, when used in applications subject to high ambient temperatures, the input voltage
and load current must be carefully monitored to ensure that the device does not exceeded its maximum power
dissipation rating. The maximum power dissipation of the device can be calculated with Equation 1:
TJ TA PD u RTJA
where
•
•
•
•
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
(1)
Because of this relationship, acceptable load current in high temperature conditions may be less than the
maximum current-sourcing capability of the device. In no case should the device be operated outside of its
maximum power rating because doing so can result in premature failure or permanent damage to the device.
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8.4 Noise Performance
2µV/div
Typical 0.1-Hz to 10-Hz voltage noise can be seen in Figure 18. Device noise increases with output voltage and
operating temperature. Additional filtering can be used to improve output noise levels, although care must be
taken to ensure the output impedance does not degrade ac performance. Peak-to-peak noise measurement
setup is shown in Figure 18.
Time 1s/div
D08_
Figure 18. 0.1-Hz to 10-Hz Noise (VREF)
12
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
9 Detailed Description
9.1 Overview
The REF34xx-EP is family of low-noise, precision bandgap voltage references that are specifically designed for
excellent initial voltage accuracy and drift. The Functional Block Diagram is a simplified block diagram of the
REF34xx-EP showing basic band-gap topology.
9.2 Functional Block Diagram
GNDF
Enable
Blocks
GNDS
Digital
EN
Inrush
Current
Limit
Vdd
OUTF
OUTS
Bandgap
core
Buffer
IN
9.3 Feature Description
9.3.1 Supply Voltage
The REF34xx-EP family of references features an extremely low dropout voltage. For loaded conditions, a typical
dropout voltage versus load is shown on the front page. The REF34xx-EP features a low quiescent current that
is extremely stable over changes in both temperature and supply. The typical room temperature quiescent
current is 72 µA, and the maximum quiescent current over temperature is just 95 µA. Supply voltages below the
specified levels can cause the REF34xx-EP to momentarily draw currents greater than the typical quiescent
current. Use a power supply with a fast rising edge and low output impedance to easily prevent this issue.
9.3.2 Low Temperature Drift
The REF34xx-EP is designed for minimal drift error, which is defined as the change in output voltage over
temperature. The drift is calculated using the box method, as described by Equation 2:
VREF(MAX) VREF(MIN)
·
§
6
Drift = ¨
¸ u 10
V
Temperature
Range
u
© REF
¹
(2)
9.3.3 Load Current
The REF34xx-EP family is specified to deliver a current load of ±10 mA per output. The VREF output of the device
are protected from short circuits by limiting the output short-circuit current to 18 mA. The device temperature
increases according to Equation 3:
TJ TA PD u RTJA
where
•
•
•
•
TJ = junction temperature (°C),
TA = ambient temperature (°C),
PD = power dissipated (W), and
RθJA = junction-to-ambient thermal resistance (°C/W)
(3)
The REF34xx-EP maximum junction temperature must not exceed the absolute maximum rating of 150°C.
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
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9.4 Device Functional Modes
9.4.1
EN Pin
When the EN pin of the REF34xx-EP is pulled high, the device is in active mode. The device must be in active
mode for normal operation. The REF34xx-EP can be placed in a low-power mode by pulling the ENABLE pin
low. When in shutdown mode, the output of the device becomes high impedance and the quiescent current of
the device reduces to 2 µA in shutdown mode. The EN pin must not be pulled higher than VIN supply voltage.
See the Thermal Information for logic high and logic low voltage levels.
9.4.2 Negative Reference Voltage
For applications requiring a negative and positive reference voltage, the REF34xx-EP and OPA735 can be used
to provide a dual-supply reference from a 5-V supply. Figure 19 shows the REF3425-EP used to provide a 2.5-V
supply reference voltage. The low drift performance of the REF34xx-EP complements the low offset voltage and
zero drift of the OPA735 to provide an accurate solution for split-supply applications. Take care to match the
temperature coefficients of R1 and R2.
+5 V
3
4
5
REF3425-EP 6
2
1
+2.5 V
R1
10 kΩ R2
10 kΩ
+5 V
OPA735
–2.5 V
–5 V
Copyright © 2017, Texas Instruments Incorporated
Figure 19. REF3425-EP and OPA735 Create Positive and Negative Reference Voltages
14
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REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com
SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
As this device has many applications and setups, there are many situations that this data sheet can not
characterize in detail. Basic applications includes positive/negative voltage reference and data acquisition
systems. The table below shows the typical application of REF34xx-EP and its companion ADC/DAC.
Table 1. Typical Applications and Companion ADC/DAC
Applications
ADC/DAC
DAC8881, ADS8332, ADS8568, ADS8317,
ADS8588S, ADS1287
PLC - DCS
Display Test Equipment
ADS8332
Field Transmitters - Pressure
ADUCM360
Video Surveillance - Thermal Cameras
ADS7279
Medical Blood Glucose Meter
ADS1112
10.2 Typical Application: Basic Voltage Reference Connection
The circuit shown in Figure 20 shows the basic configuration for the REF34xx-EP references. Connect bypass
capacitors according to the guidelines in Input and Output Capacitors section.
10
10
±
Input Signal
+
124
1 nF
ADS1287
REF
VIN
CIN
1 µF
COUT
10 µF
REF34xx-EP
Copyright © 2017, Texas Instruments Incorporated
Figure 20. Basic Reference Connection
10.2.1 Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the
parameters listed in Table 2 as the input parameters.
Table 2. Design Example Parameters
DESIGN PARAMETER
Input voltage VIN
VALUE
5V
Output voltage VOUT
2.5 V
REF34xx-EP input capacitor
1 µF
REF34xx-EP output capacitor
10 µF
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
www.ti.com
10.2.2 Detailed Design Procedure
10.2.2.1 Input and Output Capacitors
A 1-µF to 10-µF electrolytic or ceramic capacitor can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate. Connect an additional 0.1-µF ceramic capacitor in parallel to
reduce high frequency supply noise.
A ceramic capacitor of at least a 0.1 µF must be connected to the output to improve stability and help filter out
high frequency noise. An additional 1-µF to 10-µF electrolytic or ceramic capacitor can be added in parallel to
improve transient performance in response to sudden changes in load current; however, keep in mind that doing
so increases the turnon time of the device.
Best performance and stability is attained with low-ESR, low-inductance ceramic chip-type output capacitors
(X5R, X7R, or similar). If using an electrolytic capacitor on the output, place a 0.1-µF ceramic capacitor in parallel
to reduce overall ESR on the output.
10.2.2.2 4-Wire Kelvin Connections
Current flowing through a PCB trace produces an IR voltage drop, and with longer traces, this drop can reach
several millivolts or more, introducing a considerable error into the output voltage of the reference. A 1-in long, 5mm wide trace of 1-oz copper has a resistance of approximately 100 mΩ at room temperature; at a load current
of 10 mA, this can introduce a full millivolt of error. In an ideal board layout, the reference must be mounted as
close as possible to the load to minimize the length of the output traces, and, therefore, the error introduced by
voltage drop. However, in applications where this is not possible or convenient, force and sense connections
(sometimes referred to as Kelvin sensing connections) are provided as a means of minimizing the IR drop and
improving accuracy.
Kelvin connections work by providing a set of high impedance voltage-sensing lines to the output and ground
nodes. Because very little current flows through these connections, the IR drop across their traces is negligible,
and the output and ground voltage information can be obtain with minimum IR drop error.
It is always advantageous to use Kelvin connections whenever possible. However, in applications where the IR
drop is negligible or an extra set of traces cannot be routed to the load, the force and sense pins for both VOUT
and GND can simply be tied together, and the device can be used in the same fashion as a normal 3-terminal
reference (as shown in Figure 19).
10.2.2.3 VIN Slew Rate Considerations
In applications with slow-rising input voltage signals, the reference exhibits overshoot or other transient
anomalies that appear on the output. These phenomena also appear during shutdown as the internal circuitry
loses power.
To avoid such conditions, ensure that the input voltage waveform has both a rising and falling slew rate close to
6 V/ms.
10.2.2.4 Shutdown/Enable Feature
The REF34xx-EP references can be switched to a low power shutdown mode when a voltage of 0.5 V or lower is
input to the ENABLE pin. Likewise, the reference becomes operational for ENABLE voltages of 1.6 V or higher.
During shutdown, the supply current drops to less than 2 µA, useful in applications that are sensitive to power
consumption.
If using the shutdown feature, ensure that the ENABLE pin voltage does not fall between 0.5 V and 1.6 V
because this causes a large increase in the supply current of the device and may keep the reference from
starting up correctly. If not using the shutdown feature, however, the ENABLE pin can simply be tied to the IN
pin, and the reference remains operational continuously.
16
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REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com
SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
10.2.3 Application Curves
2.55
Quiescent Current Shutdown Mode (PA)
79.5
Quiescent Current (PA)
79
78.5
78
77.5
77
76.5
76
-55
2.5
2.45
2.4
2.35
2.3
2.25
2.2
2.15
2.1
-55
-35
-15
5
25
45
65
Temperature (qC)
85
105
125
-35
-15
5
25
45
65
Temperature (qC)
85
105
125
D013
D004
Figure 22. Quiescent Current Shutdown Mode
Figure 21. Quiescent Current vs Temperature
11 Power Supply Recommendations
The REF34xx-EP family of references feature an extremely low-dropout voltage. These references can be
operated with a supply of only 50 mV above the output voltage. TI recommends a supply bypass capacitor
ranging between 0.1 µF to 10 µF.
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
www.ti.com
12 Layout
12.1 Layout Guidelines
Figure 23 illustrates an example of a PCB layout for a data acquisition system using the REF34xx-EP. Some key
considerations are:
• Connect low-ESR, 0.1-µF ceramic bypass capacitors at VIN, VREF of the REF34xx-EP.
• Decouple other active devices in the system per the device specifications.
• Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.
• Place the external components as close to the device as possible. This configuration prevents parasitic errors
(such as the Seebeck effect) from occurring.
• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when absolutely necessary.
12.2 Layout Example
C
GND_F 1
GND_S 2
EN 3
6 OUT_F
REF34xx-EP
5 OUT_S
4 IN
Figure 23. Layout Example
18
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REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP
www.ti.com
SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation see the following:
• INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt
Monitors, SBOS437
• Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design, TIDU357
13.2 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 3. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
REF3425-EP
Click here
Click here
Click here
Click here
Click here
REF3430-EP
Click here
Click here
Click here
Click here
Click here
REF3433-EP
Click here
Click here
Click here
Click here
Click here
REF3440-EP
Click here
Click here
Click here
Click here
Click here
13.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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SBAS942B – DECEMBER 2018 – REVISED APRIL 2019
www.ti.com
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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PACKAGE OPTION ADDENDUM
www.ti.com
13-Apr-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
REF3425MDBVTEP
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1RWC
REF3430MDBVTEP
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1SVC
REF3433MDBVTEP
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1SWC
REF3440MDBVTEP
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1SXC
V62/18622-01XE
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1RWC
V62/18622-02XE
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1SXC
V62/18622-03XE
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1SVC
V62/18622-04XE
ACTIVE
SOT-23
DBV
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-2-260C-1 YEAR
-55 to 125
1SWC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
13-Apr-2019
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF REF3425-EP, REF3430-EP, REF3433-EP, REF3440-EP :
• Catalog: REF3425, REF3430, REF3433, REF3440
NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Apr-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
REF3425MDBVTEP
SOT-23
DBV
6
250
180.0
8.4
REF3430MDBVTEP
SOT-23
DBV
6
250
180.0
REF3433MDBVTEP
SOT-23
DBV
6
250
180.0
REF3440MDBVTEP
SOT-23
DBV
6
250
180.0
3.23
3.17
1.37
4.0
8.0
Q3
8.4
3.23
3.17
1.37
4.0
8.0
Q3
8.4
3.23
3.17
1.37
4.0
8.0
Q3
8.4
3.23
3.17
1.37
4.0
8.0
Q3
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Apr-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
REF3425MDBVTEP
SOT-23
DBV
6
250
213.0
191.0
35.0
REF3430MDBVTEP
SOT-23
DBV
6
250
213.0
191.0
35.0
REF3433MDBVTEP
SOT-23
DBV
6
250
213.0
191.0
35.0
REF3440MDBVTEP
SOT-23
DBV
6
250
213.0
191.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
6
2X 0.95
1.9
1.45 MAX
3.05
2.75
5
2
4
0.50
6X
0.25
0.2
C A B
3
(1.1)
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214840/B 03/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X (0.95)
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214840/B 03/2018
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
2
5
3
4
2X(0.95)
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/B 03/2018
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
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TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on
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warranties or warranty disclaimers for TI products.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2019, Texas Instruments Incorporated
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