Texas Instruments | LM5007 75-V, 0.5-A DC/DC Buck Converter With 80-V Integrated Power MOSFET (Rev. H) | Datasheet | Texas Instruments LM5007 75-V, 0.5-A DC/DC Buck Converter With 80-V Integrated Power MOSFET (Rev. H) Datasheet

Texas Instruments LM5007 75-V, 0.5-A DC/DC Buck Converter With 80-V Integrated Power MOSFET (Rev. H) Datasheet
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LM5007
SNVS252H – SEPTEMBER 2003 – REVISED NOVEMBER 2018
LM5007 75-V, 0.5-A DC/DC Buck Converter With 80-V Integrated Power MOSFET
1 Features
3 Description
•
The LM5007 0.5-A step-down switching converter
features all of the functions needed to implement a
low-cost and efficient buck regulator. This highvoltage converter has an integrated 80-V, 0.7-A Nchannel buck switch and operates over an input
voltage range of 9 V to 75 V. The device is easy to
implement and is provided in 8-pin VSSOP and
thermally enhanced 8-pin WSON packages.
1
•
•
•
•
•
•
•
Versatile Synchronous Buck DC/DC Converter
– Operating Input Voltage Range of 9 V to 75 V
– Integrated 80-V, 0.7-A N-Channel Buck Switch
– Internal High-Voltage VCC Regulator
– Adjustable Output Voltage
– High Efficiency Operation
Adaptive Constant On-Time Control Architecture
– Ultra-Fast Transient Response
– No Control Loop Compensation Required
Nearly Constant Switching Frequency
– PWM On-Time Varies Inversely with Input
Voltage
Precision 2.5-V Reference
Low Input Quiescent Current
Inherent Protection Features for Robust Design
– Intelligent Current Limit Protection
– VCC and Gate Drive UVLO Protection
– Thermal Shutdown Protection With Hysteresis
– External Shutdown Control
8-Pin VSSOP and WSON Packages
Create a Custom Regulator Design Using
WEBENCH® Power Designer
Device Information(1)
PART NUMBER
PACKAGE
LM5007
BODY SIZE (NOM)
VSSOP (8)
3.00 mm × 3.00 mm
WSON (8)
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
The converter uses a hysteretic control scheme with
a PWM on-time inversely proportional to VIN. This
feature allows the operating frequency to remain
relatively constant with load and input voltage
variations. The hysteretic control requires no loop
compensation and provides fast transient response.
An intelligent current limit is implemented with forced
off-time that is inversely proportional to VOUT. This
current limiting scheme ensures short-circuit
protection while providing reduced load current
foldback. Other protection features include thermal
shutdown with automatic recovery, VCC and gate
drive undervoltage lockout, and maximum duty cycle
limiter.
Non-Isolated DC/DC Buck Regulator
Secondary High-Voltage Post Regulator
48-V Automotive Systems
Typical Application Schematic
8 VIN
VIN
9 V to 75 V
BST 2
6 RON
CIN
Shutdown
SW
1
LM5007
7
3
VOUT
D1
VCC
RC
RFB2
CVCC
RCL
CBST
LO
RON
COUT
FB 5
RCL
RTN
4
RFB1
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM5007
SNVS252H – SEPTEMBER 2003 – REVISED NOVEMBER 2018
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 8
7.4 Device Functional Modes........................................ 12
8
Application and Implementation ........................ 13
8.1 Application Information............................................ 13
8.2 Typical Application ................................................. 13
9 Power Supply Recommendations...................... 17
10 Layout................................................................... 18
10.1 Layout Guidelines ................................................. 18
10.2 Layout Example .................................................... 18
11 Device and Documentation Support ................. 19
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
19
20
20
20
20
12 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (October 2015) to Revision H
Page
•
Changed Features, editorial ................................................................................................................................................... 1
•
Changed Typical Application Schematic, editorial.................................................................................................................. 1
•
Changed Overcurrent Protection, editorial .......................................................................................................................... 10
•
Changed Figure 7, editorial .................................................................................................................................................. 13
•
Changed Power Supply Recommendations, editorial .......................................................................................................... 17
•
Changed Layout Example to specify recommended component placement ....................................................................... 18
•
Changed Device Support to include new content ................................................................................................................ 19
•
Changed Documentation Support to include new content ................................................................................................... 19
Changes from Revision F (March 2013) to Revision G
Page
•
Added Device Information table, ESD Ratings table, Thermal Information table, Application Information, Design
Requirements, Application Curves, Power Supply Recommendations, Layout, and Community Resources. ..................... 1
•
Added Typical Application Schematic ................................................................................................................................... 1
•
Updated pinout drawing description ...................................................................................................................................... 3
Changes from Revision E (March 2013) to Revision F
•
2
Page
Changed layout of National Semiconductor Data Sheet to TI format .................................................................................. 11
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SNVS252H – SEPTEMBER 2003 – REVISED NOVEMBER 2018
5 Pin Configuration and Functions
DGK Package and NGT Package
8-Pin VSSOP and 8-Pin WSON
Top View
1
8
SW
VIN
BST
VCC
RCL
RON
2
3
4
7
6
5
RTN
FB
Pin Functions
PIN
NAME
TYPE
1
SW
O
Switching node.
Power switching node. Connect to the LC output filter.
2
BST
I
Boost bootstrap capacitor input.
An external capacitor is required between the BST and SW pins.
A 0.01-µF ceramic capacitor is recommended. An internal diode
between VCC and BST completes the buck gate drive bias
network.
3
RCL
I
Current Limit OFF-time programming pin
tOFF = 10-5 / (0.59 + (VFB / 7.22 × 10− 6 × RCL))
A resistor between this pin and RTN determines the variation of
off-time along with the FB pin voltage per cycle while in current
limit. The off-time is preset to 17 µs if FB = 0 V and decreases as
the FB voltage increases.
4
RTN
—
5
FB
I
Feedback signal from regulated output.
This pin is connected to the inverting input of the internal
regulation comparator. The regulation threshold is 2.5 V.
6
RON
I
On-time set pin
tON = 1.42 × 10-10 RON / VIN
A resistor between this pin and VIN sets the switch on-time as a
function of VIN. The minimum recommended on-time is 300 ns at
the maximum input voltage.
7
VCC
O
Output from the internal high-voltage bias
regulator. VCC is nominally regulated to 7 V.
If an auxiliary voltage is available to raise the voltage on this pin,
above the regulation set point (7V), the internal series pass
regulator will shutdown, reducing the IC power dissipation. Do not
exceed 14V. This output provides gate drive power for the internal
buck switch. An internal diode is provided between this pin and
the BST pin. A local 0.1-uF decoupling capacitor is
recommended. The series pass regulator is current limited to 10
mA.
8
VIN
I
Input supply voltage.
Recommended operating range: 9 V to 75 V.
—
EP
—
Exposed PAD, underside of the WSON-8
package option.
Internally bonded to the die substrate. Connect to GND potential
for low thermal impedance.
NO
.
DESCRIPTION
APPLICATION INFORMATION
Circuit ground.
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6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1).
MIN
VIN to RTN
BST to RTN
SW to RTN (steady state)
V
94
V
V
BST to VCC
80
V
BST to SW
14
V
VCC to RTN
14
V
7
V
260
°C
150
°C
–0.3
Lead temperature (soldering 4 sec)
(1)
UNIT
80
–1
All other inputs to RTN
Tstg
MAX
Storage temperature
–55
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2)
±2000
Machine model (MM)
±200
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
The human body model is a 100-pF capacitor discharge through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF
capacitor discharged directly into each pin. The machine model ESD compliance level for Pin 5 is 150 V. The human body ESD
compliance level for Pin 7 and 8 is 1000 V.
6.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted).
MIN
VIN
Input voltage
TJ
Junction temperature
NOM
MAX
UNIT
9
75
V
−40
125
°C
6.4 Thermal Information
LM5007
THERMAL METRIC
(1)
DGK (VSSOP)
NGT (WSON)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
158.3
38.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
51.3
27.8
°C/W
RθJB
Junction-to-board thermal resistance
78.5
15.1
°C/W
ψJT
Junction-to-top characterization parameter
4.9
0.2
°C/W
ψJB
Junction-to-board characterization parameter
77.2
15.3
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
4.5
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
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6.5 Electrical Characteristics
At TJ = 25°C, VIN = 48 V (unless otherwise noted) (1).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
7
7.4
UNIT
STARTUP REGULATOR
VCC
VCC Regulator Output
IVCC-CL
VCC Current Limit (2)
6.6
11
VCC-UVLO
VCC Undervoltage Lockout Voltage
(VCC increasing)
6.3
VCC-UVLO-HYS
VCC Undervoltage Hysteresis
206
V
mA
VCC SUPPLY
tVCC-UV-DELAY VCC UVLO Delay (filter)
V
mV
3
µs
ICC-OPER
ICC Operating Current
Not switching, VFB = 3 V
500
675
µA
ISHD
Shutdown/Standby Current
VRON = 0 V
100
200
µA
0.74
1.34
Ω
4.5
5.5
V
SWITCH CHARACTERISTICS
RDS(on)1
Buck Switch On-State Resistance
ISW = 0.2 A,
VBST – VSW = 6.3 V (3)
VGATE-UV
Gate Drive UVLO (VBST – VSW)
Rising
3.4
VGATE-UV-HYS
Gate Drive UVLO Hysteresis
VDS((max)
Breakdown Voltage,
VIN to RTN
TJ = 25°C
80
V
TJ = –40°C to 125°C
76
V
VBST-VCC(max)
Breakdown voltage,
BST to VCC
TJ = 25°C
80
V
TJ = –40°C to 125°C
76
V
400
mV
CURRENT LIMIT
ICL
Current Limit Threshold
535
tCL-RESP
Current Limit Response Time
ISW overdrive = 0.1 A, time to switch off
tCL-OFF1
OFF-Time Generator (test 1)
VFB = 0 V, RCL = 100 kΩ
tCL-OFF2
OFF-Time Generator (test 2)
VFB = 2.3 V, RCL = 100 kΩ
725
900
mA
225
ns
17
µs
2.65
µs
ON-TIME GENERATOR
tON1
TON-1
VIN = 10 V, RON = 200 kΩ
2.15
2.77
3.5
µs
tON2
TON-2
VIN = 75 V, RON = 200 kΩ
290
390
490
ns
VSHD
Remote Shutdown Threshold
Rising
0.45
0.7
1.1
VSHD-HYS
Remote Shutdown Hysteresis
V
40
mV
300
ns
MINIMUM OFF-TIME
tOFF(min)
Minimum Off-Timer
VFB = 0 V
REGULATION AND OV COMPARATORS
VREF
FB Reference Threshold
Internal reference, trip point for switch ON
VOV-REF
FB Overvoltage Threshold
Trip point for switch OFF
IFB
FB Bias Current
2.445
2.5
2.550
V
2.875
V
100
nA
165
°C
25
°C
THERMAL SHUTDOWN
TSHD
Thermal Shutdown Temperature
THYS
Thermal Shutdown Hysteresis
(1)
(2)
(3)
All electrical characteristics having room temperature limits are tested during production with TA = TJ = 25°C. All hot and cold limits are
specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
The VCC output is intended as a self bias for the internal gate drive power and control circuits. Device thermal limitations limit external
loading.
For devices in the WSON-8 package, the MOSFET RDS(on) limits are specified by design characterization data only.
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6.6 Typical Characteristics
20
100
95
18
VIN = 15V
600k
16
14
85
80
(Ps)
T
OFF
EFFICIENCY (%)
90
VIN = 30V
VIN = 50V
75
VIN = 70V
400k
200k
12
10
8
6
70
4
65
2
60
0
0
0.1
0.2
0.3
0.4
100k
0
0.5
50k
0.5
1
V
LOAD (A)
1.5
FB
2
2.5
(V)
RCL = 50 kΩ – 600 kΩ
Figure 2. Current Limit TOFF vs. VFB
Figure 1. Converter Efficiency at 10-V Output
5
4.5
4
(us)
T
ON
3.5
3
2.5
300k
2
200k
1.5
100k
1
0.5
0
0
10
20
30
40
V
IN
50
60
70
80
(V)
RON = 100kΩ, 200kΩ, 300kΩ
Figure 3. TON vs. VIN
6
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7 Detailed Description
7.1 Overview
The LM5007 regulator is an easy-to-use buck DC/DC converter that operates from 9-V to 75-V supply voltage.
The device is intended for step-down conversions from 12-V, 24-V, and 48-V unregulated, semi-regulated and
fully-regulated supply rails. With integrated 80-V, 0.7-A buck power MOSFET, the LM5007 delivers up to 500-mA
DC load current with exceptional efficiency and low input quiescent current in a very small solution size. The
device is easy to use and is provided in VSSOP-8 and thermally-enhanced WSON-8 packages. Designed for
simple implementation, a nearly fixed-frequency, constant on-time (COT) operation with discontinuous
conduction mode (DCM) at light loads is ideal for low-noise, high current, fast transient load requirements.
Control loop compensation is not required, reducing design time and external component count. An intelligent
current limit scheme is implemented in the LM5007 with forced off-time after current limit detection, which is
inversely proportional to VOUT. This current limiting scheme reduces load current foldback.
The LM5007 incorporates numerous other features for comprehensive system requirements, including VCC
undervoltage lockout (UVLO), gate drive UVLO, maximum duty cycle limiter, intelligent current limit off-timer, and
thermal shutdown with automatic recovery. These features enable a flexible and easy-to-use platform for a wide
range of applications, such as 48-V telecom and the 48-V automotive power bus designs. The pin arrangement is
designed for simple and optimized PCB layout, requiring only a few external components.
7.2 Functional Block Diagram
7V SERIES
REGULATOR
LM5007
VCC
VIN
SD
THERMAL
SHUTDOWN
UVLO
ON TIMER
START
COMPLETE
SD /
RON
BST
Ron
START
OVER-VOLTAGE
COMPARATOR
+
-
2.875V
UVLO
300nS MIN OFF
TIMER
VIN
SD
DRIVER
COMPLETE
LEVEL
SHIFT
2.5V
SW
SET
+
FB
REGULATION
COMPARATOR
FB
RCL
Q
S
Q
R
CLR
COMPLETE
RCL
+
-
START
CURRENT LIMIT
OFF TIMER
0.725A
BUCK
SWITCH
CURRENT
SENSE
RTN
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7.3 Feature Description
7.3.1 Hysteretic Control Circuit Overview
The LM5007 is a buck DC/DC converter that uses a constant on-time (COT) control scheme. The on-time is
programmed by an external resistor and varies inversely with line input voltage (VIN). The core regulation
elements of the LM5007 are the feedback comparator and the programmed on-time one-shot. The regulator
output voltage is sensed at the feedback pin (FB) and compared to an internal reference voltage (2.5 V). If the
FB voltage is below the reference voltage, the buck switch is turned on for a fixed time interval determined by the
input voltage and a programming resistor (RON). Following the on period, the switch remains off for at least the
minimum off-time interval of 300 ns. If the FB voltage is still below the reference after the 300-ns off-time, the
switch turns on again for another on-time interval. This switching behavior continues until the FB voltage reaches
the reference voltage level.
The LM5007 operates in discontinuous conduction mode (DCM) at light load currents and continuous conduction
mode (CCM) at heavier load currents. In DCM, current through the output inductor starts at zero and ramps up to
a peak value during the buck switch on-time and then back to zero during the off-time. The inductor current
remains at zero until the next on-time interval begins when FB falls below the internal reference voltage. The
operating frequency in DCM is relatively low and varies with load. Thus, the conversion efficiency is maintained
at light loads, since the switching losses decrease with the reduction in load current and switching frequency.
Calculate the approximate switching frequency in DCM with Equation 1.
2
FSW(DCM)
VOUT ˜ LO
RLOAD ˜ RON
2
˜ 10
20
(1)
In CCM, current flows continuously through the inductor and never ramps down to zero. The switching frequency
in CCM is greater than that in DCM and remains relatively constant with load and line variations. Calculate the
approximate switching frequency in CCM with Equation 2.
FSW(CCM)
VOUT
1.42 ˜ 10
10
˜ RON
(2)
The output voltage (VOUT) can be programmed by two external resistors as shown in Figure 4. Calculate the
output voltage setpoint using Equation 3.
VOUT
§
R1 ·
2.5 V ˜ ¨ 1
¸
R
2 ¹
©
(3)
The feedback comparator in hysteretic regulators depend upon the output ripple voltage to switch the power
MOSFET on and off at regular intervals. In order for the internal comparator to respond quickly to changes in
output voltage, proportional to inductor current, a minimum amount of capacitor Equivalent Series Resistance
(ESR) is required. A ripple voltage of 25 mV to 50 mV is recommended at the feedback pin (FB) for stable
operation. In cases where the intrinsic capacitor ESR is too small, additional series resistance may be added.
For applications where lower output voltage ripple is required, the load can be connected directly to the low ESR
output capacitor as shown in Figure 4. The series resistor (R) will degrade the load regulation. Another technique
for enhancing the ripple voltage at FB is to place a capacitor in parallel with the upper feedback resistor, R1. The
addition of this feedforward capacitor reduces the attenuation of the ripple voltage from the feedback divider.
7.3.2 High-Voltage Bias Supply Regulator
The LM5007 contains an internal high-voltage bias supply regulator. The input pin (VIN) can be connected
directly to line voltages from 9 V to 75 V. To avoid supply voltage transients due to long lead inductances on the
input pin (VIN), it is always recommended to connect a low-ESR ceramic capacitor (≈ 0.1 µF) between VIN and
RTN, located close to the respective pins of the LM5007. The bias regulator is internally current limited to 10 mA.
Upon power up, the regulator is enabled and sources current into an external capacitor connected to the VCC pin.
When the VCC voltage reaches the regulation point of 7 V, the controller output is enabled.
An external auxiliary supply voltage can be applied to the VCC pin. If this auxiliary voltage is greater than 7 V, the
internal regulator will essentially shutoff, thus reducing internal power dissipation.
8
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Feature Description (continued)
VIN
L
SW
R1
R
FB
+
R2
+
REF
2.5V
VOUT
COUT
LM5007
Figure 4. Low Output Ripple Voltage Configuration
7V SERIES REGULATOR
VCC
+
0.1PF
SELF-BIAS
DIODE
BST
VIN
+
0.01PF
SW
10V
LM5007
30k
+
10k
Figure 5. Self-Biased Configuration with VOUT Feeding VCC Through a Diode
7.3.3 Overvoltage Comparator
The overvoltage comparator is provided to protect the output from overvoltage conditions due to sudden input
line voltage changes or output loading changes. The overvoltage comparator monitors the FB voltage relative to
an internal 2.875-V reference, VOV-REF. If the voltage at FB rises above VOV-REF, the comparator immediately
terminates the buck switch on-time pulse.
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Feature Description (continued)
7.3.4 On-Time Generator and Shutdown
The on-time of the LM5007 is set inversely proportional to the input voltage by an external resistor connected
between VIN and RON. The RON pin is a low impedance input biased at approximately 1.5 V. Thus, the current
through the resistor and into the RON pin is approximately proportional to VIN and used internally to control the
on-timer. This scheme of input voltage feedforward hysteretic operation achieves nearly constant switching
frequency over varying line and load conditions. Equation 4 specifies the on-time equation for the LM5007.
t ON
1.42 ˜ 10
10
˜
RON
VIN
(4)
The RON pin of the LM5007 also provides a shutdown function that disables the converter and significantly
decreases quiescent power dissipation. Pulling the voltage at RON below a 0.7-V logic threshold activates a lowpower shutdown mode. The VIN quiescent current in this shutdown mode is approximately 100 µA internal to the
LM5007 plus the current in the RON resistor.
7V SERIES
REGULATOR
VIN
VIN
ON TIMER
RON
VIN
START
RON
RON
COMPLETE
STOP
RUN
LM5007
Figure 6. Shutdown Implementation
7.3.5 Overcurrent Protection
The LM5007 contains an intelligent current limit off-timer intended to reduce the foldback characteristic inherent
with fixed off-time overcurrent protection (OCP) schemes. If the current in the buck switch exceeds 725 mA, the
present cycle on-time is immediately terminated (cycle-by-cycle current limit). Following the termination of the
cycle a non-resettable current limit off-timer is initiated. The duration of the off-time is a function of the external
resistor (RCL) and the FB voltage. When the FB voltage equals zero, the current limit off-time is internally preset
to 17 µs. This condition occurs during a short-circuit condition when a maximum amount of off-time is required.
In case of output overload (not a complete short circuit), the current limit off-time is reduced as a function of the
output voltage (measured at the FB pin). Scaling the off-time with smaller overloads reduces the amount of
foldback and also reduces the initial start-up time. Calculate the current limit off-time for a given FB voltage and
RCL resistor using Equation 5.
t OFF(CL)
10
˜
0.59
5
VFB
7.22 ˜ 10
10
6
˜ RCL
(5)
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Feature Description (continued)
Select the current limit off-time such that it is less than the MOSFET off-time during normal steady-state
switching operation. Applications utilizing low-resistance inductors and/or a low-voltage-drop freewheeling power
diodes may require special evaluation at high line, short-circuited conditions. In this special case the preset 17-µs
off-time (VFB = 0 V) may be insufficient to provide inductor volt-seconds balance. Additional inductor resistance,
output resistance or a larger voltage drop diode may be necessary to balance inductor volt-seconds and limit the
short-circuit current.
7.3.6 N-Channel Buck Switch and Driver
The LM5007 integrates an N-channel buck switch and associated floating high voltage gate driver. This gate
driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. The
bootstrap capacitor is charged by VCC through the internal high voltage diode. A 0.01-µF ceramic capacitor
connected between BST and SW is recommended.
During each cycle when the buck switch turns off, the SW voltage is approximately 0 V. When the SW voltage is
low, the bootstrap capacitor is charged from VCC through the internal bootstrap diode. The minimum off-timer, set
to 300 ns, ensures that there is a minimum interval every switching cycle to recharge the bootstrap capacitor.
An external recirculating diode from the SW to RTN is necessary to carry the inductor current after the internal
buck switch turns off. This external diode must be an ultra-fast switching or Schottky type to reduce turn-on
losses and switch current overshoot. The reverse voltage rating of the recirculating diode must be greater than
the maximum line input voltage.
7.3.7 Thermal Protection
Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event the maximum junction
temperature is exceeded. When thermal protection is activated, typically at 165°C, the converter is forced into a
low power reset state, disabling the output driver. This feature is provided to prevent catastrophic failures from
accidental device overheating.
7.3.8 Minimum Load Current
A minimum load current of 1 mA is required to maintain proper operation. If the load current falls below that level,
the bootstrap capacitor may discharge during the long off-time, and the circuit will either shutdown or cycle on
and off at a low frequency. If the load current is expected to drop below 1 mA in the application, choose the
feedback resistors with sufficiently low value to provide the minimum required load current at nominal VOUT.
7.3.9 Ripple Configuration
The LM5007 uses an adaptive constant on-time (COT) control in which the conduction time of the buck MOSFET
is terminated by an on-timer and the off-time is terminated by the feedback voltage (VFB) falling below the
reference voltage (VREF). Therefore, for stable operation, the feedback voltage must decrease monotonically and
in phase with the inductor current during the off-time interval. Furthermore, this change in feedback voltage (VFB)
during the off-time must be larger than any noise component present at the feedback node.
Table 1 shows three different methods for generating appropriate voltage ripple at the feedback node. Type 1
and Type 2 ripple circuits couple the ripple at the output of the converter to the feedback node (FB). The output
voltage ripple has two components:
1. Capacitive ripple caused by the inductor current ripple charging/discharging the output capacitor.
2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor.
The capacitive ripple is not in phase with the inductor current. As a result, the capacitive ripple does not
decrease monotonically during the off-time. The resistive ripple is in phase with the inductor current and
decreases monotonically during the off-time. The resistive ripple must exceed the capacitive ripple at the output
node (VOUT) for stable operation. If this condition is not satisfied, unstable switching behavior is observed in COT
converters with multiple on-time bursts in close succession followed by a long off-time.
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Feature Description (continued)
Type 3 ripple method uses Rr and Cr and the switch node (SW) voltage to generate a triangular ramp. This
triangular ramp is ac coupled using Cac to the feedback node (FB). Since this circuit does not use the output
voltage ripple, it is ideally suited for applications where low output voltage ripple is required. See AN-1481
Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs
(SNVA166) for more details for each ripple generation method.
Table 1. Ripple Configuration
TYPE 1
LOWEST COST CONFIGURATION
TYPE 2
REDUCED RIPPLE CONFIGURATION
VOUT
TYPE 3
MINIMUM RIPPLE CONFIGURATION
VOUT
L1
VOUT
L1
L1
R FB2
Cac
R FB2
RC
To FB
C OUT
COUT
R FB2
GND
C OUT
R FB1
To FB
R FB1
GND
GND
Cac t
25mV VOUT
˜
'IL(min) VREF
Cr
Cac
To FB
R FB1
RC
Rr
RC
(6)
RC
Cr
5
3.3nF
FSW ˜ RFB1 RFB2
Cac
25mV
'IL(min)
Rr ˜ Cr
(7)
100nF
VIN(min)
VOUT ˜ t ON
25mV
(8)
7.4 Device Functional Modes
7.4.1 Standby Mode with VIN
The LM5007 is intended to operate with input voltages above 9 V. The minimum operating input voltage is
determined by the VCC undervoltage lockout threshold of 6.3 V (typ). If VIN is too low to support a VCC voltage
greater than the VCC UVLO threshold, the converter switches to its standby mode with the buck switch in the off
state.
7.4.2 Shutdown Mode
The LM5007 is in shutdown mode when the RON pin is pulled below 0.7 V (typ). In this mode, the buck MOSFET
is held off and the VCC regulator is disabled.
12
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM5007 requires only a few external components to convert from a wide range of supply voltages to a fixed
output voltage. To expedite and streamline the process of designing a LM5007-based converter, a
comprehensive LM5007 quick-start calculator is available for download to assist the designer with component
selection for a given application. WEBENCH® online software is also available to generate complete designs,
leveraging iterative design procedures and access to comprehensive component databases. The following
sections discuss a design procedure using a typical application example. Figure 7 shows the LM5007 in a
configuration suitable for several application use cases. See the LM5007 EVM for more details.
8.2 Typical Application
The application schematic of an LM5007-based buck converter is shown in Figure 7. For an output voltage
(VOUT) above the maximum regulation threshold of VCC (see Electrical Characteristics), the VCC pin can be
supplied from VOUT through a diode for higher efficiency and lower power dissipation in the IC.
BST 2
8 VIN
VIN
RON
12 V to 75 V
CIN
1 µF
CBYP
0.1 µF
CBST
0.01 µF
LM5007
200 NŸ
6 RON
L1
SW
1
Shutdown
7
CVCC
0.1 µF
3
RCL
100 NŸ
D1
VCC
RFB2
3.01 NŸ
FB 5
RCL
RTN
4
VOUT
100 µH
RC
1Ÿ
10V
COUT
15 µF
RFB1
1 NŸ
Figure 7. 12-V to 75-V Input and 10-V, 400-mA Output Buck Converter
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETERS
VALUE
Input Voltage
12 V to 75 V
Output Voltage
10 V
Maximum Output Current
400 mA
Nominal Switching Frequency
380 kHz
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8.2.2 Detailed Design Procedure
8.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the LM5007 device with WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
8.2.2.2 Custom Design With Excel Quickstart Tool
Select components based on the converter specifications using the LM5007 quick-start calculator available for
download from the LM5007 product folder.
8.2.2.3 Feedback Resistors, RFB1 and RFB2
VOUT = VFB x (RFB2/RFB1 + 1), and since VFB = 2.5 V in regulation, the ratio of RFB2 to RFB1 is 3 : 1. Select
standard values of RFB1 = 1 kΩ and RFB2 = 3.01 kΩ. Other values can be chosen as long as the 3 : 1 ratio is
maintained.
8.2.2.4 Switching Frequency Selection, RON
Set the switching frequency by resistor RON using Equation 9.
VOUT
RON
1.42 ˜ 10
10
˜ FSW
(9)
Selecting FSW = 380 kHz results in RON= 185 kΩ. Choose a standard value of 200 kΩ for this design.
8.2.2.5 Buck Inductor, L1
The inductor is selected to provide a current ripple of 40% to 50% of the full-load current. In addition, the peak
inductor current at maximum load must be smaller than the minimum current limit threshold provided in Electrical
Characteristics. The inductor current ripple is given by Equation 10.
'IL
VIN VOUT VOUT
˜
L1 ˜ FSW
VIN
(10)
The maximum ripple is observed at the maximum input voltage. Using VIN = 75 V and ΔIL= 50% x IOUT(max)
results in L1 = 114 µH. Select a standard inductor value of 100 µH. The inductor current ripple ranges from 88
mA to 228 mA depending on input voltage. The peak inductor and switch current at full load are given by
Equation 11.
IL1(peak)
IOUT(max)
'IL
2
(11)
At maximum VIN, the peak inductor current is 514 mA, which is lower than the minimum current limit threshold of
535 mA. The selected inductor should be able to operate at the maximum current limit of 900 mA without
saturation during startup and overload conditions.
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8.2.2.6 Output Capacitor, COUT
Select the output capacitor to minimize the capacitive ripple. The maximum ripple is observed at the maximum
input voltage and is given by Equation 12.
COUT
'IL
8 ˜ FSW ˜ 'VCOUT
where
•
•
ΔVCOUT is the voltage ripple across the capacitor,
ΔIL is the peak-to-peak inductor ripple current.
(12)
Substituting VIN = 75 V and targeting ΔVCOUT= 10 mV gives COUT = 7.5 µF. Select a standard 15-µF value for
COUT with X5R or X7R dielectric and a voltage rating of 16 V or higher.
8.2.2.7 Type I Ripple Circuit, RC
Choose a type I ripple circuit, as described in Ripple Configuration, for this example. For a constant on-time
(COT) converter to be stable, the injected in-phase ripple must be larger than the capacitive ripple on COUT.
Using the type I ripple circuit equations with minimum FB pin ripple of 25 mV, calculate the value of series
resistor RC using Equation 13.
25mV VOUT
˜
'IL(min) VREF
RC
(13)
Based on the calculated value of 1.1 Ω, select a standard value of 1 Ω.
8.2.2.8 Input Capacitor, CIN
The input capacitor should be large enough to limit the input voltage ripple that can be calculated using
Equation 14.
IOUT(max) ˜ D ˜ 1 D
CIN
FSW ˜ 'VCIN
(14)
The input ripple reaches its maximum at D = 0.5. Targeting a ΔVCIN = 0.5 V at using a duty cycle of D = 0.5
results in CIN = 0.526 µF. A standard value of 1 µF is selected. The input capacitor should be rated for the
maximum input voltage under all conditions. A 100-V, X7R type capacitor is selected for this design. The input
capacitor should be placed close to the VIN pin and the anode of the diode (D1) as it supplies high-frequency
switching current.
Also place a 0.1-µF bypass capacitor (CBYP) very close to VIN and RTN pins of the IC to reduce switching power
loop parasitic inductance and mitigate SW node overshoot and ringing.
8.2.2.9 Current Limit, RCL
Resistor RCL sets the current limit off-timer according to Equation 5. The useable values tend to be in the range
of 100 kΩ to 1 MΩ. Equation 15 specifies the off-time required for volt-second balance on the inductor in current
limit.
t OFF(ILIM)
VIN(max) ˜ 225ns
VOUT
VF
ILIM ˜ RDCR
where
•
•
•
•
•
225 ns is the current limit response time,
VF is the forward voltage drop of the freewheeling power diode,
VOUT is the output voltage,
ILIM is the current limit,
RDCR is the inductor DC resistance.
(15)
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The programmed current limit off-time should be higher than the off-time needed for volt-second balance on the
inductor. For a short at the output (VOUT = 0 V) and VF = 0.7 V, an inductor DCR of 390 mΩ or higher is needed
to achieve volt-second balance at the maximum programmed current limit off-time of 17 µs. Using Equation 5, an
RCL of greater than 10 kΩ can be used. Select a conservative value of 100 kΩ for this design.
For step-by-step design procedures, circuit schematics, bill of materials, PCB files, simulation and test results
of LM5007-powered implementations, refer to the TI Designs reference design library.
8.2.3 Application Curves
VOUT = 10 V
CH1: Switch Node
VIN = 20 V
CH2: VOUT (AC)
IOUT = 250 mA
CH4: Inductor
Current
VOUT = 10 V
CH1: Switch Node
Figure 8. Switching Waveforms, VIN = 20 V
16
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VIN = 75 V
CH2: VOUT (AC)
IOUT = 250 mA
CH4: Inductor
Current
Figure 9. Switching Waveforms, VIN = 75 V
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9 Power Supply Recommendations
The LM5007 converter is designed to operate from a wide input voltage range from 9 V to 75 V. The
characteristics of the input supply must be compatible with the Absolute Maximum Ratings and Recommended
Operating Conditions. In addition, the input supply must be capable of delivering the required input current to the
fully-loaded regulator. Estimate the average input current with Equation 16.
VOUT ˜ IOUT
VIN ˜ K
IIN
where
•
η is the efficiency
(16)
If the converter is connected to an input supply through long wires or PCB traces with large impedance,
achieving stable performance requires special care. The parasitic inductance and resistance of the input cables
may have an adverse affect on converter operation. The parasitic inductance in combination with the low-ESR
ceramic input capacitors form an underdamped resonant circuit. This circuit can cause overvoltage transients at
VIN each time the input supply is cycled ON and OFF. The parasitic resistance causes the input voltage to dip
during a load transient. If the regulator is operating close to the minimum input voltage, this dip can cause false
UVLO fault triggering and a system reset. The best way to solve such issues is to reduce the distance from the
input supply to the regulator and use an aluminum or tantalum input capacitor in parallel with the ceramics. The
moderate ESR of the electrolytic capacitors helps to damp the input resonant circuit and reduce any voltage
overshoots. A capacitance in the range of 10 µF to 47 µF is usually sufficient to provide input damping and helps
to hold the input voltage steady during large load transients.
An EMI input filter is often used in front of the regulator that, unless carefully designed, can lead to instability as
well as some of the effects mentioned above. The user's guide Simple Success with Conducted EMI for DC-DC
Converters (SNVA489) provides helpful suggestions when designing an input filter for any switching regulator.
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10 Layout
10.1 Layout Guidelines
The LM5007 regulation and overvoltage comparators are very fast, and as such respond to short-duration noise
pulses. Layout considerations are therefore critical for optimum performance:
1. Minimize the area of the high di/dt switching current loop consisting of the VIN and SW pins, freewheeling
power diode, and input ceramic capacitor. Keep the input capacitor(s) close to the VIN pin of the LM5007.
Place the cathode of the freewheeling diode close to the SW pin and and its anode near the return terminal
of the input capacitor as illustrated in Figure 10. Route a short, direct connection to the RTN pin using
polygon copper pours under the IC.
2. Place the inductor close to the SW pin of the LM5007. Minimize SW node copper area to reduce radiated
noise related to high dv/dt.
3. Locate CBST, RCL, RON and CVCC components as physically close as possible to their respective pins, thereby
minimizing noise pickup in the printed-circuit tracks.
4. Locate the VOUT sense trace away from noise sources such as inductors. Place both feedback resistors
close to the FB pin to minimize the length of the FB trace.
5. Place a solid GND plane on layer 2 of the PCB.
If the internal dissipation of the LM5007 converter produces excessive junction temperatures during normal
operation, optimal use of the PCB ground plane can help considerably to dissipate heat. The exposed pad on the
bottom of the WSON-8 package can be soldered to a ground plane on the PCB, and that plane should extend
out from beneath the IC to help dissipate the heat. Additionally, the use of wide PCB traces for power connection
can also help conduct heat away from the IC. Judicious positioning of the LM5007 converter within the end
product, along with use of any available air flow (forced or natural convection), can help reduce the operating
junction temperature.
10.2 Layout Example
Locate D1 close to the SW pin and
position its anode towards CIN
Via to Ground Plane
VOUT
CA
COUT
GND
Minimize the area
of this critical loop
L1
VIN
SW
VIN
VCC
CVCC
RCL
RON
RON
RTN
FB
RFB2
BST
LM5007
Via
to VIN
RCL
Locate CBST close to
the SW and BST pins
CBST
RA
Use minimum SW node
copper area by keeping
L1 close to the LM5007
Locate CIN close to the VIN
pin and the anode of D1
CIN
D1
RFB1
Locate CVCC, RON, RFB1 and RFB2
close to their respective pins
CB
Figure 10. PCB Layout Example
NOTE
It is critical to minimize switching loop parasitic inductance by locating the input capacitor
close to the VIN pin of the LM5007. Also, place the freewheeling power diode near the SW
pin with its anode adjacent to the input capacitor as shown in Figure 10.
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.1.2 Custom Design With WEBENCH® Tools
Click here to create a custom design using the LM5007 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
11.1.3 Development Support
For development support see the following:
• For TI's reference design library, visit TI Designs
• For TI's WEBENCH Design Environments, visit WEBENCH® Design Center
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation see the following:
• LM5007 Quick-start Calculator
• LM5007EVAL Evaluation Board
• LM5007SD-EVAL Evaluation Board
• LM5006EVAL Evaluation Board
• LM5008EVAL Evaluation Board
• LM5008AEVAL Evaluation Board
• LM5009EVAL Evaluation Board
• LM5010-EVAL Evaluation Board
• LM5010AEVAL Evaluation Board
• Buck Regulator Topologies for Wide Input/Output Voltage Differentials (SNVA594)
• AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator
Designs (SNVA166)
• White Papers:
– Valuing Wide VIN, Low EMI Synchronous Buck Circuits for Cost-driven, Demanding Applications
(SLYY104)
– An Overview of Conducted EMI Specifications for Power Supplies (SLYY136)
– An Overview of Radiated EMI Specifications for Power Supplies (SLYY142)
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Documentation Support (continued)
•
TI
–
–
–
–
–
Designs:
PoE PSE Type 2 (30W) IEEE 802.3at Fully Autonomous Quad Port Solution
8 Channel, 2-A High-Side Driver Reference Design for Digital Output Modules
Low Side 0.5A 8ch Digital Output Module for PLC
High Fidelity 175W Class-D Audio Amplifier with Digital Inputs and Processing Reference Design
Bidirectional DC-DC Converter Reference Design for 12-V/48-V Automotive Systems
11.2.1.1 PCB Layout Resources
• AN-1149 Layout Guidelines for Switching Power Supplies (SNVA021)
• AN-1229 Simple Switcher PCB Layout Guidelines (SNVA054)
• Constructing Your Power Supply – Layout Considerations (SLUP230)
• Low Radiated EMI Layout Made SIMPLE with LM4360x and LM4600x (SNVA721)
• AN-2162 Simple Success With Conducted EMI From DC-DC Converters (SNVA489)
• Reduce Buck-Converter EMI and Voltage Stress by Minimizing Inductive Parasitics (SLYT682)
• Power House Blogs:
– High-Density PCB Layout of DC/DC Converters
11.2.1.2 Thermal Design Resources
• AN-2020 Thermal Design By Insight, Not Hindsight (SNVA419)
• AN-1520 A Guide to Board Layout for Best Thermal Resistance for Exposed Pad Packages (SNVA183)
• Semiconductor and IC Package Thermal Metrics (SPRA953)
• Thermal Design Made Simple with LM43603 and LM43602 (SNVA719)
• PowerPAD™Thermally Enhanced Package (SLMA002)
• PowerPAD Made Easy (SLMA004)
• Using New Thermal Metrics (SBVA025)
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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20-Jul-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM5007MM
NRND
VSSOP
DGK
8
1000
TBD
Call TI
Call TI
-40 to 125
S81B
LM5007MM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
S81B
LM5007MMX/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
S81B
LM5007SD
NRND
WSON
NGT
8
1000
TBD
Call TI
Call TI
-40 to 125
L00031B
LM5007SD/NOPB
ACTIVE
WSON
NGT
8
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
L00031B
LM5007SDX/NOPB
ACTIVE
WSON
NGT
8
4500
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
L00031B
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
20-Jul-2019
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM5007MM
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM5007MM/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM5007MMX/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM5007SD
WSON
NGT
8
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM5007SD/NOPB
WSON
NGT
8
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM5007SDX/NOPB
WSON
NGT
8
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM5007MM
VSSOP
DGK
8
1000
210.0
185.0
35.0
LM5007MM/NOPB
VSSOP
DGK
8
1000
210.0
185.0
35.0
LM5007MMX/NOPB
VSSOP
DGK
8
3500
367.0
367.0
35.0
LM5007SD
WSON
NGT
8
1000
210.0
185.0
35.0
LM5007SD/NOPB
WSON
NGT
8
1000
210.0
185.0
35.0
LM5007SDX/NOPB
WSON
NGT
8
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NGT0008A
SDC08A (Rev A)
www.ti.com
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
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