Texas Instruments | LM2735 520-kHz and 1.6-MHz Space-Efficient Boost and SEPIC DC/DC Regulator (Rev. I) | Datasheet | Texas Instruments LM2735 520-kHz and 1.6-MHz Space-Efficient Boost and SEPIC DC/DC Regulator (Rev. I) Datasheet

Texas Instruments LM2735 520-kHz and 1.6-MHz Space-Efficient Boost and SEPIC DC/DC Regulator (Rev. I) Datasheet
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LM2735
SNVS485I – JUNE 2007 – REVISED SEPTEMBER 2018
LM2735 520-kHz and 1.6-MHz Space-Efficient Boost and SEPIC DC/DC Regulator
1 Features
3 Description
•
•
•
The LM2735 device is an easy-to-use, space-efficient
2.1-A low-side switch regulator, ideal for Boost and
SEPIC DC/DC regulation. The device provides all the
active functions to provide local DC-DC conversion
with fast-transient response and accurate regulation
in the smallest PCB area. Switching frequency is
internally set to either 520 kHz or 1.6 MHz, allowing
the use of extremely small surface mount inductor
and chip capacitors, while providing efficiencies of up
to 90%. Current-mode control and internal
compensation
provide
ease-of-use,
minimal
component count, and high-performance regulation
over a wide range of operating conditions. External
shutdown features an ultra-low standby current of 80
nA, ideal for portable applications. Tiny SOT-23,
WSON, and MSOP-PowerPAD packages provide
space savings. Additional features include internal
soft start, circuitry to reduce inrush current, pulse-bypulse current limit, and thermal shutdown.
1
•
•
•
•
•
•
•
Input Voltage Range: 2.7 V to 5.5 V
Output Voltage Range: 3 V to 24 V
2.1-A Switch Current Over Full Temperature
Range
Current-Mode Control
Logic High Enable Pin
Ultra-Low Standby Current of 80 nA in Shutdown
170-mΩ NMOS Switch
±2% Feedback Voltage Accuracy
Ease-of-Use, Small Total Solution Size
– Internal Soft Start
– Internal Compensation
– Two Switching Frequencies
– 520 kHz (LM2735-Y)
– 1.6 MHz (LM2735-X)
– Uses Small Surface Mount Inductors and Chip
Capacitors
– Tiny SOT-23, WSON, and MSOPPowerPAD™ Packages
Create a Custom Design Using the LM2735 With
WEBENCH® Power Designer
•
•
•
•
•
PART NUMBER
LM2735
PACKAGE
BODY SIZE (NOM)
WSON (6)
3.00 mm × 3.00 mm
SOT-23 (5)
1.60 mm × 2.90 mm
MSOP PowerPAD (8)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
Device Information(1)
LCD Display Backlighting For Portable
Applications
OLED Panel Power Supply
USB-Powered Devices
Digital Still and Video Cameras
White LED Current Source
For Automotive see LM2735-Q1
space
Typical Boost Application Circuit
Efficiency vs Load Current VO = 12 V
VIN
2.7V-5.5V
L1
12V
D1
R2
R3
4
3
C2
2
5
C3
R1
1
C1
GND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2735
SNVS485I – JUNE 2007 – REVISED SEPTEMBER 2018
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
7
Absolute Maximum Ratings ......................................
ESD Ratings: LM2735 ..............................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1
7.2
7.3
7.4
Overview ................................................................... 9
Functional Block Diagram ....................................... 11
Feature Description................................................. 11
Device Functional Modes........................................ 14
8
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Applications ................................................ 14
9 Power Supply Recommendations...................... 37
10 Layout................................................................... 37
10.1 Layout Guidelines ................................................. 37
10.2 Layout Examples................................................... 38
10.3 Thermal Considerations ........................................ 39
11 Device and Documentation Support ................. 48
11.1
11.2
11.3
11.4
11.5
11.6
Device Support......................................................
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
48
48
48
48
48
49
12 Mechanical, Packaging, and Orderable
Information ........................................................... 49
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision H (March 2018) to Revision I
•
Added bullet to Applications list regarding automotive device LM2735-Q1 .......................................................................... 1
Changes from Revision G (August 2015) to Revision H
•
2
Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
Changes from Revision E (April 2013) to Revision F
•
Page
Changed VFB Feedback Test Conditions from "TJ = –40°C to 125°C" To "TJ = 0°C to 125°C" for the SOT-23,
WSON, and MSOP-PowerPAD devices................................................................................................................................. 5
Changes from Revision F (April 2013) to Revision G
•
Page
Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 33
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5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
SW 1
DGN Package
8-Pin MSOP-PowerPAD
Top View
5
VIN
NC
1
8
NC
PGND
2
7
SW
VIN
3
6
AGND
EN
4
5
FB
GND 2
FB
3
4
EN
NGG Package
6-Pin WSON
Top View
PGND
1
6
SW
VIN
2
5
AGND
EN
3
4
FB
Pin Functions
PIN
NAME
SOT-23
WSON
MSOPPowerPAD
I/O
DESCRIPTION
AGND
—
5
6
PWR
Signal ground pin. Place the bottom resistor of the feedback network as
close as possible to this pin and pin 4.
For MSOP-PowerPAD, place the bottom resistor of the feedback
network as close as possible to this pin and pin 5
EN
4
3
4
I
Shutdown control input. Logic high enables operation. Do not allow this
pin to float or be greater than VIN + 0.3 V.
FB
3
4
5
I
Feedback pin. Connect FB to external resistor-divider to set output
voltage.
GND
2
DAP
DAP
PWR
NC
—
—
1, 8
—
PGND
—
1
2
PWR
SW
1
6
7
O
VIN
5
2
3
PWR
Signal and power ground pin. Place the bottom resistor of the feedback
network as close as possible to this pin.
For WSON, connect to pin 1 and pin 5 on top layer. Place 4-6 vias from
DAP to bottom layer GND plane.
No Connect
Power ground pin. Place PGND and output capacitor GND close
together.
Output switch. Connect to the inductor, output diode.
Supply voltage for power stage, and input supply voltage.
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6 Specifications
6.1 Absolute Maximum Ratings
See (1)
MIN
MAX
VIN
–0.5
7
V
SW Voltage
–0.5
26.5
V
FB Voltage
–0.5
3
V
EN Voltage
–0.5
7
V
150
°C
220
°C
150
°C
Junction temperature
(2)
Soldering information, infrared/convection reflow (15 s)
Storage Temperature
(1)
(2)
–65
UNIT
If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
Thermal shutdown will occur if the junction temperature exceeds the maximum junction temperature of the device.
6.2 ESD Ratings: LM2735
VALUE
V(ESD)
(1)
(2)
(3)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2)
±2000
Charged device model (CDM), per JEDEC specification JESD22C101 (3)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible if necessary precautions are taken.
The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible if necessary precautions are taken.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
VSW
VEN
(1)
Junction Temperature Range
Power Dissipation
(1)
NOM
MAX
UNIT
2.7
5.5
V
3
24
V
0
VIN
V
–40
125
°C
400
mW
(Internal) SOT-23
Do not allow this pin to float or be greater than VIN + 0.3 V.
6.4 Thermal Information
LM2735
THERMAL METRIC (1)
Junction-to-ambient thermal resistance (2)
RθJA
(2)
NGG (WSON)
DBV (SOT-23)
DGN (MSOPPowerPAD)
6 PINS
5 PINS
8 PINS
54.9
164.2
59
°C/W
UNIT
RθJC(top)
Junction-to-case (top) thermal resistance
50.9
115.3
51.2
°C/W
RθJB
Junction-to-board thermal resistance
29.3
27
35.8
°C/W
ψJT
Junction-to-top characterization parameter
0.7
12.8
2.7
°C/W
ψJB
Junction-to-board characterization parameter
29.4
26.5
35.6
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
9.3
N/A
7.3
°C/W
(1)
(2)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Applies for packages soldered directly onto a 3” × 3” PC board with 2-oz. copper on 4 layers in still air.
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6.5 Electrical Characteristics
Limits are for TJ = 25°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical
values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VIN = 5 V unless
otherwise indicated under the Conditions column.
PARAMETER
TEST CONDITIONS
–40°C ≤ to TJ ≤ 125°C (SOT-23)
0°C ≤ to TJ ≤ 125°C (SOT-23)
–40°C ≤ to TJ ≤ 125°C (WSON)
VFB
Feedback Voltage
0°C ≤ to TJ ≤ 125°C (WSON)
ΔVFB/VIN
Feedback Voltage Line
Regulation
IFB
Feedback Input Bias
Current
TJ = 0°C to 125°C
1.23
1.28
0.06
%/V
1
2000
520
360
680
88%
TJ = 25°C
99%
TJ = –40°C to 125°C
91%
5%
2%
TJ = 25°C
170
TJ = –40°C to 125°C
330
TJ = 25°C
190
TJ = –40°C to 125°C
3
TJ = –40°C to 125°C
A
2.1
4
TJ = 25°C
ms
7
TJ = –40°C to 125°C
11
TJ = 25°C
3.4
TJ = –40°C to 125°C
80
TJ = 25°C
nA
2.3
TJ = –40°C to 125°C
2.65
TJ = 25°C
1.9
TJ = –40°C to 125°C
V
1.7
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mA
7
All Options VEN = 0 V
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mΩ
350
TJ = 25°C
VIN Falling
kHz
96%
LM2735-Y
Undervoltage Lockout
µA
1600
1200
LM2735-X
VIN Rising
UVLO
1.29
1.255
TJ = –40°C to 125°C
LM2735-Y
Quiescent Current
(shutdown)
1.281
1.22
TJ = 25°C
LM2735-X
IQ
TJ = –40°C to 125°C
TJ = –40°C to 125°C
Quiescent Current
(switching)
V
1.255
TJ = 25°C
WSON
Soft Start
1.229
TJ = –40°C to 125°C
Switch ON-Resistance
SS
TJ = 0°C to 125°C
TJ = 25°C
SOT-23 and MSOP-PowerPAD
Switch Current Limit
1.285
1.255
0.1
Maximum Duty Cycle
ICL
1.225
TJ = 25°C
TJ = –40°C to 125°C
LM2735-Y
RDS(ON)
TJ = –40°C to 125°C
TJ = 25°C
Switching Frequency
Minimum Duty Cycle
1.274
1.255
VIN = 2.7 V to 5.5 V
LM2735-X
DMIN
1.28
1.236
TJ = 25°C
0°C ≤ to TJ ≤ 125°C (MSOPPowerPAD)
MAX UNIT
1.255
TJ = 0°C to 125°C
TJ = 25°C
LM2735-Y
DMAX
1.23
TJ = 25°C
–40°C ≤ to TJ ≤ 125°C
(MSOP-PowerPAD)
TYP
1.255
TJ = –40°C to 125°C
TJ = 25°C
LM2735-X
FSW
MIN
TJ = 25°C
5
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Electrical Characteristics (continued)
Limits are for TJ = 25°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical
values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VIN = 5 V unless
otherwise indicated under the Conditions column.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Shutdown Threshold
Voltage
See
Enable Threshold
Voltage
See (1), TJ = –40°C to 125°C
I-SW
Switch Leakage
VSW = 24 V
1
µA
I-EN
Enable Pin Current
Sink/Source
100
nA
VEN_TH
TSD
(1)
(2)
6
(1)
, TJ = –40°C to 125°C
0.4
V
1.8
Thermal Shutdown
Temperature (2)
160
Thermal Shutdown
Hysteresis
10
°C
Do not allow this pin to float or be greater than VIN + 0.3 V.
Thermal shutdown will occur if the junction temperature exceeds the maximum junction temperature of the device.
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6.6 Typical Characteristics
Figure 1. Current Limit vs Temperature
Figure 2. FB Pin Voltage vs Temperature
Figure 3. Oscillator Frequency vs Temperature - "X"
Figure 4. Oscillator Frequency vs Temperature - "Y"
Figure 5. Typical Maximum Output Current vs VIN
Figure 6. RDSON vs Temperature
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Typical Characteristics (continued)
VO = 20 V
VO = 20 V
Figure 7. LM2735X Efficiency vs Load Current
VO = 12 V
8
Figure 8. LM2735Y Efficiency vs Load Current
VO = 12 V
Figure 9. LM2735X Efficiency vs Load Current
Figure 10. LM2735Y Efficiency vs Load Current
Figure 11. Output Voltage Load Regulation
Figure 12. Output Voltage Line Regulation
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7 Detailed Description
7.1 Overview
The LM2735 device is highly efficient and easy-to-use switching regulator for boost and SEPIC applications. The
device provides regulated DC output with fast transient response. Device architecture (current mode control) and
internal compensation enable solutions with minimum number of external components. Additionally high
switching frequency allows for use of small external passive components (chip capacitors, SMD inductors) and
enables power solutions with very small PCB area. LM2735 also provides features such as soft start, pulse-bypulse current-limit, and thermal shutdown.
7.1.1 Theory of Operation
The LM2735 is a constant-frequency PWM boost regulator IC that delivers a minimum of 2.1 A peak switch
current. The regulator has a preset switching frequency of either 520 kHz or 1.6 MHz. This high frequency allows
the device to operate with small surface mount capacitors and inductors, resulting in a DC-DC converter that
requires a minimum amount of board space. The LM2735 is internally compensated, so it is simple to use, and
requires few external components. The device uses current-mode control to regulate the output voltage. The
following operating description of the LM2735 refers to the simplified internal block diagram (Functional Block
Diagram), the simplified schematic (Figure 13), and its associated waveforms (Figure 14). The LM2735 supplies
a regulated output voltage by switching the internal NMOS control switch at constant frequency and variable duty
cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator. When
this pulse goes low, the output control logic turns on the internal NMOS control switch. During this on-time, the
SW pin voltage (VSW) decreases to approximately GND, and the inductor current (IL) increases with a linear
slope. IL is measured by the current sense amplifier, which generates an output proportional to the switch
current. The sensed signal is summed with the corrective ramp of the regulator and compared to the error
amplifier’s output, which is proportional to the difference between the feedback voltage and VREF. When the
PWM comparator output goes high, the output switch turns off until the next switching cycle begins. During the
switch off-time, inductor current discharges through diode D1, which forces the SW pin to swing to the output
voltage plus the forward voltage (VD) of the diode. The regulator loop adjusts the duty cycle (D) to maintain a
constant output voltage .
I L (t)
+
VL (t)
-
D1
L1
I C (t)
Control
+
VIN
+
Q1
VSW( t )
C1
VO(t)
-
Figure 13. Simplified Schematic
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Overview (continued)
VO + VD
Vsw (t)
t
VIN
VL(t)
t
VIN - VOUT - VD
I L (t)
iL
t
I DIODE (t)
t
( iL
- - i OUT
)
I Capacitor (t)
t
- i OUT
'v
VOUT (t)
DTS
TS
Figure 14. Typical Waveforms
10
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7.2 Functional Block Diagram
EN
VIN
ThermalSHDN
Control Logic
+
UVLO = 2.3V
Oscillator
Corrective - Ramp
SW
cv
S
R
R
Q
1.6 MHz
+
+
-
FB
VREF = 1.255V
NMOS
Internal
Compensation
ILIMIT
Soft-Start
ISENSE-AMP
+
-
GND
7.3 Feature Description
7.3.1 Current Limit
The LM2735 uses cycle-by-cycle current limiting to protect the internal NMOS switch. It is important to note that
this current limit will not protect the output from excessive current during an output short circuit. The input supply
is connected to the output by the series connection of an inductor and a diode. If a short circuit is placed on the
output, excessive current can damage both the inductor and diode.
7.3.2 Thermal Shutdown
Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature
exceeds 160°C. After thermal shutdown occurs, the output switch does not turn on until the junction temperature
drops to approximately 150°C.
7.3.3 Soft Start
This function forces VOUT to increase at a controlled rate during start-up. During soft start, the reference voltage
of the error amplifier ramps to its nominal value of 1.255 V in approximately 4 ms. This forces the regulator
output to ramp up in a more linear and controlled fashion, which helps reduce inrush current.
7.3.4 Compensation
The LM2735 uses constant-frequency peak current mode control. This mode of control allows for a simple
external compensation scheme that can be optimized for each application. A complicated mathematical analysis
can be completed to fully explain the internal and external compensation of the LM2735, but for simplicity, a
graphical approach with simple equations will be used. Below is a Gain and Phase plot of a LM2735 that
produces a 12-V output from a 5-V input voltage. The Bode plot shows the total loop Gain and Phase without
external compensation.
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Feature Description (continued)
80
180
gm-Pole
60
RC-Pole
90
40
dB
20
0
-20
Vi = 5V
Vo = 12V
Io = 500 mA
Co = 10 PF
Lo = 5 PH
0
gm-Zero
-90
-40
RHP-Zero
-60
-80
10
100
1k
10k
100k
-180
1M
FREQUENCY
Figure 15. LM2735 Without External Compensation
One can see that the crossover frequency is fine, but the phase margin at 0 dB is very low (22°). A zero can be
placed just above the crossover frequency so that the phase margin will be bumped up to a minimum of 45°.
Below is the same application with a zero added at 8 kHz.
80
gm-Pole
60
RC-Pole
40
Vi = 5V
Vo = 12V
Io = 500 mA
Co = 10 mF
Lo = 5 mH
180
90
D = 0.625
Cf = 220 pF
gm-zero
0
0 Fz-cf = 8 kHz
RHP-Zero = 107 kHz
-20 Fp-cf = 77 kHz
Fp-rc = 660 Hz
-90
-40
Ext (Cf)
-Zero
-60
Ext (Cf)-Pole
RHP-Zero
-180
-80
10
100
1k
10k
100k
1M
dB
20
FREQUENCY
Figure 16. LM2735 With External Compensation
The simplest method to determine the compensation component value is as follows.
Set the output voltage with the following equation.
§ VOUT ·
- 1¸¸ x R1
R 2 = ¨¨
© VREF ¹
where
•
R1 is the bottom resistor and R2 is the resistor tied to the output voltage.
(1)
The next step is to calculate the value of C3. The internal compensation has been designed so that when a zero
is added from 5 kHz to 10 kHz, the converter will have good transient response with plenty of phase margin for
all input and output voltage combinations.
1
FZERO - CF =
= 5 kHz o 10 kHz
2S(R2 x Cf)
(2)
12
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Feature Description (continued)
Lower output voltages will have the zero set closer to 10 kHz, and higher output voltages will usually have the
zero set closer to 5 kHz. TI recommends obtaining a Gain and Phase plot for your actual application. See
Application and Implementation to obtain examples of working applications and the associated component
values.
Pole at origin due to internal GM amplifier:
FP-ORIGIN
(3)
Pole due to output load and capacitor:
1
FP- RC =
2S(R Load COUT)
(4)
This equation only determines the frequency of the pole for perfect current mode control (CMC). That is, it
doesn’t take into account the additional internal artificial ramp that is added to the current signal for stability
reasons. By adding artificial ramp, you begin to move away from CMC to voltage mode control (VMC). The
artifact is that the pole due to the output load and output capacitor will actually be slightly higher in frequency
than calculated. In this example, it is calculated at 650 Hz, but in reality, it is around 1 kHz.
The zero created with capacitor C3 & resistor R2:
VO
R2
C3
VFB
R LOAD
R1
Figure 17. Setting External Pole-Zero
FZERO - CF =
1
2S(R2 x C3)
(5)
There is an associated pole with the zero that was created in the above equation.
FPOLE - CF =
1
2S((R1 R2) x C3)
(6)
It is always higher in frequency than the zero.
A right-half plane zero (RHPZ) is inherent to all boost converters. One must remember that the gain associated
with a right-half plane zero increases at 20 dB per decade, but the phase decreases by 45° per decade. For
most applications there is little concern with the RHPZ due to the fact that the frequency at which it shows up is
well beyond crossover, and has little to no effect on loop stability. One must be concerned with this condition for
large inductor values and high output currents.
2
RHPZERO =
(D') RLoad
2S x L
(7)
There are miscellaneous poles and zeros associated with parasitics internal to the LM2735, external
components, and the PCB. They are located well over the crossover frequency, and for simplicity are not
discussed.
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7.4 Device Functional Modes
7.4.1 Enable Pin and Shutdown Mode
The LM2735 has a shutdown mode that is controlled by the Enable pin (EN). When a logic low voltage is applied
to EN, the part is in shutdown mode and its quiescent current drops to typically 80 nA. Switch leakage adds up to
another 1 µA from the input supply. The voltage at this pin should never exceed VIN + 0.3 V.
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The device will operate with input voltage in the range of 2.7 V to 5.5 V and provide regulated output voltage.
This device is optimized for high-efficiency operation with minimum number of external components. For
component selection, see Detailed Design Procedure.
8.2 Typical Applications
8.2.1 LM2735X SOT-23 Design Example 1
L1
4
R3
EN
3
FB
2
GND
VIN
5
Vin
12V
1
SW
D1
C1
R2
C2
C3
R LOAD
R1
Figure 18. LM2735X (1.6 MHz): VIN = 5 V, VOUT = 12 V @ 350 mA
8.2.1.1 Design Requirements
The device must be able to operate at any voltage within input voltage range.
The load current needs to be defined in order to properly size the inductor, input capacitor, and output capacitor.
The inductor must be able to handle full expected load current as well as the peak current generated during load
transients and start-up. The inrush current at startup will depend on the output capacitor selection. More details
are provided in Detailed Design Procedure.
The device has an enable pin (EN) that is used to enable and disable the device. This pin is active high and care
should be taken that voltage on this pin does not exceed VIN + 0.3 V.
14
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Typical Applications (continued)
8.2.1.2 Detailed Design Procedure
Table 1. Bill of Materials
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
2.1-A Boost Regulator
TI
LM2735XMF
C1, Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C3 Comp Capacitor
330 pF
TDK
C1608X5R1H331K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
15 µH 1.5 A
Coilcraft
MSS5131-153ML
R1
10.2 kΩ, 1%
Vishay
CRCW06031022F
R2
86.6 kΩ, 1%
Vishay
CRCW06038662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
8.2.1.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the LM2735 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
8.2.1.2.2 Inductor Selection
The duty cycle (D) can be approximated quickly using the ratio of output voltage (VO) to input voltage (VIN):
VOUT § 1 · 1
=
=
VIN ¨©1 - D¸¹ Dc
(8)
Therefore:
D=
VOUT - VIN
VOUT
(9)
Power losses due to the diode (D1) forward voltage drop, the voltage drop across the internal NMOS switch, the
voltage drop across the inductor resistance (RDCR), and switching losses must be included to calculate a more
accurate duty cycle (see Calculating Efficiency, and Junction Temperature for a detailed explanation). A more
accurate formula for calculating the conversion ratio is:
VOUT
K
= c
D
VIN
where
•
η equals the efficiency of the LM2735 application.
(10)
The inductor value determines the input ripple current. Lower inductor values decrease the size of the inductor,
but increase the input ripple current. An increase in the inductor value will decrease the input ripple current.
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'i L
I L (t)
iL
VIN - VOUT
VIN
L
L
DTS
TS
t
Figure 19. Inductor Current
2'iL § VIN ·
=¨
¸
DTS © L ¹
§ VIN ·
¸¸ x DTS
ÂiL = ¨¨
© 2L ¹
(11)
A good design practice is to design the inductor to produce 10% to 30% ripple of maximum load. From the
previous equations, the inductor value is then obtained.
§ VIN ·
¸ x DTS
L =¨
©2 x 'iL¹
where
•
1/TS = FSW = switching frequency
(12)
Ensure that the minimum current limit (2.1 A) is not exceeded, so the peak current in the inductor must be
calculated. The peak current (ILPK ) in the inductor is calculated by:
ILpk = IIN + ΔIL
(13)
ILpk = IOUT / D' + ΔIL
(14)
or
When selecting an inductor, make sure that it is capable of supporting the peak input current without saturating.
Inductor saturation will result in a sudden reduction in inductance and prevent the regulator from operating
correctly. Because of the speed of the internal current limit, the peak current of the inductor need only be
specified for the required maximum input current. For example, if the designed maximum input current is 1.5 A
and the peak current is 1.75 A, then the inductor should be specified with a saturation current limit of >1.75 A.
There is no need to specify the saturation or peak current of the inductor at the 3-A typical switch current-limit.
Because of the operating frequency of the LM2735, ferrite based inductors are preferred to minimize core losses.
This presents little restriction since the variety of ferrite-based inductors is huge. Lastly, inductors with lower
series resistance (DCR) will provide better operating efficiency. For recommended inductors, see the following
design examples.
8.2.1.2.3 Input Capacitor
An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The
primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent
Series Inductance). The recommended input capacitance is 10 µF to 44 µF depending on the application. The
capacitor manufacturer specifically states the input voltage rating. Make sure to check any recommended
deratings and also verify if there is any significant change in capacitance at the operating input voltage and the
operating temperature. The ESL of an input capacitor is usually determined by the effective cross sectional area
of the current path. At the operating frequencies of the LM2735, certain capacitors may have an ESL so large
that the resulting impedance (2πfL) will be higher than that required to provide stable operation. As a result,
surface mount capacitors are strongly recommended. Multilayer ceramic capacitors (MLCC) are good choices for
both input and output capacitors and have very low ESL. For MLCCs, TI recommends using X7R or X5R
dielectrics. Consult capacitor manufacturer datasheet to see how rated capacitance varies over operating
conditions.
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8.2.1.2.4 Output Capacitor
The LM2735 operates at frequencies allowing the use of ceramic output capacitors without compromising
transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple.
The output capacitor is selected based upon the desired output ripple and transient response. The initial current
of a load transient is provided mainly by the output capacitor. The output impedance will therefore determine the
maximum voltage perturbation. The output ripple of the converter is a function of the reactance of the capacitor
and its equivalent series resistance (ESR):
§
·
VOUT x D
¸
ÂVOUT = ÂIL x R ESR + ¨¨
¸
2
x
F
x
R
x
C
SW
Load
OUT ¹
©
(15)
When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the
output ripple will be approximately sinusoidal and 90° phase shifted from the switching action.
Given the availability and quality of MLCCs and the expected output voltage of designs using the LM2735, there
is really no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability
to bypass high-frequency noise. A certain amount of switching edge noise will couple through parasitic
capacitances in the inductor to the output. A ceramic capacitor will bypass this noise while a tantalum will not.
Since the output capacitor is one of the two external components that control the stability of the regulator control
loop, most applications will require a minimum at 4.7 µF of output capacitance. Like the input capacitor,
recommended multilayer ceramic capacitors are X7R or X5R. Again, verify actual capacitance at the desired
operating voltage and temperature.
8.2.1.2.5 Setting the Output Voltage
The output voltage is set using the following equation where R1 is connected between the FB pin and GND, and
R2 is connected between VOUT and the FB pin.
VO
R2
C3
VFB
R LOAD
R1
Figure 20. Setting Vout
A good value for R1 is 10 kΩ.
§ VOUT ·
- 1¸¸ x R1
R 2 = ¨¨
© VREF ¹
(16)
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8.2.1.3 Application Curves
Vin = 3.3 V
Vout = 12 V
Vin = 5 V
Figure 21. LM2735X Typical Startup Waveform
Vout = 12 V
Figure 22. LM2735X Typical Startup Waveform
8.2.2 LM2735Y SOT-23 Design Example 2
L1
3
4
FB
EN
R3
2
GND
VIN
12V
1
5
SW
Vin
D1
C1
R2
C2
C3
R LOAD
R1
Figure 23. LM2735Y (520 kHz): VIN = 5 V, VOUT = 12 V at 350 mA
18
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735YMF
C1, Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C3 Comp Capacitor
330 pF
TDK
C1608X5R1H331K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
33 µH 1.5 A
Coilcraft
DS3316P-333ML
R1
10.2 kΩ, 1%
Vishay
CRCW06031022F
R2
86.6 kΩ, 1%
Vishay
CRCW06038662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.3 LM2735X WSON Design Example 3
VIN
L1
LM2735
R3
C1
C2
D1
1
6
2
5
R2
C5
RLOAD
3
C3
4
C4
R1
Figure 24. LM2735X (1.6 MHz): VIN = 3.3 V, VOUT = 12 V at 350 mA
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735XSD
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
TDK
C3216X5R1E106M
TDK
C1608X5R1H331K
C2 Input Capacitor
No Load
C3 Output Capacitor
10 µF, 25 V, X5R
C4 Output Capacitor
No Load
C5 Comp Capacitor
330 pF
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
6.8 µH 2 A
Coilcraft
DO1813H-682ML
R1
10.2 kΩ, 1%
Vishay
CRCW06031022F
R2
86.6 kΩ, 1%
Vishay
CRCW06038662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.4 LM2735Y WSON Design Example 4
VIN
L1
LM2735
R3
C1
C2
D1
1
6
2
5
R2
C5
RLOAD
3
C3
4
C4
R1
Figure 25. LM2735Y (520 kHz): VIN = 3.3 V, VOUT = 12 V at 350 mA
20
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735YSD
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
TDK
C3216X5R1E106M
TDK
C1608X5R1H331K
C2 Input Capacitor
No Load
C3 Output Capacitor
10 µF, 25 V, X5R
C4 Output Capacitor
No Load
C5 Comp Capacitor
330 pF
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
15 µH 2 A
Coilcraft
MSS5131-153ML
R1
10.2 kΩ, 1%
Vishay
CRCW06031022F
R2
86.6 kΩ, 1%
Vishay
CRCW06038662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.5 LM2735Y MSOP-PowerPAD Design Example 5
VIN
L1
D1
R3
LM2735
C1
C2
1 NC
NC 8
2 PGND
SW 7
3 VIN
R2
C5
AGND 6
4 EN
R LOAD
FB 5
C4
C3
R1
Figure 26. LM2735Y (520 kHz): VIN = 3.3 V, VOUT = 12 V at 350 mA
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
2.1-A Boost Regulator
TI
LM2735YMY
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Input Capacitor
No Load
C3 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C4 Output Capacitor
No Load
C5 Comp Capacitor
330 pF
TDK
C1608X5R1H331K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
15 µH 1.5 A
Coilcraft
MSS5131-153ML
R1
10.2 kΩ, 1%
Vishay
CRCW06031022F
R2
86.6 kΩ, 1%
Vishay
CRCW06038662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.6 LM2735X SOT-23 Design Example 6
L1
3
4
FB
SHDN
R3
2
GND
VIN
5V
1
5
SW
Vin
D1
C1
R2
C2
C3
R LOAD
R1
Figure 27. LM2735X (1.6 MHz): VIN = 3 V, VOUT = 5 V at 500 mA
22
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
LM2735XMF
C1, Input Capacitor
10 µF, 6.3 V, X5R
TDK
C2012X5R0J106K
C2, Output Capacitor
10 µF, 6.3 V, X5R
TDK
C2012X5R0J106K
C3 Comp Capacitor
1000 pF
TDK
C1608X5R1H102K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
10 µH 1.2 A
Coilcraft
DO1608C-103ML
R1
10.0 kΩ, 1%
Vishay
CRCW08051002F
R2
30.1 kΩ, 1%
Vishay
CRCW08053012F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.7 LM2735Y SOT-23 Design Example 7
L1
3
4
R3
FB
SHDN
2
GND
VIN
5V
1
5
SW
Vin
D1
C1
R2
C2
C3
R LOAD
R1
Figure 28. LM2735Y (520 kHz): VIN = 3 V, VOUT = 5 V at 750 mA
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735YMF
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Output Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C3 Comp Capacitor
1000 pF
TDK
C1608X5R1H102K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
22 µH 1.2 A
Coilcraft
MSS5131-223ML
R1
10.0 kΩ, 1%
Vishay
CRCW08051002F
R2
30.1 kΩ, 1%
Vishay
CRCW08053012F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.8 LM2735X SOT-23 Design Example 8
L1
3
4
R3
FB
SHDN
2
GND
VIN
20V
1
5
SW
Vin
D1
C1
R2
C2
C3
R LOAD
R1
Figure 29. LM2735X (1.6 MHz): VIN = 3.3 V, Vout = 20 V at 100 mA
24
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
LM2735XMF
C1, Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2, Output Capacitor
4.7 µF, 25 V, X5R
TDK
C3216X5R1E475K
C3 Comp Capacitor
470 pF
TDK
C1608X5R1H471K
D1, Catch Diode
0.4 Vf Schottky 500 mA, 30 VR
Vishay
MBR0530
L1
10 µH 1.2 A
Coilcraft
DO1608C-103ML
R1
10.0 kΩ, 1%
Vishay
CRCW06031002F
R2
150 kΩ, 1%
Vishay
CRCW06031503F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.9 LM2735Y SOT-23 Design Example 9
L1
3
4
R3
FB
SHDN
2
GND
VIN
20V
1
5
SW
Vin
D1
C1
C3
R2
C2
R LOAD
R1
Figure 30. LM2735Y (520 kHz): VIN = 3.3 V, VOUT = 20 V at 100 mA
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735YMF
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C3 Comp Capacitor
470 pF
TDK
C1608X5R1H471K
D1, Catch Diode
0.4 Vf Schottky 500 mA, 30 VR
Vishay
MBR0530
L1
33 µH 1.5 A
Coilcraft
DS3316P-333ML
R1
10.0 kΩ, 1%
Vishay
CRCW06031002F
R2
150.0 kΩ, 1%
Vishay
CRCW06031503F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.10 LM2735X WSON Design Example 10
VIN
L1
LM2735
R3
C1
C2
D1
1
6
2
5
R2
C5
RLOAD
3
C3
4
C4
R1
Figure 31. LM2735X (1.6 MHz): VIN = 3.3 V, VOUT = 20 V at 150 mA
26
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735XSD
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C3 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C4 Output Capacitor
No Load
C5 Comp Capacitor
470 pF
TDK
C1608X5R1H471K
D1, Catch Diode
0.4 Vf Schottky 500 mA, 30 VR
Vishay
MBR0530
L1
8.2 µH 2 A
Coilcraft
DO1813H-822ML
R1
10.0 kΩ, 1%
Vishay
CRCW06031002F
R2
150 kΩ, 1%
Vishay
CRCW06031503F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.11 LM2735Y WSON Design Example 11
VIN
L1
LM2735
R3
C1
C2
D1
1
6
2
5
R2
C5
RLOAD
3
C3
4
C4
R1
Figure 32. LM2735Y (520 kHz): VIN = 3.3 V, VOUT = 20 V at 150 mA
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735YSD
C1 Input Capacitor
10 µF, 6.3 V, X5R
TDK
C2012X5R0J106K
C2 Input Capacitor
10 µF, 6.3 V, X5R
TDK
C2012X5R0J106K
C3 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C4 Output Capacitor
No Load
C5 Comp Capacitor
470 pF
TDK
C1608X5R1H471K
D1, Catch Diode
0.4 Vf Schottky 500 mA, 30 VR
Vishay
MBR0530
L1
22 µH 1.5 A
Coilcraft
DS3316P-223ML
R1
10.0 kΩ, 1%
Vishay
CRCW06031002F
R2
150 kΩ, 1%
Vishay
CRCW06031503F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.12 LM2735X WSON SEPIC Design Example 12
VIN
VO
L1
D1
C6
LM2735
C1
C2
1
6
2
5
3
4
L2
R2
R3
C5
C3
C4
R1
Figure 33. LM2735X (1.6 MHz): VIN = 2.7 V - 5 V, VOUT = 3.3 V at 500 mA
28
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
LM2735XSD
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
TDK
C3216X5R1E106M
C2 Input Capacitor
No Load
C3 Output Capacitor
10 µF, 25 V, X5R
C4 Output Capacitor
No Load
PART NUMBER
C5 Comp Capacitor
2200 pF
TDK
C1608X5R1H222K
C6
2.2 µF 16 V
TDK
C2012X5R1C225K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
6.8 µH
Coilcraft
DO1608C-682ML
L2
6.8 µH
Coilcraft
DO1608C-682ML
R1
10.2 kΩ, 1%
Vishay
CRCW06031002F
R2
16.5 kΩ, 1%
Vishay
CRCW06031652F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.13 LM2735Y MSOP-PowerPAD SEPIC Design Example 13
VIN
L1
D1
C6
R3
LM2735
C1
C2
1 NC
NC 8
2 PGND
SW 7
3 VIN
R2
L2
C5
AGND 6
4 EN
R LOAD
FB 5
C4
C3
R1
Figure 34. LM2735Y (520 kHz): VIN = 2.7 V - 5 V, VOUT = 3.3 V at 500 mA
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
2.1-A Boost Regulator
TI
LM2735YMY
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Input Capacitor
No Load
C3 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C4 Output Capacitor
No Load
C5 Comp Capacitor
2200 pF
TDK
C1608X5R1H222K
C2012X5R1C225K
C6
2.2 µF 16 V
TDK
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
15 µH 1.5 A
Coilcraft
MSS5131-153ML
L2
15 µH 1.5 A
Coilcraft
MSS5131-153ML
R1
10.2 kΩ, 1%
Vishay
CRCW06031002F
R2
16.5 kΩ, 1%
Vishay
CRCW06031652F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.14 LM2735X SOT-23 LED Design Example 14
L1
R3
3
FB
2
4
SHDN
Vin
C2
D1
1
SW
5
Vin
C1
R1
R2
DIM - CTRL
Figure 35. LM2735X (1.6 MHz): VIN = 2.7 V - 5 V, VOUT = 20 V at 50 mA
30
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
2.1-A Boost Regulator
TI
LM2735XMF
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Output Capacitor
4.7 µF, 25 V, X5R
TDK
C3216JB1E475K
D1, Catch Diode
0.4 Vf Schottky 500 mA, 30 VR
Vishay
MBR0530
L1
15 µH 1.5 A
Coilcraft
MSS5131-153ML
R1
25.5 Ω, 1%
Vishay
CRCW080525R5F
R2
100 Ω, 1%
Vishay
CRCW08051000F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.15 LM2735Y WSON FlyBack Design Example 15
+ 12V
D1
R2
Cf
T1
V IN
C2
R LOAD
R1
LM2735
R3
1
C3
6
R LOAD
C1
2
5
3
4
D2
- 12V
Figure 36. LM2735Y (520 kHz): VIN = 5 V, VOUT = ±12 V 150 mA
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
PART NUMBER
LM2735YSD
C1 Input Capacitor
22 µF, 6.3 V, X5R
TDK
C2012X5R0J226M
C2 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C3 Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
Cf Comp Capacitor
330 pF
TDK
C1608X5R1H331K
D1, D2 Catch Diode
0.4 Vf Schottky 500 mA, 30 VR
Vishay
MBR0530
R1
10.0 kΩ, 1%
Vishay
CRCW06031002F
R2
86.6 kΩ, 1%
Vishay
CRCW06038662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
T1
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8.2.16 LM2735X SOT-23 LED Design Example 16 VRAIL > 5.5 V Application
D1
L1
VPWR
R4
4
R3
C4
3
2
5
D2
R2
LM2735
EN
C1
C2
1
R1
C3
Figure 37. LM2735X (1.6 MHz): VPWR = 9 V, VOUT = 12 V at 500 mA
32
PART ID
PART VALUE
MANUFACTURER
U1
2.1-A Boost Regulator
TI
LM2735XMF
C1, Input Capacitor
10 µF, 6.3 V, X5R
TDK
C2012X5R0J106K
C2, Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C3 VIN Cap
0.1 µF, 6.3 V, X5R
TDK
C2012X5R0J104K
C4 Comp Capacitor
1000 pF
TDK
C1608X5R1H102K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
D2
3.3-V Zener, SOT-23
Diodes Inc
BZX84C3V3
L1
6.8 µH 2 A
Coilcraft
DO1813H-682ML
R1
10.0 kΩ, 1%
Vishay
CRCW08051002F
R2
86.6 kΩ, 1%
Vishay
CRCW08058662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
R4
499 Ω, 1%
Vishay
CRCW06034991F
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8.2.17 LM2735X SOT-23 LED Design Example 17 Two-Input Voltage Rail Application
D1
L1
VPWR
LM2735
EN
C1
4
R3
R2
3
2
VIN
5
C4
R1
1
C2
C3
Figure 38. LM2735X (1.6 MHz): VPWR = 9 V in = 2.7 V - 5.5 V, VOUT = 12 V at 500 mA
PART ID
PART VALUE
MANUFACTURER
PART NUMBER
U1
2.1-A Boost Regulator
TI
LM2735XMF
C1, Input Capacitor
10 µF, 6.3 V, X5R
TDK
C2012X5R0J106K
C2, Output Capacitor
10 µF, 25 V, X5R
TDK
C3216X5R1E106M
C3 VIN Capacitor
0.1 µF, 6.3 V, X5R
TDK
C2012X5R0J104K
C4 Comp Capacitor
1000 pF
TDK
C1608X5R1H102K
D1, Catch Diode
0.4 Vf Schottky 1 A, 20 VR
ST
STPS120M
L1
6.8 µH 2 A
Coilcraft
DO1813H-682ML
R1
10.0 kΩ, 1%
Vishay
CRCW08051002F
R2
86.6 kΩ, 1%
Vishay
CRCW08058662F
R3
100 kΩ, 1%
Vishay
CRCW06031003F
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8.2.18 SEPIC Converter
VIN
VO
L1
C6
D1
LM2735
C1
C2
1
6
2
5
3
4
L2
R3
R2
C5
C3
C4
R1
Figure 39. SEPIC Converter Schematic
8.2.18.1 Detailed Design Procedure
The LM2735 can easily be converted into a SEPIC converter. A SEPIC converter has the ability to regulate an
output voltage that is either larger or smaller in magnitude than the input voltage. Other converters have this
ability as well (CUK and Buck-Boost), but usually create an output voltage that is opposite in polarity to the input
voltage. This topology is a perfect fit for Lithium Ion battery applications where the input voltage for a single-cell
Li-Ion battery will vary from 3 V to 4.5 V and the output voltage is somewhere in-between. Most of the analysis of
the LM2735 Boost Converter is applicable to the LM2735 SEPIC Converter.
8.2.18.1.1 SEPIC Design Guide
SEPIC Conversion ratio without loss elements:
Vo
D
=
D'
VIN
(17)
Therefore:
D=
VO
VO + VIN
(18)
8.2.18.1.2 Small Ripple Approximation
In a well-designed SEPIC converter, the output voltage, input voltage ripple, and inductor ripple is small in
comparison to the DC magnitude. Therefore, it is a safe approximation to assume a DC value for these
components. The main objective of the Steady State Analysis is to determine the steady state duty-cycle, voltage
and current stresses on all components, and proper values for all components.
In a steady-state converter, the net volt-seconds across an inductor after one cycle will equal zero. Also, the
charge into a capacitor will equal the charge out of a capacitor in one cycle.
Therefore:
I L2
§ D·
= ¨ ' ¸ x I L1
©D¹
and
IL1 =
34
§ D · x § VO ·
¨ D' ¸ ¨ R ¸
© ¹ © ¹
(19)
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Substituting IL1 into IL2
VO
IL2 =
R
(20)
The average inductor current of L2 is the average output load.
VL(t)
AREA 1
t (s)
AREA 2
DTS
TS
Figure 40. Inductor Volt-Sec Balance Waveform
Applying Charge balance on C1:
D' (Vo )
VC1 =
D
(21)
Since there are no DC voltages across either inductor, and capacitor C6 is connected to Vin through L1 at one
end, or to ground through L2 on the other end, we can say that
VC1 = VIN
(22)
Therefore:
VIN =
D' (Vo )
D
(23)
This verifies the original conversion ratio equation.
It is important to remember that the internal switch current is equal to IL1 and IL2. During the D interval. Design
the converter so that the minimum specified peak switch current limit (2.1 A) is not exceeded.
8.2.18.1.3 Steady State Analysis With Loss Elements
i L1( t )
i sw
iC1( t )
vC1( t )
+
i D1( t )
vD1( t )
i L 2( t )
VIN
i C2( t )
vL2( t )
+
-
+
R L1
vL1( t )
+
vC2( t )
vO( t )
-
+
R on
R L2
Using inductor volt-second balance & capacitor charge balance, the following equations are derived:
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I L2
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§ VO ·
=¨R¸
© ¹
and
IL1 =
§ VO · § D ·
¨ R ¸ x ¨ D' ¸
© ¹ © ¹
Vo §
=¨
VIN ¨©
(24)
§
·
¨
¸
¨
¸
1
D·¨
¸
¸
¸
D' ¹ ¨ §
VD R L2 · §¨ D ·¸ § R ON · §¨ D 2 ·¸ § R L1 · ¸
¸+
¨ ¨1+
+
¨
¸+
¸¸
¨
¨ ¨©
VO
R ¸¹ ¨© D' 2 ¸¹ © R ¹ ¨© D' 2 ¸¹ © R ¹ ¸
©
¹
(25)
Therefore:
§
·
¨
¸
¨
¸
1
¸
K= ¨
¨§
VD R L2 · §¨ D ·¸ § R ON · §¨ D 2 ·¸ § R L1 · ¸
¸+
¨ ¨1+
+
¸+
¨
¸¸
¨
¨ ¨©
VO
R ¸¹ ¨© D' 2 ¸¹ © R ¹ ¨© D' 2 ¸¹ © R ¹ ¸
©
¹
(26)
One can see that all variables are known except for the duty cycle (D). A quadratic equation is needed to solve
for D. A less accurate method of determining the duty cycle is to assume efficiency, and calculate the duty cycle.
VO
VIN
D=
§ D ·xK
¨1 - D¸
©
¹
(27)
VO
·
§
¨(V x K) +V ¸
O¹
© IN
(28)
=
Vin
Vo
Iin
Io
K
2.7V
3.1V
770 mA
500 mA
75%
Vin
Vo
Iin
Io
K
3.3V
3.1V
600 mA
500 mA
80%
Vin
Vo
Iin
Io
K
5V
3.1V
375 mA
500 mA
83%
Figure 41. Efficiencies for Typical SEPIC Application
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9 Power Supply Recommendations
The LM2735 device is designed to operate from an input voltage supply range from 2.7 V to 5.5 V. This input
supply should be able to withstand the maximum input current and maintain a voltage above 2.7 V. In case
where input supply is located farther away (more than a few inches) from the device, additional bulk capacitance
may be required in addition to the ceramic bypass capacitors.
10 Layout
10.1 Layout Guidelines
When planning layout, there are a few things to consider when trying to achieve a clean, regulated output. The
most important consideration when completing a boost converter layout is the close coupling of the GND
connections of the COUT capacitor and the LM2735 PGND pin. The GND ends should be close to one another
and be connected to the GND plane with at least two through-holes. There should be a continuous ground plane
on the bottom layer of a two-layer board except under the switching node island. The FB pin is a high impedance
node and care should be taken to make the FB trace short to avoid noise pickup and inaccurate regulation. The
feedback resistors should be placed as close as possible to the IC, with the AGND of R1 placed as close as
possible to the GND (pin 5 for the WSON) of the IC. The VOUT trace to R2 should be routed away from the
inductor and any other traces that are switching. High AC currents flow through the VIN, SW and VOUT traces, so
they should be as short and wide as possible. However, making the traces wide increases radiated noise, so the
designer must make this trade-off. Radiated noise can be decreased by choosing a shielded inductor. The
remaining components should also be placed as close as possible to the IC. See Application Note AN-1229
SIMPLE SWITCHER® PCB Layout Guidelines (SNVA054) for further considerations and the LM2735 demo
board as an example of a 4-layer layout.
Below is an example of a good thermal and electrical PCB design. This is very similar to our LM2735
demonstration boards that are obtainable through the TI website. The demonstration board consists of a 2-layer
PCB with a common input and output voltage application. Most of the routing is on the top layer, with the bottom
layer consisting of a large ground plane. The placement of the external components satisfies the electrical
considerations, and the thermal performance has been improved by adding thermal vias and a top layer DogBone.
10.1.1 WSON Package
The LM2735 packaged in the 6–pin WSON:
Figure 42. Internal WSON Connection
For certain high power applications, the PCB land may be modified to a dog bone shape (see Figure 43).
Increasing the size of ground plane, and adding thermal vias can reduce the RθJA for the application.
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Layout Guidelines (continued)
COPPER
PGND 1
6
SW
Vin
2
5
AGND
EN
3
4
FB
COPPER
Figure 43. PCB Dog Bone Layout
10.2 Layout Examples
CIN
PCB
VIN
PGND
L1
FB
4
EN
3
AGND
VIN
5
2
PGND
SW 6
1
CIN
COUT
D1
VO
Figure 44. Example of Proper PCB Layout
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Layout Examples (continued)
The layout guidelines described for the LM2735 Boost-Converter are applicable to the SEPIC Converter.
Figure 45 shows a proper PCB layout for a SEPIC Converter.
CIN
PCB
VIN
PGND
L1
FB
4
EN
3
AGND
VIN
5
2
PGND
SW 6
1
CIN
COUT
D1
VO
C6
L2
Figure 45. SEPIC PCB Layout
10.3 Thermal Considerations
When designing for thermal performance, one must consider many variables:
• Ambient Temperature: The surrounding maximum air temperature is fairly explanatory. As the temperature
increases, the junction temperature will increase. This may not be linear though. As the surrounding air
temperature increases, resistances of semiconductors, wires and traces increase. This will decrease the
efficiency of the application, and more power will be converted into heat, and will increase the silicon junction
temperatures further.
• Forced Airflow: Forced air can drastically reduce the device junction temperature. Air flow reduces the hot
spots within a design. Warm airflow is often much better than a lower ambient temperature with no airflow.
• External Components: Choose components that are efficient, and you can reduce the mutual heating
between devices.
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Thermal Considerations (continued)
10.3.1 Definitions
Heat energy is transferred from regions of high temperature to regions of low temperature through three basic
mechanisms: radiation, conduction and convection.
Radiation
Electromagnetic transfer of heat between masses at different temperatures.
Conduction Transfer of heat through a solid medium.
Convection Transfer of heat through the medium of a fluid; typically air.
Conduction & Convection will be the dominant heat transfer mechanism in most applications.
RθJC
Thermal impedance from silicon junction to device case temperature.
RθJA
Thermal impedance from silicon junction to ambient air temperature.
CθJC
Thermal Delay from silicon junction to device case temperature.
CθCA
Thermal Delay from device case to ambient air temperature.
RθJA & RθJC These two symbols represent thermal impedances, and most data sheets contain associated
values for these two symbols. The units of measurement are °C/Watt.
RθJAis the sum of smaller thermal impedances (see Figure 46). The capacitors represent delays that are present
from the time that power and its associated heat is increased or decreased from steady state in one medium until
the time that the heat increase or decrease reaches steady state on the another medium.
RTC - A
C TC - A
TA
TC
R TJ- CASE
C TJ- CASE
TJ
Internal - P DISS
Figure 46. Simplified Thermal Impedance Model
The datasheet values for these symbols are given so that one might compare the thermal performance of one
package against another. In order to achieve a comparison between packages, all other variables must be held
constant in the comparison (PCB size, copper weight, thermal vias, power dissipation, VIN, VOUT, Load Current,
and so forth). This does shed light on the package performance, but it would be a mistake to use these values to
calculate the actual junction temperature in your application.
TJ - TA
R TJA =
PDissipation
(29)
We will talk more about calculating the variables of this equation later, and how to eventually calculate a proper
junction temperature with relative certainty. For now we need to define the process of calculating the junction
temperature and clarify some common misconceptions.
40
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Thermal Considerations (continued)
RθJA [Variables]:
• Input voltage, output voltage, output current, RDSon.
• Ambient temperature and air flow.
• Internal and external components power dissipation.
• Package thermal limitations.
• PCB variables (copper weight, thermal vias, layers component placement).
It is incorrect to assume that the top case temperature is the proper temperature when calculating RθJC value.
The RθJC value represents the thermal impedance of all six sides of a package, not just the top side. This
document refers to a thermal impedance called RψJC. RψJC represents a thermal impedance associated with just
the top case temperature. This allows the user to calculate the junction temperature with a thermal sensor
connected to the top case.
10.3.2 PCB Design With Thermal Performance in Mind
The PCB design is a very important step in the thermal design procedure. The LM2735 is available in three
package options (5-pin SOT-23, 8-pin MSOP-PowerPAD, and 6-pin WSON). The options are electrically the
same, but difference between the packages is size and thermal performance. The WSON and MSOP-PowerPAD
have thermal Die Attach Pads (DAP) attached to the bottom of the packages, and are therefore capable of
dissipating more heat than the SOT-23 package. It is important that the correct package for the application is
chosen. A detailed thermal design procedure has been included in this data sheet. This procedure will help
determine which package is correct, and common applications will be analyzed.
There is one significant thermal PCB layout design consideration that contradicts a proper electrical PCB layout
design consideration. This contradiction is the placement of external components that dissipate heat. The
greatest external heat contributor is the external Schottky diode. It would be ideal to be able to separate by
distance the LM2735 from the Schottky diode, and thereby reducing the mutual heating effect, however, this will
create electrical performance issues. It is important to keep the LM2735, the output capacitor, and Schottky
diode physically close to each other (see Figure 44). The electrical design considerations outweigh the thermal
considerations. Other factors that influence thermal performance are thermal vias, copper weight, and number of
board layers.
10.3.3 LM2735 Thermal Models
Heat is dissipated from the LM2735 and other devices. The external loss elements include the Schottky diode,
inductor, and loads. All loss elements will mutually increase the heat on the PCB, and therefore increase each
other’s temperatures.
L1
I L (t)
D1
VOUT (t)
VIN
Q1
C1
Figure 47. Thermal Schematic
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Thermal Considerations (continued)
RTCASE-AMB
TCASE
CTCASE-AMB
RTJ-CASE
CTJ-CASE
INTERNAL
PDISS
SMALL
LARGE
PDISS-TOP
TAMBIENT
PDISS-PCB
TJUNCTION
RTJ-PCB
CTJ-PCB
DEVICE
EXTERNAL
PDISS
RTPCB-AMB
TPCB
CTPCB-AMB
PCB
Figure 48. Associated Thermal Model
10.3.4 Calculating Efficiency, and Junction Temperature
The complete LM2735 DC-DC converter efficiency (η) can be calculated in the following manner.
POUT
K=
PIN
or
K=
POUT
POUT + PLOSS
(30)
Power loss (PLOSS) is the sum of two types of losses in the converter, switching and conduction. Conduction
losses usually dominate at higher output loads, where as switching losses remain relatively fixed and dominate at
lower output loads.
Losses in the LM2735 device:
PLOSS = PCOND + PSW + PQ
42
(31)
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Thermal Considerations (continued)
Conversion ratio of the boost converter with conduction loss elements inserted:
§
·
¨
¸
c
·
§
VOUT
1
¸
1 ¨ D x VD ¸ ¨
1
=
R DCR + (D x R DSON) ¸
VIN
Dc ¨©
VIN ¸¹ ¨
¨ 1+
¸
¨
¸
Dc 2R OUT
©
¹
(32)
If the loss elements are reduced to zero, the conversion ratio simplifies to:
VOUT
1
=
VIN
Dc
(33)
And this is known:
K
VOUT
=
VIN
Dc
(34)
Therefore:
K = Dc
VOUT
VIN
§
Dc x VD
·
1¨
¸
VIN
¨
¸
=¨
+ (D x R DSON) ¸
R
¨ 1 + DCR
¸
¨
¸
Dc 2R OUT
¹
©
(35)
Calculations for determining the most significant power losses are discussed below. Other losses totaling less
than 2% are not discussed.
A simple efficiency calculation that takes into account the conduction losses is shown below:
§
Dc x VD
·
1¨
¸
V
¨
¸
IN
K|¨
R DCR + (D x R DSON) ¸
¨ 1+
¸
¨
¸
Dc 2R OUT
¹
©
(36)
The diode, NMOS switch, and inductor DCR losses are included in this calculation. Setting any loss element to
zero will simplify the equation.
VD is the forward voltage drop across the Schottky diode. It can be obtained from the manufacturer’s Electrical
Characteristics section of the data sheet.
The conduction losses in the diode are calculated as follows:
PDIODE = VD × IO
(37)
Depending on the duty cycle, this can be the single most significant power loss in the circuit. Care should be
taken to choose a diode that has a low forward voltage drop. Another concern with diode selection is reverse
leakage current. Depending on the ambient temperature and the reverse voltage across the diode, the current
being drawn from the output to the NMOS switch during time D could be significant, this may increase losses
internal to the LM2735 and reduce the overall efficiency of the application. See the data sheets of the Schottky
diode manufacturer for reverse leakage specifications; and, typical applications within this data sheet for diode
selections.
Another significant external power loss is the conduction loss in the input inductor. The power loss within the
inductor can be simplified to:
PIND = IIN2RDCR
(38)
§I 2 R
·
PIND = ¨ O DCR ¸
¨ D' ¸
©
¹
(39)
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Thermal Considerations (continued)
The LM2735 conduction loss is mainly associated with the internal NFET:
PCOND-NFET = I2SW-rms × RDSON × D
(40)
'i
I
I sw(t)
t
Figure 49. LM2735 Switch Current
'i
IIND
Isw-rms = IIND D x 1 + 1
3
2
| IIND
D
PIND = IIN2 x RIND-DCR
(small ripple approximation)
PCOND-NFET = IIN2 × RDSON × D
(41)
(42)
2
§I ·
PCOND - NFET = ¨ O ¸ x RDSON x D
© D' ¹
(43)
The value for should be equal to the resistance at the junction temperature you wish to analyze. As an example,
at 125°C and VIN = 5 V, RDSON = 250 mΩ (see Typical Characteristics for value).
Switching losses are also associated with the internal NMOS switch. They occur during the switch on and off
transition periods, where voltages and currents overlap resulting in power loss.
The simplest means to determine this loss is to empirically measuring the rise and fall times (10% to 90%) of the
switch at the switch node:
PSWR = 1/2(VOUT × IIN × FSW × TRISE)
PSWF = 1/2(VOUT × IIN × FSW × TFALL)
PSW = PSWR + PSWF
(44)
(45)
(46)
Table 2. Typical Switch-Node Rise and Fall Times
VIN
VOUT
TRISE
TFALL
3V
5V
6 nS
4 nS
5V
12 V
6 nS
5 nS
3V
12 V
7 nS
5 nS
5V
18 V
7 nS
5 nS
Quiescent Power Losses:
IQ is the quiescent operating current, and is typically around 4 mA.
PQ = IQ x VIN
44
(47)
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10.3.4.1 Example Efficiency Calculation
Table 3. Operating Conditions
PARAMETER
VALUE
VIN
5V
VOUT
12 V
IOUT
500 mA
VD
0.4 V
FSW
1.60 MHz
IQ
4 mA
TRISE
6 nS
TFALL
5 nS
RDSon
250 mΩ
RDCR
50 mΩ
D
0.64
IIN
1.4 A
ΣPCOND + PSW + PDIODE + PIND + PQ = PLOSS
(48)
Quiescent Power Losses:
PQ = IQ × VIN = 20 mW
(49)
Switching Power Losses:
PSWR = 1/2(VOUT × IIN × FSW × TRISE) ≊ 6 ns ≊ 80 mW
PSWF = 1/2(VOUT × IIN × FSW × TFALL) ≊ 5 ns ≊ 70 mW
PSW = PSWR + PSWF = 150 mW
(50)
(51)
(52)
Internal NFET Power Losses:
RDSON = 250 mΩ
PCONDUCTION = IIN2 × D × RDSON × 305 mW
(53)
(54)
Diode Losses:
VD = 0.45 V
PDIODE = VD × IIN(1–D) = 236 mW
(55)
(56)
Inductor Power Losses:
RDCR = 75 mΩ
PIND = IIN2 × RDCR = 145 mW
(57)
(58)
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Total Power Losses are:
Table 4. Power Loss Tabulation
PARAMETER
VALUE
VIN
5V
PARAMETER
VOUT
12 V
IOUT
500 mA
POUT
6W
VD
0.4 V
PDIODE
236 mW
FSW
1.6 MHz
TRISE
6 nS
PSWR
80 mW
TFALL
5 nS
PSWF
70 mW
IQ
4 mA
PQ
20 mW
RDSon
250 mΩ
PCOND
305 mW
RDCR
75 mΩ
PIND
145 mW
D
0.623
η
86%
PLOSS
856 mW
PINTERNAL = PCOND + PSW = 475 mW
VALUE
(59)
10.3.5 Calculating RθJA and RΨJC
R TJA =
TJ - TA
PDissipation
and
R <JC =
TJ - TCASE
PDissipation
(60)
Now the internal power dissipation is known, and the junction temperature is attempted to be kept at or below
125°C. The next step is to calculate the value for RθJA and/or RψJC. This is actually very simple to accomplish,
and necessary if marginality is a possibility in regards to thermals or determining what package option is correct.
The LM2735 has a thermal shutdown comparator. When the silicon reaches a temperature of 160°C, the device
shuts down until the temperature reduces to 150°C. Knowing this, the RθJA or the RψJC of a specific application
can be calculated. Because the junction-to-top case thermal impedance is much lower than the thermal
impedance of junction to ambient air, the error in calculating RψJC is lower than for RθJA . However, a small
thermocouple will need to be attached onto the top case of the LM2735 to obtain the RψJC value.
Knowing the temperature of the silicon when the device shuts down allows three of the four variables to be
known. Once the thermal impedance is calculated, work backwards with the junction temperature set to 125°C to
determine what maximum ambient air temperature keeps the silicon below the 125°C temperature.
10.3.5.1 Procedure
Place the application into a thermal chamber. Sufficient power will need to be dissipated in the device so that a
good thermal impedance value may be obtained.
Raise the ambient air temperature until the device goes into thermal shutdown. Record the temperatures of the
ambient air and/or the top case temperature of the LM2735. Calculate the thermal impedances.
46
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10.3.5.2 Example From Previous Calculations
PDissipation = 475 mW
TA at Shutdown = 139°C
TCase-Top at Shutdown = 155°C
TJ - TA
TJ - TCase-Top
: R <JC =
R TJA =
PDissipation
PDissipation
(61)
RθJA WSON = 55°C/W
RψJC WSON = 21°C/W
WSON & MSOP-PowerPAD typical applications will produce RθJA numbers in the range of 50°C/W to 65°C/W,
and RψJC will vary from 18°C/W to 28°C/W. These values are for PCB’s with two and four layer boards with 0.5oz copper, and 4 to 6 thermal vias to bottom side ground plane under the DAP.
For 5-pin SOT-23 package typical applications, RθJA numbers will range from 80°C/W to 110°C/W, and RψJC will
vary from 50°C/W to 65°C/W. These values are for PCBs with 2- and 4-layer boards with 0.5-oz copper, with 2 to
4 thermal vias from GND pin to bottom layer.
The following is a good rule of thumb for typical thermal impedances, and an ambient temperature maximum of
75°C: if the design requires more than 400 mW internal to the LM2735 be dissipated, or there is 750 mW of total
power loss in the application, TI recommends using the 6-pin WSON or the 8-pin MSOP-PowerPAD package.
NOTE
To use these procedures, it is important to dissipate an amount of power within the device
that will indicate a true thermal impedance value. If a very small internal dissipated value
is used, it can be determined that the thermal impedance calculated is abnormally high,
and subject to error. The graph below shows the nonlinear relationship of internal power
dissipation vs RθJA.
500
450
400
350
RTJA
300
250
200
150
100
50
0
0
0.1
0.2
0.3 0.4
0.5 0.6
0.7 0.8
PDISS
Figure 50. RθJA vs Internal Dissipation for the WSON
and MSOP-PowerPAD Package
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11 Device and Documentation Support
11.1 Device Support
11.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
11.1.2 Development Support
11.1.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the LM2735 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
• Run electrical simulations to see important waveforms and circuit performance
• Run thermal simulations to understand board thermal performance
• Export customized schematic and layout into popular CAD formats
• Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
11.2 Documentation Support
11.2.1 Related Documentation
For related documentation, see the following:
AN-1229 SIMPLE SWITCHER ® PCB Layout Guidelines, SNVA054
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 Trademarks
PowerPAD, E2E are trademarks of Texas Instruments.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
48
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SNVS485I – JUNE 2007 – REVISED SEPTEMBER 2018
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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49
PACKAGE OPTION ADDENDUM
www.ti.com
6-Sep-2019
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2735XMF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SLEB
LM2735XMFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SLEB
LM2735XMY/NOPB
ACTIVE
HVSSOP
DGN
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SRJB
LM2735XSD/NOPB
ACTIVE
WSON
NGG
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2735X
LM2735XSDX/NOPB
ACTIVE
WSON
NGG
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2735X
LM2735YMF/NOPB
ACTIVE
SOT-23
DBV
5
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SLFB
LM2735YMFX/NOPB
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SLFB
LM2735YMY/NOPB
ACTIVE
HVSSOP
DGN
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
SRKB
LM2735YSD/NOPB
ACTIVE
WSON
NGG
6
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2735Y
LM2735YSDX/NOPB
ACTIVE
WSON
NGG
6
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2735Y
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
6-Sep-2019
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM2735 :
• Automotive: LM2735-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Sep-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LM2735XMF/NOPB
Package Package Pins
Type Drawing
SPQ
SOT-23
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
DBV
5
1000
178.0
B0
(mm)
K0
(mm)
P1
(mm)
8.4
3.2
3.2
1.4
4.0
W
Pin1
(mm) Quadrant
8.0
Q3
LM2735XMFX/NOPB
SOT-23
DBV
5
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2735XMY/NOPB
HVSSOP
DGN
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM2735XSD/NOPB
WSON
NGG
6
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2735XSDX/NOPB
WSON
NGG
6
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2735YMF/NOPB
SOT-23
DBV
5
1000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2735YMFX/NOPB
SOT-23
DBV
5
3000
178.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
LM2735YMY/NOPB
HVSSOP
DGN
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LM2735YSD/NOPB
WSON
NGG
6
1000
178.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
LM2735YSDX/NOPB
WSON
NGG
6
4500
330.0
12.4
3.3
3.3
1.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Sep-2019
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2735XMF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LM2735XMFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
LM2735XMY/NOPB
HVSSOP
DGN
8
1000
210.0
185.0
35.0
LM2735XSD/NOPB
WSON
NGG
6
1000
210.0
185.0
35.0
LM2735XSDX/NOPB
WSON
NGG
6
4500
367.0
367.0
35.0
LM2735YMF/NOPB
SOT-23
DBV
5
1000
210.0
185.0
35.0
LM2735YMFX/NOPB
SOT-23
DBV
5
3000
210.0
185.0
35.0
LM2735YMY/NOPB
HVSSOP
DGN
8
1000
210.0
185.0
35.0
LM2735YSD/NOPB
WSON
NGG
6
1000
210.0
185.0
35.0
LM2735YSDX/NOPB
WSON
NGG
6
4500
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A
SOT-23 - 1.45 mm max height
SCALE 4.000
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
1.75
1.45
PIN 1
INDEX AREA
1
0.1 C
B
A
5
2X 0.95
1.9
1.45
0.90
3.05
2.75
1.9
2
4
0.5
5X
0.3
0.2
3
(1.1)
C A B
0.15
TYP
0.00
0.25
GAGE PLANE
8
TYP
0
0.22
TYP
0.08
0.6
TYP
0.3
SEATING PLANE
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
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EXAMPLE BOARD LAYOUT
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214839/E 09/2019
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X(0.95)
4
3
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
MECHANICAL DATA
NGG0006A
SDE06A (Rev A)
www.ti.com
PACKAGE OUTLINE
TM
DGN0008A
PowerPAD VSSOP - 1.1 mm max height
SCALE 4.000
SMALL OUTLINE PACKAGE
C
5.05
TYP
4.75
A
0.1 C
SEATING
PLANE
PIN 1 INDEX AREA
6X 0.65
8
1
2X
3.1
2.9
NOTE 3
1.95
4
5
8X
B
3.1
2.9
NOTE 4
0.38
0.25
0.13
C A B
0.23
0.13
SEE DETAIL A
EXPOSED THERMAL PAD
4
5
0.25
GAGE PLANE
2.0
1.7
9
1.1 MAX
8
1
0 -8
0.15
0.05
0.7
0.4
DETAIL A
A 20
1.88
1.58
TYPICAL
4218836/A 11/2019
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-187.
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EXAMPLE BOARD LAYOUT
TM
DGN0008A
PowerPAD VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
(2)
NOTE 9
METAL COVERED
BY SOLDER MASK
(1.88)
SOLDER MASK
DEFINED PAD
SYMM
8X (1.4)
(R0.05) TYP
8
8X (0.45)
1
(3)
NOTE 9
SYMM
9
(2)
(1.22)
6X (0.65)
5
4
( 0.2) TYP
VIA
(0.55)
SEE DETAILS
(4.4)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 15X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
NON-SOLDER MASK
DEFINED
(PREFERRED)
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
15.000
4218836/A 11/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
9. Size of metal pad may vary due to creepage requirement.
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EXAMPLE STENCIL DESIGN
TM
DGN0008A
PowerPAD VSSOP - 1.1 mm max height
SMALL OUTLINE PACKAGE
(1.88)
BASED ON
0.125 THICK
STENCIL
SYMM
(R0.05) TYP
8X (1.4)
8X (0.45)
8
1
SYMM
(2)
BASED ON
0.125 THICK
STENCIL
6X (0.65)
5
4
METAL COVERED
BY SOLDER MASK
(4.4)
SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
EXPOSED PAD 9:
100% PRINTED SOLDER COVERAGE BY AREA
SCALE: 15X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
0.125
0.15
0.175
2.10 X 2.24
1.88 X 2.00 (SHOWN)
1.72 X 1.83
1.59 X 1.69
4218836/A 11/2019
NOTES: (continued)
10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
11. Board assembly site may have different recommendations for stencil design.
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