Texas Instruments | bq7718 Overvoltage Protection for 2-Series to 5-Series Cell Li-Ion Batteries with Internal Delay Timer (Rev. G) | Datasheet | Texas Instruments bq7718 Overvoltage Protection for 2-Series to 5-Series Cell Li-Ion Batteries with Internal Delay Timer (Rev. G) Datasheet

Texas Instruments bq7718 Overvoltage Protection for 2-Series to 5-Series Cell Li-Ion Batteries with Internal Delay Timer (Rev. G) Datasheet
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bq7718
SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
bq7718 Overvoltage Protection for 2-Series to 5-Series Cell Li-Ion Batteries
with Internal Delay Timer
1 Features
3 Description
•
The bq7718xy family of products provide an
overvoltage monitor and protector for Li-Ion battery
pack systems. Each cell is monitored independently
for an overvoltage condition. For quicker productionline testing, the bq7718xy device provides a
Customer Test Mode (CTM) with greatly reduced
delay time.
1
•
•
•
•
•
•
2-, 3-, 4-, and 5-Series Cell Overvoltage
Protection
Internal Delay Timer
Fixed OVP Threshold
High-Accuracy Overvoltage Protection:
± 10 mV
Low Power Consumption ICC ≈ 1 µA
(VCELL(ALL) < VPROTECT)
Low Leakage Current Per Cell Input < 100 nA
Small Package Footprint
– 8-pin QFN (3.00 mm × 4.00 mm)
In the bq7718xy device, an internal delay timer is
initiated upon detection of an overvoltage condition
on any cell. Upon expiration of the delay timer, the
output is triggered into its active state (either high or
low depending on the configuration).
Device Information Table(1)
2 Applications
•
Protection for Li-Ion Battery Packs Used in:
– Handheld Garden Tools
– Handheld Power Tools
– Cordless Vacuum Cleaners
– UPS Battery Backup
– Light Electric Vehicles (eBike, eScooter, Pedal
Assist Bicycles)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
bq771800
WSON (8)
3.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet and the Device Comparison Table.
Simplified Schematic
PACK+
RVD
C VD
VDD
RIN
V5
CIN
RIN
CIN
RIN
V3
CIN
RIN
V2
Sensing Circuit
V4
REG
INT_EN
VOV
Delay
Timer
OUT
CIN
RIN
V1
OSC
CIN
VSS
PACK–
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
bq7718
SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
5
7.1
7.2
7.3
7.4
7.5
7.6
7.7
5
5
5
5
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings ............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
DC Characteristics ....................................................
Timing Requirements ................................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes........................................ 10
9
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Systems Examples.................................................. 15
10 Power Supply Recommendations ..................... 15
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support ................. 17
12.1
12.2
12.3
12.4
12.5
12.6
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
17
17
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (August 2017) to Revision G
Page
•
Added the bq771811 and bq771818 devices to Production Data.......................................................................................... 3
•
Added the bq771820 device to the Device Comparison Table .............................................................................................. 3
•
Added bq771820 to DC Characteristics ................................................................................................................................ 6
•
Added bq771820 to Timing Requirements ............................................................................................................................ 7
Changes from Revision E (March 2017) to Revision F
Page
•
Deleted preview products from the Device Comparison Table .............................................................................................. 3
•
Added bq771818 to the Device Comparison Table................................................................................................................ 3
•
Clarified OV Hysteresis, Output Delay and Output Drive options ......................................................................................... 3
•
Deleted preview products from VOV DC Characteristics......................................................................................................... 6
•
Deleted preview products from VHYS DC Characteristics ....................................................................................................... 6
•
Added bq771818 and bq771819 delay settings to Timing Requirements.............................................................................. 7
Changes from Revision D (November 2014) to Revision E
Page
•
Changed the data sheet device number to bq7718 .............................................................................................................. 1
•
Added the Block Diagram image ........................................................................................................................................... 1
•
Added the bq771817 device to the Device Comparison Table ............................................................................................. 3
•
Replaced the pinout image in the Pin Configuration and Functions section ......................................................................... 4
•
Deleted "Lead temperature (soldering, 10 s)" from the Absolute Maximum Ratings table .................................................... 5
•
Changed the Handling Ratings table to ESD Ratings table .................................................................................................. 5
•
Removed the Product Preview note from bq771806 in the DC Characteristics table............................................................ 6
•
Added bq771817 to VHYS DC Characteristics......................................................................................................................... 6
•
Added the Timing Requirements table ................................................................................................................................... 7
•
Added the Feature Description section .................................................................................................................................. 9
2
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
•
Added the Device Functional Modes section ....................................................................................................................... 10
•
Added the Power Supply Recommendations section .......................................................................................................... 15
•
Added the Layout section ..................................................................................................................................................... 16
Changes from Revision C (August 2014) to Revision D
Page
•
Added the bq771815 device to Production Data.................................................................................................................... 3
•
Changed the Handling Ratings table ..................................................................................................................................... 5
•
Added bq771817 to the VOV DC Characteristics .................................................................................................................... 6
•
Added note to the Application and Implementation section ................................................................................................ 12
Changes from Revision B (October 2013) to Revision C
Page
•
Changed the data sheet format .............................................................................................................................................. 1
•
Added the bq771807 device to Production Data.................................................................................................................... 3
Changes from Revision A (September 2013) to Revision B
•
Page
Added the bq771809 device to Production Data.................................................................................................................... 3
Changes from Original (December 2012) to Revision A
•
Page
Added the bq771808 device to Production Data.................................................................................................................... 3
5 Device Comparison Table
TA
–40°C to
110°C
OVP (V)
OV Hysteresis
(V)
Output Delay
Output Drive
Tape and Reel
(Large)
Tape and Reel
(Small)
bq771800
4.300
0.300
4s
CMOS Active
High
bq771800DPJR
bq771800DPJT
bq771801
4.275
0.050
3s
NCH Active Low,
Open Drain
bq771801DPJR
bq771801DPJT
bq771802DPJR
bq771802DPJT
Part Number
Package
Package
Designator
bq771802
4.225
0.300
1s
NCH Active Low,
Open Drain
bq771803
4.275
0.050
1s
NCH Active Low,
Open Drain
bq771803DPJR
bq771803DPJT
bq771806DPJR
bq771806DPJT
bq771806
4.350
0.300
3s
CMOS Active
High
bq771807
4.450
0.300
3s
CMOS Active
High
bq771807DPJR
bq771807DPJT
bq771808
4.200
0.050
1s
NCH Active Low
bq771808DPJR
bq771808DPJT
bq771809DPJR
bq771809DPJT
8-Pin QFN
DPJ
bq771809
4.200
0.050
1s
CMOS Active
High
bq771811 (1)
4.225
0.050
1s
CMOS Active
High
bq771811DPJR
bq771811DPJT
bq771815
4.225
0.050
1s
NCH Active Low
bq771815DPJR
bq771815DPJT
bq771817DPJR
bq771817DPJT
bq771817
4.275
0.050
1s
CMOS Active
High
bq771818 (1)
4.300
0.300
1s
CMOS Active
High
bq771818DPJR
bq771818DPJT
bq771820 (2)
4.190
0.300
1s
NCH Active Low
bq771820DPJR
bq771820DPJT
1, 4, 3,
5.5 s
NCH, Active Low,
Open Drain,
CMOS Active
High
bq7718xyDPJR
bq7718xyDPJT
bq7718xy (3)
(1)
(2)
(3)
3.850 – 4.650
Latch, 0.05, 0.25,
0.3
Contact TI for more information.
Advance information. Contact TI for more information.
Future option. Contact TI for more information.
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6 Pin Configuration and Functions
DPJ Package
8-Pin (WSON)
Top View
VDD
1
8
OUT
V5
2
7
VSS
V4
3
6
V1
V3
4
5
V2
Pin Functions
4
NO.
NAME
TYPE I/O
1
VDD
P
Power supply
DESCRIPTION
2
V5
I
Sense input for positive voltage of the fifth cell from the bottom of the stack
3
V4
I
Sense input for positive voltage of the fourth cell from the bottom of the stack
4
V3
I
Sense input for positive voltage of the third cell from the bottom of the stack
5
V2
I
Sense input for positive voltage of the second cell from the bottom of the stack
6
V1
I
Sense input for positive voltage of the lowest cell in the stack
7
VSS
P
Electrically connected to IC ground and negative terminal of the lowest cell in the stack
8
OUT
O
Output drive for overvoltage fault signal
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
7 Specifications
7.1 Absolute Maximum Ratings
Over-operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
Supply voltage range
VDD – VSS
–0.3
30
V
Input voltage range
V5 – VSS or V4 – VSS or
V3 – VSS or V2 – VSS or V1 – VSS
–0.3
30
V
Output voltage range
OUT – VSS
–0.3
30
V
Continuous total power dissipation,
PTOT
See Thermal Information.
Functional temperature
–40
110
°C
Storage temperature range, TSTG
–65
150
°C
(1)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum–rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
V(ESD) Rating
(1)
(2)
Electrostatic discharge
Human body model (HBM) ESD stress voltage (1)
±2000
Charged device model (CDM) ESD stress voltage (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over-operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD
(1)
Input voltage range
V5–V4 or V4–V3 or
V3–V2 or V2–V1 or V1–VSS
Operating ambient temperature range, TA
(1)
MIN
MAX
UNIT
3
25
V
0
5
V
–40
110
°C
See Systems Examples.
7.4 Thermal Information
bq7718xy
THERMAL METRIC (1)
DPJ (WSON)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
56.6
°C/W
RθJCtop
Junction-to-case(top) thermal resistance
56.4
°C/W
RθJB
Junction-to-board thermal resistance
30.6
°C/W
ψJT
Junction-to-top characterization parameter
1.0
°C/W
ψJB
Junction-to-board characterization parameter
37.8
°C/W
RθJCbot
Junction-to-case(bottom) thermal resistance
11.3
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
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7.5 DC Characteristics
Typical values stated where TA = 25°C and VDD = 18 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V to
25 V (unless otherwise noted).
SYMBOL
PARAMETER
CONDITION
MIN
TYP
MAX
UNIT
Voltage Protection Threshold VCx
V(PROTECT) Overvoltage
Detection
VOV
bq771800
4.300
V
bq771801
4.275
V
bq771803
4.275
V
bq771802
4.225
V
bq771806
4.350
V
bq771807
4.450
V
bq771808
4.200
V
bq771809
4.200
V
bq771811 (1)
4.225
V
bq771815
4.225
V
bq771817
4.275
V
bq771818 (1)
4.300
V
bq771820 (2)
4.190
bq771800
VHYS
OV Detection Hysteresis
OV Detection Accuracy
VOADRIFT
OV Detection Accuracy Across
Temperature
V
300
400
mV
bq771801
0
50
100
mV
bq771802
250
300
400
mV
bq771803
0
50
100
mV
bq771806
250
300
400
mV
bq771807
250
300
400
mV
bq771808
0
50
100
mV
bq771809
0
50
100
mV
bq771811 (1)
0
50
100
mV
bq771815
0
50
100
mV
bq771817
0
50
100
mV
(1)
250
300
400
mV
bq771820 (2)
250
300
400
mV
TA = 25°C
–10
10
mV
TA = –40°C
–40
44
mV
TA = 0°C
–20
20
mV
TA = 60°C
–24
24
mV
TA = 110°C
–54
54
mV
2
µA
0.1
µA
bq771818
VOA
250
Supply and Leakage Current
ICC
Supply Current
(V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) =
(V1–VSS) = 4 V (See Figure 8.)
IIN
Input Current at Vx Pins
(V5–V4) = (V4–V3) = (V3–V2) = (V2–V1) =
(V1–VSS) = 4 V (See Figure 8.)
1
–0.1
Output Drive OUT, CMOS Active HIGH Versions Only
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V, IOH = 100 µA
VOUT1
Output Drive Voltage, Active
High
If three of four cells are short circuited and
only one cell remains powered and > VOV,
VDD = Vx (cell voltage), IOH = 100 µA
6
V
VDD – 0.3
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V, IOL = 100 µA
measured into pin
(1)
(2)
6
250
V
400
mV
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DC Characteristics (continued)
Typical values stated where TA = 25°C and VDD = 18 V, MIN/MAX values stated where TA = –40°C to 110°C and VDD = 3 V to
25 V (unless otherwise noted).
SYMBOL
PARAMETER
CONDITION
IOUTH1
OUT Source Current (during
OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V. OUT = 0 V.
Measured out of OUT pin
IOUTL1
OUT Sink Current (no OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V, OUT = VDD.
Measured into OUT pin
MIN
TYP
0.5
MAX
UNIT
4.5
mA
14
mA
400
mV
14
mA
100
nA
Output Drive OUT, NCH Open Drain Active LOW Versions Only
VOUT2
Output Drive Voltage, Active
Low
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V, IOL = 100 µA
measured into OUT pin
IOUTH2
OUT Sink Current (during OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), or
(V1–VSS) > VOV, VDD = 18 V. OUT = VDD.
Measured into OUT pin
IOUTL2
OUT Source Current (no OV)
(V5–V4), (V4–V3), (V3–V2), (V2–V1), and
(V1–VSS) < VOV, VDD = 18 V. OUT = VDD.
Measured out of OUT pin
250
0.5
7.6 Timing Requirements
MIN
NOM
MAX
UNIT
bq771800
3.2
4
4.8
s
bq771801, bq771807, bq771819
2.4
3
3.6
s
bq771802, bq771803, bq771811 (1),
bq771815, bq771818 (1),
bq771820 (2)
0.8
1
1.2
s
Preview option only. Contact TI.
4.4
5.5
6.6
s
Delay Timer
tDELAY
OV Delay Time
XCTMDELAY
Fault Detection Delay Time during
Customer Test Mode
(1)
(2)
See Customer Test Mode.
15
ms
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7.7 Typical Characteristics
4.40
4.39
4.38
0.316
Mean
Min
Max
0.315
4.36
VHYS (V)
VOUT (V)
4.37
4.35
4.34
4.33
0.314
0.313
4.32
4.31
4.30
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.312
−50
−25
0
G001
Figure 1. Overvoltage Threshold (OVT) vs. Temperature
25
50
Temperature (°C)
75
100
125
G002
Figure 2. Hysteresis VHYS vs. Temperature
1.8
1.6
1.5
1.6
1.4
1.4
1.2
ICELL (µA)
IDD (µA)
1.3
1.1
1.0
1.2
1.0
0.9
0.8
0.8
0.7
0.6
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.6
−50
Figure 3. IDD Current Consumption vs.
Temperature at VDD = 16 V
8
−3.70
7
−3.72
−3.76
VOUT (V)
IOUT (mA)
25
50
Temperature (°C)
75
100
125
G004
6
−3.74
−3.78
−3.80
−3.82
5
4
3
2
−3.84
1
−3.86
−25
0
25
50
Temperature (°C)
75
100
125
0
0
G005
Figure 5. Output Current IOUT vs.
Temperature
8
0
Figure 4. ICELL vs. Temperature
at VCELL= 9.2 V
−3.68
−3.88
−50
−25
G003
5
10
15
VDD (V)
20
25
30
G006
Figure 6. VOUT vs. VDD
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8 Detailed Description
8.1 Overview
In the bq7718xy family of devices, each cell is monitored independently and an external delay timer is initiated if
an overvoltage condition is detected on any cell.
For quicker production-line testing, the device provides a Customer Test Mode with greatly reduced delay time.
8.2 Functional Block Diagram
PACK+
RVD
C VD
VDD
RIN
V5
CIN
RIN
CIN
RIN
V3
CIN
RIN
V2
Sensing Circuit
V4
REG
INT_EN
VOV
Delay
Timer
OUT
CIN
RIN
V1
OSC
CIN
VSS
PACK–
Copyright © 2016, Texas Instruments Incorporated
8.3 Feature Description
In the bq7718xy device, each cell is monitored independently. Overvoltage is detected by comparing the actual
cell voltage to a protection voltage reference, VOV. If any cell voltage exceeds the programmed OV value, a timer
circuit is activated. When the timer expires, the OUT pin goes from inactive to active state.
For NCH Open Drain Active Low configurations, the OUT pin pulls down to VSS when active (OV present) and is
high impedance when inactive (no OV).
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Cell Voltage (V)
(V5–V4, V4–V3, V 3–V2, V2–V1, V1–VSS)
Feature Description (continued)
VOV
VOV –VHYS
tDELAY
OUT (V)
Figure 7. Timing for Overvoltage Sensing
8.3.1 Sense Positive Input for Vx
This is an input to sense each single battery cell voltage. A series resistor and a capacitor across the cell for
each input is required for noise filtering and stable voltage monitoring.
8.3.2 Output Drive, OUT
This pin serves as the fault signal output, and may be ordered in either active HIGH or LOW options.
8.3.3 Supply Input, VDD
This pin is the unregulated input power source for the IC. A series resistor is connected to limit the current, and a
capacitor is connected to ground for noise filtering.
8.4 Device Functional Modes
8.4.1 NORMAL Mode
When all of the cell voltages are below the overvoltage threshold, VOV, the device operates in NORMAL mode.
The device monitors the differential cell voltages connected across (V1 – VSS), (V2 – V1), (V3 – V2), (V4 – V3),
and (VC4 – VC5). The OUT pin is inactive and if configured:
The OUT pin is inactive and if configured:
• Active high is low.
• Active low is being externally pulled up and is an open drain.
8.4.2 OVERVOLTAGE Mode
OVERVOLTAGE mode is detected if any of the cell voltages exceeds the overvoltage threshold, VOV for
configured OV delay time. The OUT pin is activated after a delay time set by the capacitance in the CD pin. The
OUT pin will either pull high internally, if configured as active high, or will be pulled low internally, if configured as
active low. When all of the cell voltages fall below the (VOV – VHYS), the device returns to NORMAL mode.
10
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Device Functional Modes (continued)
8.4.3 Customer Test Mode
Customer Test Mode (CTM) helps to reduce test time for checking the overvoltage delay timer parameter once
the circuit is implemented in the battery pack. To enter CTM, VDD should be set to at least 10 V higher than V5
(see Figure 8). The delay timer is greater than 10 ms, but considerably shorter than the timer delay in normal
operation. To exit Customer Test Mode, remove the VDD to a V5 voltage differential of 10 V so that the decrease
in this value automatically causes an exit.
CAUTION
Avoid exceeding any Absolute Maximum Voltages on any pins when placing the part
into Customer Test Mode. Also avoid exceeding Absolute Maximum Voltages for the
individual cell voltages (V5–V4), (V4–V3), (V4–V3), (V3–V2), (V2–V1), and (V1–VSS).
Stressing the pins beyond the rated limits may cause permanent damage to the
device.
Figure 8 shows the timing for the Customer Test Mode.
Cell Voltage (V)
(V5–V4, V4–V3, V3–V2, V2–V1, V1–VSS)
10 V
VOV
VOV – VHYS
> 10 ms
OUT (V)
Figure 8. Timing for Customer Test Mode
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
In the case of an Open Drain Active Low configuration, an external pull-up resistor is required on the OUT pin.
Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements.
C VD
VDD
OUT
V5
VSS
V4
V1
V3
V2
RVD
Cell5
R IN
Cell4
R IN
Cell3
R IN
CIN
CIN
CIN
Cell2
R IN
CIN
Cell1
R IN
CIN
Copyright © 2016, Texas Instruments Incorporated
Figure 9. Application Configuration
9.1.1 Design Requirements
Changes to the ranges stated in Table 1 will impact the accuracy of the cell measurements. Figure 9 shows each
external component.
Table 1. Parameters
PARAMETER
EXTERNAL COMPONENT
MIN
NOM
MAX
1000
Voltage monitor filter resistance
RIN
900
1100
Ω
Voltage monitor filter capacitance
CIN
0.01
0.1
µF
Supply voltage filter resistance
RVD
100
1K
Ω
Supply voltage filter capacitance
CVD
0.1
CD external delay capacitance
0.1
OUT Open drain version pull-up resistance
to PACK+
100
12
UNIT
Submit Documentation Feedback
µF
1
µF
kΩ
Copyright © 2012–2018, Texas Instruments Incorporated
Product Folder Links: bq7718
bq7718
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
NOTE
The device is calibrated using an RIN value = 1 kΩ. Using a value other than this
recommended value changes the accuracy of the cell voltage measurements and VOV
trigger level.
9.1.2 Detailed Design Procedure
Figure 10 shows the measurement for current consumption for the product for both VDD and Vx.
VDD
OUT
V5
VSS
I IN
V4
V1
I IN
V3
V2
ICC
I IN
Cell5
Cell 4
Cell 3
I IN
Cell 2
IIN
Cell 1
Copyright © 2016, Texas Instruments Incorporated
Figure 10. Configuration for IC Current Consumption Test
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
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9.1.2.1 Application Curves
4.40
4.39
4.38
0.316
Mean
Min
Max
0.315
4.36
VHYS (V)
VOUT (V)
4.37
4.35
4.34
4.33
0.314
0.313
4.32
4.31
4.30
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.312
−50
−25
0
G001
Figure 11. Overvoltage Threshold (OVT) vs. Temperature
25
50
Temperature (°C)
75
100
125
G002
Figure 12. Hysteresis VHYS vs. Temperature
1.6
1.8
1.5
1.6
1.4
1.4
1.2
ICELL (µA)
IDD (µA)
1.3
1.1
1.0
1.2
1.0
0.9
0.8
0.8
0.7
0.6
−50
−25
0
25
50
Temperature (°C)
75
100
125
0.6
−50
Figure 13. IDD Current Consumption vs.
Temperature at VDD = 16 V
8
−3.70
7
−3.72
−3.76
VOUT (V)
IOUT (mA)
25
50
Temperature (°C)
75
100
125
G004
6
−3.74
−3.78
−3.80
−3.82
5
4
3
2
−3.84
1
−3.86
−25
0
25
50
Temperature (°C)
75
100
125
0
0
G005
Figure 15. Output Current IOUT vs.
Temperature
14
0
Figure 14. ICELL vs. Temperature
at VCELL= 9.2 V
−3.68
−3.88
−50
−25
G003
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5
10
15
VDD (V)
20
25
30
G006
Figure 16. VOUT vs. VDD
Copyright © 2012–2018, Texas Instruments Incorporated
Product Folder Links: bq7718
bq7718
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
9.2 Systems Examples
In these application examples, an external pull-up resistor is required on the OUT pin to configure for an Open
Drain Active Low operation.
C VD
R VD
Cell 4
Cell 3
Cell 2
Cell 1
RIN
RIN
C VD
VDD
OUT
VSS
V5
VSS
V4
V1
V4
V1
V3
V2
V3
V2
VDD
OUT
V5
RVD
CIN
RIN
CIN
Cell3
RIN
CIN
Cell2
RIN
CIN
Cell1
CIN
RIN
RIN
CIN
CIN
Copyright © 2016, Texas Instruments Incorporated
Copyright © 2016, Texas Instruments Incorporated
Figure 18. 3-Series Cell Configuration with Fixed Delay
Figure 17. 4-Series Cell Configuration
C VD
RVD
Cell2
Cell1
RIN
CIN
RIN
CIN
VDD
OUT
V5
VSS
V4
V1
V5
V2
Copyright © 2016, Texas Instruments Incorporated
Figure 19. 2-Series Cell Configuration with Internal Fixed Delay
10 Power Supply Recommendations
The maximum power of this device is 25 V on VDD.
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11 Layout
11.1 Layout Guidelines
•
•
Ensure the RC filters for the V1 and VDD pins are placed as close as possible to the target terminal.
The VSS pin should be routed to the CELL– terminal.
11.2 Layout Example
Place the RC filters close to the
device terminals
Power Trace Line
Pack +
VCELL5
VDD
OUT
VC5
VSS
OUT
Pack -
VC4
VC1
PWPD
VCELL4
VC3
VC2
VCELL3
VCELL2
VCELL1
Figure 20. Example Layout
16
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to order now.
Table 2. Related Links
PARTS
PRODUCT FOLDER
ORDER NOW
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
bq7718
Click here
Click here
Click here
Click here
Click here
bq771800
Click here
Click here
Click here
Click here
Click here
bq771801
Click here
Click here
Click here
Click here
Click here
bq771802
Click here
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bq771803
Click here
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Click here
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bq771806
Click here
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bq771807
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bq771808
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bq771809
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bq771815
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bq771817
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12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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SLUSAX1G – DECEMBER 2012 – REVISED JULY 2018
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13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
18
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Product Folder Links: bq7718
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jul-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
BQ771800DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771800
BQ771800DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771800
BQ771801DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771801
BQ771801DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771801
BQ771802DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771802
BQ771802DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771802
BQ771803DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771803
BQ771803DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771803
BQ771806DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771806
BQ771806DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771806
BQ771807DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771807
BQ771807DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771807
BQ771808DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771808
BQ771808DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771808
BQ771809DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771809
BQ771809DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771809
BQ771815DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771815
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
11-Jul-2018
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
BQ771815DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771815
BQ771817DPJR
ACTIVE
WSON
DPJ
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771817
BQ771817DPJT
ACTIVE
WSON
DPJ
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
771817
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jul-2018
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Jul-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
BQ771800DPJR
WSON
DPJ
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771800DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771801DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771801DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771802DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771802DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771803DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771803DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771806DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771806DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771807DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771807DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771808DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771808DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771809DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771809DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771815DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771815DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Jul-2018
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
BQ771817DPJR
WSON
DPJ
8
3000
330.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
BQ771817DPJT
WSON
DPJ
8
250
180.0
12.4
3.3
4.3
1.1
8.0
12.0
Q2
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ771800DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771800DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771801DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771801DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771802DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771802DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771803DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771803DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771806DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771806DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771807DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771807DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771808DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771808DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771809DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Jul-2018
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ771809DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771815DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771815DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
BQ771817DPJR
WSON
DPJ
8
3000
367.0
367.0
35.0
BQ771817DPJT
WSON
DPJ
8
250
210.0
185.0
35.0
Pack Materials-Page 3
PACKAGE OUTLINE
DPJ0008A
WSON - 0.8 mm max height
SCALE 4.000
PLASTIC SMALL OUTLINE - NO LEAD
4.1
3.9
B
A
PIN 1 INDEX AREA
3.1
2.9
0.8
0.7
C
SEATING PLANE
0.05
0.00
0.08 C
2.3 0.1
EXPOSED
THERMAL PAD
(0.2) TYP
SYMM
4
5
SYMM
9
2X 1.95
6X 0.65
8
1
8X
PIN 1 ID
8X
0.6
0.4
0.3
0.2
0.1
0.05
C A B
4218853/A 04/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
DPJ0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(2.3)
8X (0.7)
SEE SOLDER MASK
DETAIL
SYMM
8X (0.25) 1
8
9
SYMM
6X (0.65)
(0.9)
(R0.05) TYP
4
5
( 0.2) TYP
VIA
(0.9)
(3.7)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
OPENING
SOLDER MASK DEFINED
SOLDER MASK DETAILS
4218853/A 04/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
DPJ0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.61)
8X (0.7)
4X ( 1.02)
8X (0.25)
8
1
(0.61)
9
SYMM
6X (0.65)
(R0.05) TYP
5
4
SYMM
(3.7)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 20X
EXPOSED PAD 9
79% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
4218853/A 04/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
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Copyright © 2019, Texas Instruments Incorporated
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